From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 24209 invoked by alias); 17 Jan 2019 09:10:12 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 24187 invoked by uid 89); 17 Jan 2019 09:10:12 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 17 Jan 2019 09:10:10 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CE9E91596; Thu, 17 Jan 2019 01:10:08 -0800 (PST) Received: from localhost (unknown [10.32.98.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2FDE43F557; Thu, 17 Jan 2019 01:10:08 -0800 (PST) From: Richard Sandiford To: Steve Ellcey Mail-Followup-To: Steve Ellcey ,"gcc-patches\@gcc.gnu.org" , richard.sandiford@arm.com Cc: "gcc-patches\@gcc.gnu.org" Subject: Re: [Patch 2/4][Aarch64] v2: Implement Aarch64 SIMD ABI References: <87pnu6app5.fsf@arm.com> <87tvifw8vy.fsf@arm.com> <70ac99bb1350a4b6f2811d3fd0761bf303f371c8.camel@marvell.com> <87k1j6ri1c.fsf@arm.com> <8c1a759976879105a78c43806a64e72e316c6686.camel@marvell.com> <87zhs1gf4k.fsf@arm.com> Date: Thu, 17 Jan 2019 09:10:00 -0000 In-Reply-To: (Steve Ellcey's message of "Wed, 16 Jan 2019 21:58:09 +0000") Message-ID: <8736pry7ip.fsf@arm.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.1 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2019-01/txt/msg00989.txt.bz2 Steve Ellcey writes: > +/* Return true for types that could be supported as SIMD return or > + argument types. */ > + > +static bool supported_simd_type (tree t) Missing line break after "static bool". > +{ > + if (SCALAR_FLOAT_TYPE_P (t) || INTEGRAL_TYPE_P (t) || POINTER_TYPE_P (t)) > + { > + HOST_WIDE_INT s = tree_to_shwi (TYPE_SIZE_UNIT (t)); > + return s == 1 || s == 2 || s == 4 || s == 8; > + } > + return false; > +} > + > +/* Return true for types that currently are supported as SIMD return > + or argument types. */ > + > +static bool currently_supported_simd_type (tree t, tree b) Same here. > +{ > + if (COMPLEX_FLOAT_TYPE_P (t)) > + return false; > + > + if (TYPE_SIZE (t) != TYPE_SIZE (b)) > + return false; > + > + return supported_simd_type (t); > +} > + > +/* Implement TARGET_SIMD_CLONE_COMPUTE_VECSIZE_AND_SIMDLEN. */ > + > +static int > +aarch64_simd_clone_compute_vecsize_and_simdlen (struct cgraph_node *node, > + struct cgraph_simd_clone *clonei, > + tree base_type, int num) > +{ > + tree t, ret_type, arg_type; > + unsigned int elt_bits, vec_bits, count; > + > + if (!TARGET_SIMD) > + return 0; > + > + if (clonei->simdlen > + && (clonei->simdlen < 2 > + || clonei->simdlen > 1024 > + || (clonei->simdlen & (clonei->simdlen - 1)) != 0)) > + { > + warning_at (DECL_SOURCE_LOCATION (node->decl), 0, > + "unsupported simdlen %d", clonei->simdlen); > + return 0; > + } > + > + ret_type = TREE_TYPE (TREE_TYPE (node->decl)); > + if (TREE_CODE (ret_type) != VOID_TYPE > + && !currently_supported_simd_type (ret_type, base_type)) > + { > + if (TYPE_SIZE (ret_type) != TYPE_SIZE (base_type)) > + warning_at (DECL_SOURCE_LOCATION (node->decl), 0, > + "GCC does not currently support mixed size types " > + "for % functions"); > + else if (supported_simd_type (ret_type)) > + warning_at (DECL_SOURCE_LOCATION (node->decl), 0, > + "GCC does not currently support return type %qT " > + "for % functions", ret_type); > + else > + warning_at (DECL_SOURCE_LOCATION (node->decl), 0, > + "unsupported return type %qT for % functions", > + ret_type); > + return 0; > + } > + > + for (t = DECL_ARGUMENTS (node->decl); t; t = DECL_CHAIN (t)) > + { > + arg_type = TREE_TYPE (t); > + > + if (!currently_supported_simd_type (arg_type, base_type)) > + { > + if (TYPE_SIZE (arg_type) != TYPE_SIZE (base_type)) > + warning_at (DECL_SOURCE_LOCATION (node->decl), 0, > + "GCC does not currently support mixed size types " > + "for % functions"); > + else > + warning_at (DECL_SOURCE_LOCATION (node->decl), 0, > + "GCC does not currently support argument type %qT " > + "for % functions", arg_type); > + return 0; > + } > + } > + > + clonei->vecsize_mangle = 'n'; > + clonei->mask_mode = VOIDmode; > + elt_bits = GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type)); > + if (clonei->simdlen == 0) > + { > + count = 2; > + vec_bits = (num == 0 ? 64 : 128); > + clonei->simdlen = vec_bits / elt_bits; > + } > + else > + { > + count = 1; > + vec_bits = clonei->simdlen * elt_bits; > + if (vec_bits != 64 && vec_bits != 128) > + { > + warning_at (DECL_SOURCE_LOCATION (node->decl), 0, > + "GCC does not currently support simdlen %d for type %qT", > + clonei->simdlen, base_type); > + return 0; The return should use tab indentation. OK otherwise, thanks. Richard