From: Richard Sandiford <richard.sandiford@linaro.org>
To: gcc-patches@gcc.gnu.org
Subject: [42/77] Use scalar_int_mode in simplify_shift_const_1
Date: Thu, 13 Jul 2017 08:53:00 -0000 [thread overview]
Message-ID: <874lughg53.fsf@linaro.org> (raw)
In-Reply-To: <8760ewohsv.fsf@linaro.org> (Richard Sandiford's message of "Thu, 13 Jul 2017 09:35:44 +0100")
This patch makes simplify_shift_const_1 use scalar_int_modes
for all code that is specific to scalars rather than vectors.
This includes situations in which the new shift mode is different
from the original one, since the function never changes the mode
of vector shifts. That in turn makes it more natural to test for
equal modes in simplify_shift_const_1 rather than try_widen_shift_mode
(which only applies to scalars).
2017-07-13 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (try_widen_shift_mode): Move check for equal modes to...
(simplify_shift_const_1): ...here. Use scalar_int_mode for
shift_unit_mode and for modes involved in scalar shifts.
Index: gcc/combine.c
===================================================================
--- gcc/combine.c 2017-07-13 09:18:42.622481204 +0100
+++ gcc/combine.c 2017-07-13 09:18:43.037447143 +0100
@@ -10343,8 +10343,6 @@ try_widen_shift_mode (enum rtx_code code
machine_mode orig_mode, machine_mode mode,
enum rtx_code outer_code, HOST_WIDE_INT outer_const)
{
- if (orig_mode == mode)
- return mode;
gcc_assert (GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (orig_mode));
/* In general we can't perform in wider mode for right shift and rotate. */
@@ -10405,7 +10403,7 @@ simplify_shift_const_1 (enum rtx_code co
int count;
machine_mode mode = result_mode;
machine_mode shift_mode;
- scalar_int_mode tmode, inner_mode;
+ scalar_int_mode tmode, inner_mode, int_mode, int_varop_mode, int_result_mode;
unsigned int mode_words
= (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
/* We form (outer_op (code varop count) (outer_const)). */
@@ -10445,9 +10443,19 @@ simplify_shift_const_1 (enum rtx_code co
count = bitsize - count;
}
- shift_mode = try_widen_shift_mode (code, varop, count, result_mode,
- mode, outer_op, outer_const);
- machine_mode shift_unit_mode = GET_MODE_INNER (shift_mode);
+ shift_mode = result_mode;
+ if (shift_mode != mode)
+ {
+ /* We only change the modes of scalar shifts. */
+ int_mode = as_a <scalar_int_mode> (mode);
+ int_result_mode = as_a <scalar_int_mode> (result_mode);
+ shift_mode = try_widen_shift_mode (code, varop, count,
+ int_result_mode, int_mode,
+ outer_op, outer_const);
+ }
+
+ scalar_int_mode shift_unit_mode
+ = as_a <scalar_int_mode> (GET_MODE_INNER (shift_mode));
/* Handle cases where the count is greater than the size of the mode
minus 1. For ASHIFT, use the size minus one as the count (this can
@@ -10542,6 +10550,7 @@ simplify_shift_const_1 (enum rtx_code co
/* The following rules apply only to scalars. */
if (shift_mode != shift_unit_mode)
break;
+ int_mode = as_a <scalar_int_mode> (mode);
/* If we have (xshiftrt (mem ...) C) and C is MODE_WIDTH
minus the width of a smaller mode, we can do this with a
@@ -10550,15 +10559,15 @@ simplify_shift_const_1 (enum rtx_code co
&& ! mode_dependent_address_p (XEXP (varop, 0),
MEM_ADDR_SPACE (varop))
&& ! MEM_VOLATILE_P (varop)
- && (int_mode_for_size (GET_MODE_BITSIZE (mode) - count, 1)
+ && (int_mode_for_size (GET_MODE_BITSIZE (int_mode) - count, 1)
.exists (&tmode)))
{
new_rtx = adjust_address_nv (varop, tmode,
- BYTES_BIG_ENDIAN ? 0
- : count / BITS_PER_UNIT);
+ BYTES_BIG_ENDIAN ? 0
+ : count / BITS_PER_UNIT);
varop = gen_rtx_fmt_e (code == ASHIFTRT ? SIGN_EXTEND
- : ZERO_EXTEND, mode, new_rtx);
+ : ZERO_EXTEND, int_mode, new_rtx);
count = 0;
continue;
}
@@ -10568,20 +10577,22 @@ simplify_shift_const_1 (enum rtx_code co
/* The following rules apply only to scalars. */
if (shift_mode != shift_unit_mode)
break;
+ int_mode = as_a <scalar_int_mode> (mode);
+ int_varop_mode = as_a <scalar_int_mode> (GET_MODE (varop));
/* If VAROP is a SUBREG, strip it as long as the inner operand has
the same number of words as what we've seen so far. Then store
the widest mode in MODE. */
if (subreg_lowpart_p (varop)
&& is_int_mode (GET_MODE (SUBREG_REG (varop)), &inner_mode)
- && GET_MODE_SIZE (inner_mode) > GET_MODE_SIZE (GET_MODE (varop))
+ && GET_MODE_SIZE (inner_mode) > GET_MODE_SIZE (int_varop_mode)
&& (unsigned int) ((GET_MODE_SIZE (inner_mode)
+ (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
== mode_words
- && GET_MODE_CLASS (GET_MODE (varop)) == MODE_INT)
+ && GET_MODE_CLASS (int_varop_mode) == MODE_INT)
{
varop = SUBREG_REG (varop);
- if (GET_MODE_SIZE (inner_mode) > GET_MODE_SIZE (mode))
+ if (GET_MODE_SIZE (inner_mode) > GET_MODE_SIZE (int_mode))
mode = inner_mode;
continue;
}
@@ -10640,14 +10651,17 @@ simplify_shift_const_1 (enum rtx_code co
/* The following rules apply only to scalars. */
if (shift_mode != shift_unit_mode)
break;
+ int_mode = as_a <scalar_int_mode> (mode);
+ int_varop_mode = as_a <scalar_int_mode> (GET_MODE (varop));
+ int_result_mode = as_a <scalar_int_mode> (result_mode);
/* Here we have two nested shifts. The result is usually the
AND of a new shift with a mask. We compute the result below. */
if (CONST_INT_P (XEXP (varop, 1))
&& INTVAL (XEXP (varop, 1)) >= 0
- && INTVAL (XEXP (varop, 1)) < GET_MODE_PRECISION (GET_MODE (varop))
- && HWI_COMPUTABLE_MODE_P (result_mode)
- && HWI_COMPUTABLE_MODE_P (mode))
+ && INTVAL (XEXP (varop, 1)) < GET_MODE_PRECISION (int_varop_mode)
+ && HWI_COMPUTABLE_MODE_P (int_result_mode)
+ && HWI_COMPUTABLE_MODE_P (int_mode))
{
enum rtx_code first_code = GET_CODE (varop);
unsigned int first_count = INTVAL (XEXP (varop, 1));
@@ -10662,18 +10676,18 @@ simplify_shift_const_1 (enum rtx_code co
(ashiftrt:M1 (ashift:M1 (and:M1 (subreg:M1 FOO 0) C3) C2) C1).
This simplifies certain SIGN_EXTEND operations. */
if (code == ASHIFT && first_code == ASHIFTRT
- && count == (GET_MODE_PRECISION (result_mode)
- - GET_MODE_PRECISION (GET_MODE (varop))))
+ && count == (GET_MODE_PRECISION (int_result_mode)
+ - GET_MODE_PRECISION (int_varop_mode)))
{
/* C3 has the low-order C1 bits zero. */
- mask = GET_MODE_MASK (mode)
+ mask = GET_MODE_MASK (int_mode)
& ~((HOST_WIDE_INT_1U << first_count) - 1);
- varop = simplify_and_const_int (NULL_RTX, result_mode,
+ varop = simplify_and_const_int (NULL_RTX, int_result_mode,
XEXP (varop, 0), mask);
- varop = simplify_shift_const (NULL_RTX, ASHIFT, result_mode,
- varop, count);
+ varop = simplify_shift_const (NULL_RTX, ASHIFT,
+ int_result_mode, varop, count);
count = first_count;
code = ASHIFTRT;
continue;
@@ -10684,11 +10698,11 @@ simplify_shift_const_1 (enum rtx_code co
this to either an ASHIFT or an ASHIFTRT depending on the
two counts.
- We cannot do this if VAROP's mode is not SHIFT_MODE. */
+ We cannot do this if VAROP's mode is not SHIFT_UNIT_MODE. */
if (code == ASHIFTRT && first_code == ASHIFT
- && GET_MODE (varop) == shift_mode
- && (num_sign_bit_copies (XEXP (varop, 0), shift_mode)
+ && int_varop_mode == shift_unit_mode
+ && (num_sign_bit_copies (XEXP (varop, 0), shift_unit_mode)
> first_count))
{
varop = XEXP (varop, 0);
@@ -10719,7 +10733,7 @@ simplify_shift_const_1 (enum rtx_code co
if (code == first_code)
{
- if (GET_MODE (varop) != result_mode
+ if (int_varop_mode != int_result_mode
&& (code == ASHIFTRT || code == LSHIFTRT
|| code == ROTATE))
break;
@@ -10731,8 +10745,8 @@ simplify_shift_const_1 (enum rtx_code co
if (code == ASHIFTRT
|| (code == ROTATE && first_code == ASHIFTRT)
- || GET_MODE_PRECISION (mode) > HOST_BITS_PER_WIDE_INT
- || (GET_MODE (varop) != result_mode
+ || GET_MODE_PRECISION (int_mode) > HOST_BITS_PER_WIDE_INT
+ || (int_varop_mode != int_result_mode
&& (first_code == ASHIFTRT || first_code == LSHIFTRT
|| first_code == ROTATE
|| code == ROTATE)))
@@ -10742,19 +10756,19 @@ simplify_shift_const_1 (enum rtx_code co
nonzero bits of the inner shift the same way the
outer shift will. */
- mask_rtx = gen_int_mode (nonzero_bits (varop, GET_MODE (varop)),
- result_mode);
+ mask_rtx = gen_int_mode (nonzero_bits (varop, int_varop_mode),
+ int_result_mode);
mask_rtx
- = simplify_const_binary_operation (code, result_mode, mask_rtx,
- GEN_INT (count));
+ = simplify_const_binary_operation (code, int_result_mode,
+ mask_rtx, GEN_INT (count));
/* Give up if we can't compute an outer operation to use. */
if (mask_rtx == 0
|| !CONST_INT_P (mask_rtx)
|| ! merge_outer_ops (&outer_op, &outer_const, AND,
INTVAL (mask_rtx),
- result_mode, &complement_p))
+ int_result_mode, &complement_p))
break;
/* If the shifts are in the same direction, we add the
@@ -10791,22 +10805,22 @@ simplify_shift_const_1 (enum rtx_code co
/* For ((unsigned) (cstULL >> count)) >> cst2 we have to make
sure the result will be masked. See PR70222. */
if (code == LSHIFTRT
- && mode != result_mode
+ && int_mode != int_result_mode
&& !merge_outer_ops (&outer_op, &outer_const, AND,
- GET_MODE_MASK (result_mode)
- >> orig_count, result_mode,
+ GET_MODE_MASK (int_result_mode)
+ >> orig_count, int_result_mode,
&complement_p))
break;
/* For ((int) (cstLL >> count)) >> cst2 just give up. Queuing
up outer sign extension (often left and right shift) is
hardly more efficient than the original. See PR70429. */
- if (code == ASHIFTRT && mode != result_mode)
+ if (code == ASHIFTRT && int_mode != int_result_mode)
break;
- rtx new_rtx = simplify_const_binary_operation (code, mode,
+ rtx new_rtx = simplify_const_binary_operation (code, int_mode,
XEXP (varop, 0),
GEN_INT (count));
- varop = gen_rtx_fmt_ee (code, mode, new_rtx, XEXP (varop, 1));
+ varop = gen_rtx_fmt_ee (code, int_mode, new_rtx, XEXP (varop, 1));
count = 0;
continue;
}
@@ -10827,6 +10841,8 @@ simplify_shift_const_1 (enum rtx_code co
/* The following rules apply only to scalars. */
if (shift_mode != shift_unit_mode)
break;
+ int_varop_mode = as_a <scalar_int_mode> (GET_MODE (varop));
+ int_result_mode = as_a <scalar_int_mode> (result_mode);
/* If we have (xshiftrt (ior (plus X (const_int -1)) X) C)
with C the size of VAROP - 1 and the shift is logical if
@@ -10839,15 +10855,15 @@ simplify_shift_const_1 (enum rtx_code co
&& XEXP (XEXP (varop, 0), 1) == constm1_rtx
&& (STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1)
&& (code == LSHIFTRT || code == ASHIFTRT)
- && count == (GET_MODE_PRECISION (GET_MODE (varop)) - 1)
+ && count == (GET_MODE_PRECISION (int_varop_mode) - 1)
&& rtx_equal_p (XEXP (XEXP (varop, 0), 0), XEXP (varop, 1)))
{
count = 0;
- varop = gen_rtx_LE (GET_MODE (varop), XEXP (varop, 1),
+ varop = gen_rtx_LE (int_varop_mode, XEXP (varop, 1),
const0_rtx);
if (STORE_FLAG_VALUE == 1 ? code == ASHIFTRT : code == LSHIFTRT)
- varop = gen_rtx_NEG (GET_MODE (varop), varop);
+ varop = gen_rtx_NEG (int_varop_mode, varop);
continue;
}
@@ -10860,19 +10876,20 @@ simplify_shift_const_1 (enum rtx_code co
if (CONST_INT_P (XEXP (varop, 1))
/* We can't do this if we have (ashiftrt (xor)) and the
- constant has its sign bit set in shift_mode with shift_mode
- wider than result_mode. */
+ constant has its sign bit set in shift_unit_mode with
+ shift_unit_mode wider than result_mode. */
&& !(code == ASHIFTRT && GET_CODE (varop) == XOR
- && result_mode != shift_mode
+ && int_result_mode != shift_unit_mode
&& 0 > trunc_int_for_mode (INTVAL (XEXP (varop, 1)),
- shift_mode))
+ shift_unit_mode))
&& (new_rtx = simplify_const_binary_operation
- (code, result_mode,
- gen_int_mode (INTVAL (XEXP (varop, 1)), result_mode),
+ (code, int_result_mode,
+ gen_int_mode (INTVAL (XEXP (varop, 1)), int_result_mode),
GEN_INT (count))) != 0
&& CONST_INT_P (new_rtx)
&& merge_outer_ops (&outer_op, &outer_const, GET_CODE (varop),
- INTVAL (new_rtx), result_mode, &complement_p))
+ INTVAL (new_rtx), int_result_mode,
+ &complement_p))
{
varop = XEXP (varop, 0);
continue;
@@ -10885,16 +10902,16 @@ simplify_shift_const_1 (enum rtx_code co
changes the sign bit. */
if (CONST_INT_P (XEXP (varop, 1))
&& !(code == ASHIFTRT && GET_CODE (varop) == XOR
- && result_mode != shift_mode
+ && int_result_mode != shift_unit_mode
&& 0 > trunc_int_for_mode (INTVAL (XEXP (varop, 1)),
- shift_mode)))
+ shift_unit_mode)))
{
- rtx lhs = simplify_shift_const (NULL_RTX, code, shift_mode,
+ rtx lhs = simplify_shift_const (NULL_RTX, code, shift_unit_mode,
XEXP (varop, 0), count);
- rtx rhs = simplify_shift_const (NULL_RTX, code, shift_mode,
+ rtx rhs = simplify_shift_const (NULL_RTX, code, shift_unit_mode,
XEXP (varop, 1), count);
- varop = simplify_gen_binary (GET_CODE (varop), shift_mode,
+ varop = simplify_gen_binary (GET_CODE (varop), shift_unit_mode,
lhs, rhs);
varop = apply_distributive_law (varop);
@@ -10907,6 +10924,7 @@ simplify_shift_const_1 (enum rtx_code co
/* The following rules apply only to scalars. */
if (shift_mode != shift_unit_mode)
break;
+ int_result_mode = as_a <scalar_int_mode> (result_mode);
/* Convert (lshiftrt (eq FOO 0) C) to (xor FOO 1) if STORE_FLAG_VALUE
says that the sign bit can be tested, FOO has mode MODE, C is
@@ -10914,13 +10932,13 @@ simplify_shift_const_1 (enum rtx_code co
that may be nonzero. */
if (code == LSHIFTRT
&& XEXP (varop, 1) == const0_rtx
- && GET_MODE (XEXP (varop, 0)) == result_mode
- && count == (GET_MODE_PRECISION (result_mode) - 1)
- && HWI_COMPUTABLE_MODE_P (result_mode)
+ && GET_MODE (XEXP (varop, 0)) == int_result_mode
+ && count == (GET_MODE_PRECISION (int_result_mode) - 1)
+ && HWI_COMPUTABLE_MODE_P (int_result_mode)
&& STORE_FLAG_VALUE == -1
- && nonzero_bits (XEXP (varop, 0), result_mode) == 1
- && merge_outer_ops (&outer_op, &outer_const, XOR, 1, result_mode,
- &complement_p))
+ && nonzero_bits (XEXP (varop, 0), int_result_mode) == 1
+ && merge_outer_ops (&outer_op, &outer_const, XOR, 1,
+ int_result_mode, &complement_p))
{
varop = XEXP (varop, 0);
count = 0;
@@ -10932,12 +10950,13 @@ simplify_shift_const_1 (enum rtx_code co
/* The following rules apply only to scalars. */
if (shift_mode != shift_unit_mode)
break;
+ int_result_mode = as_a <scalar_int_mode> (result_mode);
/* (lshiftrt (neg A) C) where A is either 0 or 1 and C is one less
than the number of bits in the mode is equivalent to A. */
if (code == LSHIFTRT
- && count == (GET_MODE_PRECISION (result_mode) - 1)
- && nonzero_bits (XEXP (varop, 0), result_mode) == 1)
+ && count == (GET_MODE_PRECISION (int_result_mode) - 1)
+ && nonzero_bits (XEXP (varop, 0), int_result_mode) == 1)
{
varop = XEXP (varop, 0);
count = 0;
@@ -10947,8 +10966,8 @@ simplify_shift_const_1 (enum rtx_code co
/* NEG commutes with ASHIFT since it is multiplication. Move the
NEG outside to allow shifts to combine. */
if (code == ASHIFT
- && merge_outer_ops (&outer_op, &outer_const, NEG, 0, result_mode,
- &complement_p))
+ && merge_outer_ops (&outer_op, &outer_const, NEG, 0,
+ int_result_mode, &complement_p))
{
varop = XEXP (varop, 0);
continue;
@@ -10959,16 +10978,17 @@ simplify_shift_const_1 (enum rtx_code co
/* The following rules apply only to scalars. */
if (shift_mode != shift_unit_mode)
break;
+ int_result_mode = as_a <scalar_int_mode> (result_mode);
/* (lshiftrt (plus A -1) C) where A is either 0 or 1 and C
is one less than the number of bits in the mode is
equivalent to (xor A 1). */
if (code == LSHIFTRT
- && count == (GET_MODE_PRECISION (result_mode) - 1)
+ && count == (GET_MODE_PRECISION (int_result_mode) - 1)
&& XEXP (varop, 1) == constm1_rtx
- && nonzero_bits (XEXP (varop, 0), result_mode) == 1
- && merge_outer_ops (&outer_op, &outer_const, XOR, 1, result_mode,
- &complement_p))
+ && nonzero_bits (XEXP (varop, 0), int_result_mode) == 1
+ && merge_outer_ops (&outer_op, &outer_const, XOR, 1,
+ int_result_mode, &complement_p))
{
count = 0;
varop = XEXP (varop, 0);
@@ -10983,21 +11003,20 @@ simplify_shift_const_1 (enum rtx_code co
if ((code == ASHIFTRT || code == LSHIFTRT)
&& count < HOST_BITS_PER_WIDE_INT
- && nonzero_bits (XEXP (varop, 1), result_mode) >> count == 0
- && (nonzero_bits (XEXP (varop, 1), result_mode)
- & nonzero_bits (XEXP (varop, 0), result_mode)) == 0)
+ && nonzero_bits (XEXP (varop, 1), int_result_mode) >> count == 0
+ && (nonzero_bits (XEXP (varop, 1), int_result_mode)
+ & nonzero_bits (XEXP (varop, 0), int_result_mode)) == 0)
{
varop = XEXP (varop, 0);
continue;
}
else if ((code == ASHIFTRT || code == LSHIFTRT)
&& count < HOST_BITS_PER_WIDE_INT
- && HWI_COMPUTABLE_MODE_P (result_mode)
- && 0 == (nonzero_bits (XEXP (varop, 0), result_mode)
+ && HWI_COMPUTABLE_MODE_P (int_result_mode)
+ && 0 == (nonzero_bits (XEXP (varop, 0), int_result_mode)
>> count)
- && 0 == (nonzero_bits (XEXP (varop, 0), result_mode)
- & nonzero_bits (XEXP (varop, 1),
- result_mode)))
+ && 0 == (nonzero_bits (XEXP (varop, 0), int_result_mode)
+ & nonzero_bits (XEXP (varop, 1), int_result_mode)))
{
varop = XEXP (varop, 1);
continue;
@@ -11007,12 +11026,13 @@ simplify_shift_const_1 (enum rtx_code co
if (code == ASHIFT
&& CONST_INT_P (XEXP (varop, 1))
&& (new_rtx = simplify_const_binary_operation
- (ASHIFT, result_mode,
- gen_int_mode (INTVAL (XEXP (varop, 1)), result_mode),
+ (ASHIFT, int_result_mode,
+ gen_int_mode (INTVAL (XEXP (varop, 1)), int_result_mode),
GEN_INT (count))) != 0
&& CONST_INT_P (new_rtx)
&& merge_outer_ops (&outer_op, &outer_const, PLUS,
- INTVAL (new_rtx), result_mode, &complement_p))
+ INTVAL (new_rtx), int_result_mode,
+ &complement_p))
{
varop = XEXP (varop, 0);
continue;
@@ -11025,14 +11045,15 @@ simplify_shift_const_1 (enum rtx_code co
for reasoning in doing so. */
if (code == LSHIFTRT
&& CONST_INT_P (XEXP (varop, 1))
- && mode_signbit_p (result_mode, XEXP (varop, 1))
+ && mode_signbit_p (int_result_mode, XEXP (varop, 1))
&& (new_rtx = simplify_const_binary_operation
- (code, result_mode,
- gen_int_mode (INTVAL (XEXP (varop, 1)), result_mode),
+ (code, int_result_mode,
+ gen_int_mode (INTVAL (XEXP (varop, 1)), int_result_mode),
GEN_INT (count))) != 0
&& CONST_INT_P (new_rtx)
&& merge_outer_ops (&outer_op, &outer_const, XOR,
- INTVAL (new_rtx), result_mode, &complement_p))
+ INTVAL (new_rtx), int_result_mode,
+ &complement_p))
{
varop = XEXP (varop, 0);
continue;
@@ -11044,6 +11065,7 @@ simplify_shift_const_1 (enum rtx_code co
/* The following rules apply only to scalars. */
if (shift_mode != shift_unit_mode)
break;
+ int_varop_mode = as_a <scalar_int_mode> (GET_MODE (varop));
/* If we have (xshiftrt (minus (ashiftrt X C)) X) C)
with C the size of VAROP - 1 and the shift is logical if
@@ -11054,18 +11076,18 @@ simplify_shift_const_1 (enum rtx_code co
if ((STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1)
&& GET_CODE (XEXP (varop, 0)) == ASHIFTRT
- && count == (GET_MODE_PRECISION (GET_MODE (varop)) - 1)
+ && count == (GET_MODE_PRECISION (int_varop_mode) - 1)
&& (code == LSHIFTRT || code == ASHIFTRT)
&& CONST_INT_P (XEXP (XEXP (varop, 0), 1))
&& INTVAL (XEXP (XEXP (varop, 0), 1)) == count
&& rtx_equal_p (XEXP (XEXP (varop, 0), 0), XEXP (varop, 1)))
{
count = 0;
- varop = gen_rtx_GT (GET_MODE (varop), XEXP (varop, 1),
+ varop = gen_rtx_GT (int_varop_mode, XEXP (varop, 1),
const0_rtx);
if (STORE_FLAG_VALUE == 1 ? code == ASHIFTRT : code == LSHIFTRT)
- varop = gen_rtx_NEG (GET_MODE (varop), varop);
+ varop = gen_rtx_NEG (int_varop_mode, varop);
continue;
}
@@ -11101,8 +11123,15 @@ simplify_shift_const_1 (enum rtx_code co
break;
}
- shift_mode = try_widen_shift_mode (code, varop, count, result_mode, mode,
- outer_op, outer_const);
+ shift_mode = result_mode;
+ if (shift_mode != mode)
+ {
+ /* We only change the modes of scalar shifts. */
+ int_mode = as_a <scalar_int_mode> (mode);
+ int_result_mode = as_a <scalar_int_mode> (result_mode);
+ shift_mode = try_widen_shift_mode (code, varop, count, int_result_mode,
+ int_mode, outer_op, outer_const);
+ }
/* We have now finished analyzing the shift. The result should be
a shift of type CODE with SHIFT_MODE shifting VAROP COUNT places. If
@@ -11137,8 +11166,9 @@ simplify_shift_const_1 (enum rtx_code co
/* If we were doing an LSHIFTRT in a wider mode than it was originally,
turn off all the bits that the shift would have turned off. */
if (orig_code == LSHIFTRT && result_mode != shift_mode)
- x = simplify_and_const_int (NULL_RTX, shift_mode, x,
- GET_MODE_MASK (result_mode) >> orig_count);
+ /* We only change the modes of scalar shifts. */
+ x = simplify_and_const_int (NULL_RTX, as_a <scalar_int_mode> (shift_mode),
+ x, GET_MODE_MASK (result_mode) >> orig_count);
/* Do the remainder of the processing in RESULT_MODE. */
x = gen_lowpart_or_truncate (result_mode, x);
@@ -11150,12 +11180,14 @@ simplify_shift_const_1 (enum rtx_code co
if (outer_op != UNKNOWN)
{
+ int_result_mode = as_a <scalar_int_mode> (result_mode);
+
if (GET_RTX_CLASS (outer_op) != RTX_UNARY
- && GET_MODE_PRECISION (result_mode) < HOST_BITS_PER_WIDE_INT)
- outer_const = trunc_int_for_mode (outer_const, result_mode);
+ && GET_MODE_PRECISION (int_result_mode) < HOST_BITS_PER_WIDE_INT)
+ outer_const = trunc_int_for_mode (outer_const, int_result_mode);
if (outer_op == AND)
- x = simplify_and_const_int (NULL_RTX, result_mode, x, outer_const);
+ x = simplify_and_const_int (NULL_RTX, int_result_mode, x, outer_const);
else if (outer_op == SET)
{
/* This means that we have determined that the result is
@@ -11164,9 +11196,9 @@ simplify_shift_const_1 (enum rtx_code co
x = GEN_INT (outer_const);
}
else if (GET_RTX_CLASS (outer_op) == RTX_UNARY)
- x = simplify_gen_unary (outer_op, result_mode, x, result_mode);
+ x = simplify_gen_unary (outer_op, int_result_mode, x, int_result_mode);
else
- x = simplify_gen_binary (outer_op, result_mode, x,
+ x = simplify_gen_binary (outer_op, int_result_mode, x,
GEN_INT (outer_const));
}
next prev parent reply other threads:[~2017-07-13 8:53 UTC|newest]
Thread overview: 175+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-13 8:35 [00/77] Add wrapper classes for machine_modes Richard Sandiford
2017-07-13 8:36 ` [01/77] Add an E_ prefix to mode names Richard Sandiford
2017-08-11 16:56 ` Jeff Law
2017-07-13 8:38 ` [03/77] Allow machine modes to be classes Richard Sandiford
2017-08-11 17:02 ` Jeff Law
2017-07-13 8:38 ` [02/77] Add an E_ prefix to mode names and update case statements Richard Sandiford
2017-08-11 17:01 ` Jeff Law
2017-07-13 8:39 ` [04/77] Add FOR_EACH iterators for modes Richard Sandiford
2017-08-11 17:30 ` Jeff Law
2017-08-11 17:51 ` Richard Sandiford
2017-08-11 17:57 ` Jeff Law
2017-08-11 18:09 ` Jeff Law
2017-07-13 8:39 ` [05/77] Small tweak to array_value_type Richard Sandiford
2017-08-11 17:50 ` Jeff Law
2017-07-13 8:40 ` [06/77] Make GET_MODE_WIDER return an opt_mode Richard Sandiford
2017-08-11 18:11 ` Jeff Law
2017-08-11 19:38 ` Richard Sandiford
2017-08-28 18:35 ` Jeff Law
2017-08-28 19:13 ` Richard Sandiford
2017-08-28 20:56 ` Jeff Law
2017-08-29 15:29 ` Richard Sandiford
2017-08-29 15:42 ` Jeff Law
2017-08-29 15:53 ` Richard Sandiford
2017-08-29 16:10 ` Jeff Law
2017-07-13 8:40 ` [07/77] Add scalar_float_mode Richard Sandiford
2017-08-11 18:12 ` Jeff Law
2017-07-13 8:41 ` [08/77] Simplify gen_trunc/extend_conv_libfunc Richard Sandiford
2017-08-11 18:13 ` Jeff Law
2017-07-13 8:41 ` [09/77] Add SCALAR_FLOAT_TYPE_MODE Richard Sandiford
2017-08-11 18:16 ` Jeff Law
2017-07-13 8:42 ` [11/77] Add a float_mode_for_size helper function Richard Sandiford
2017-08-11 18:19 ` Jeff Law
2017-07-13 8:42 ` [12/77] Use opt_scalar_float_mode when iterating over float modes Richard Sandiford
2017-08-11 19:14 ` Jeff Law
2017-07-13 8:42 ` [10/77] Make assemble_real take a scalar_float_mode Richard Sandiford
2017-08-11 18:16 ` Jeff Law
2017-07-13 8:43 ` [14/77] Make libgcc_floating_mode_supported_p " Richard Sandiford
2017-08-11 19:21 ` Jeff Law
2017-07-13 8:43 ` [13/77] Make floatn_mode return an opt_scalar_float_mode Richard Sandiford
2017-08-11 18:25 ` Jeff Law
2017-07-13 8:44 ` [17/77] Add an int_mode_for_size helper function Richard Sandiford
2017-08-14 18:51 ` Jeff Law
2017-07-13 8:44 ` [15/77] Add scalar_int_mode Richard Sandiford
2017-08-14 18:38 ` Jeff Law
2017-07-13 8:44 ` [16/77] Add scalar_int_mode_pod Richard Sandiford
2017-08-14 18:40 ` Jeff Law
2017-07-13 8:45 ` [18/77] Make int_mode_for_mode return an opt_scalar_int_mode Richard Sandiford
2017-08-14 19:16 ` Jeff Law
2017-07-13 8:45 ` [19/77] Add a smallest_int_mode_for_size helper function Richard Sandiford
2017-08-14 19:29 ` Jeff Law
2017-07-13 8:46 ` [20/77] Replace MODE_INT checks with is_int_mode Richard Sandiford
2017-08-14 19:32 ` Jeff Law
2017-07-13 8:46 ` [21/77] Replace SCALAR_INT_MODE_P checks with is_a <scalar_int_mode> Richard Sandiford
2017-08-14 20:21 ` Jeff Law
2017-07-13 8:46 ` [22/77] Replace !VECTOR_MODE_P " Richard Sandiford
2017-08-14 19:35 ` Jeff Law
2017-07-13 8:47 ` [24/77] Replace a != BLKmode check " Richard Sandiford
2017-08-14 19:50 ` Jeff Law
2017-07-13 8:47 ` [23/77] Replace != VOIDmode checks " Richard Sandiford
2017-08-14 19:50 ` Jeff Law
2017-07-13 8:48 ` [26/77] Use is_a <scalar_int_mode> in subreg/extract simplifications Richard Sandiford
2017-08-15 18:19 ` Jeff Law
2017-07-13 8:48 ` [25/77] Use is_a <scalar_int_mode> for bitmask optimisations Richard Sandiford
2017-08-14 20:06 ` Jeff Law
2017-07-13 8:48 ` [27/77] Use is_a <scalar_int_mode> before LOAD_EXTEND_OP Richard Sandiford
2017-08-14 20:47 ` Jeff Law
2017-07-13 8:49 ` [28/77] Use is_a <scalar_int_mode> for miscellaneous types of test Richard Sandiford
2017-08-15 19:23 ` Jeff Law
2017-07-13 8:49 ` [30/77] Use scalar_int_mode for doubleword splits Richard Sandiford
2017-08-14 21:28 ` Jeff Law
2017-07-13 8:49 ` [29/77] Make some *_loc_descriptor helpers take scalar_int_mode Richard Sandiford
2017-08-14 20:47 ` Jeff Law
2017-07-13 8:50 ` [33/77] Add a NARROWEST_INT_MODE macro Richard Sandiford
2017-08-14 23:46 ` Jeff Law
2017-07-13 8:50 ` [32/77] Check is_a <scalar_int_mode> before calling valid_pointer_mode Richard Sandiford
2017-08-14 21:37 ` Jeff Law
2017-07-13 8:50 ` [31/77] Use scalar_int_mode for move2add Richard Sandiford
2017-08-15 21:16 ` Jeff Law
2017-07-13 8:51 ` [34/77] Add a SCALAR_INT_TYPE_MODE macro Richard Sandiford
2017-08-15 21:19 ` Jeff Law
2017-07-13 8:51 ` [36/77] Use scalar_int_mode in the RTL iv routines Richard Sandiford
2017-08-16 17:27 ` Jeff Law
2017-07-13 8:51 ` [37/77] Use scalar_int_mode when emitting cstores Richard Sandiford
2017-08-15 23:29 ` Jeff Law
2017-07-13 8:51 ` [35/77] Add uses of as_a <scalar_int_mode> Richard Sandiford
2017-08-15 22:35 ` Jeff Law
2017-07-13 8:52 ` [38/77] Move SCALAR_INT_MODE_P out of strict_volatile_bitfield_p Richard Sandiford
2017-08-15 23:50 ` Jeff Law
2017-07-13 8:52 ` [39/77] Two changes to the get_best_mode interface Richard Sandiford
2017-08-16 17:50 ` Jeff Law
2017-07-13 8:52 ` [40/77] Use scalar_int_mode for extraction_insn fields Richard Sandiford
2017-08-16 18:25 ` Jeff Law
2017-07-13 8:53 ` [41/77] Split scalar integer handling out of force_to_mode Richard Sandiford
2017-08-16 18:29 ` Jeff Law
2017-07-13 8:53 ` Richard Sandiford [this message]
2017-08-16 18:46 ` [42/77] Use scalar_int_mode in simplify_shift_const_1 Jeff Law
2017-07-13 8:54 ` [46/77] Make widest_int_mode_for_size return a scalar_int_mode Richard Sandiford
2017-08-24 6:15 ` Jeff Law
2017-07-13 8:54 ` [43/77] Use scalar_int_mode in simplify_comparison Richard Sandiford
2017-08-24 4:29 ` Jeff Law
2017-07-13 8:54 ` [45/77] Make extract_left_shift take a scalar_int_mode Richard Sandiford
2017-08-24 4:30 ` Jeff Law
2017-07-13 8:54 ` [44/77] Make simplify_and_const_int " Richard Sandiford
2017-08-24 4:29 ` Jeff Law
2017-07-13 8:55 ` [49/77] Simplify nonzero/num_sign_bits hooks Richard Sandiford
2017-08-24 9:19 ` Jeff Law
2017-07-13 8:55 ` [47/77] Make subroutines of nonzero_bits operate on scalar_int_mode Richard Sandiford
2017-08-24 6:59 ` Jeff Law
2017-07-13 8:55 ` [48/77] Make subroutines of num_sign_bit_copies " Richard Sandiford
2017-08-24 9:19 ` Jeff Law
2017-07-13 8:56 ` [52/77] Use scalar_int_mode in extract/store_bit_field Richard Sandiford
2017-08-24 18:21 ` Jeff Law
2017-07-13 8:56 ` [51/77] Use opt_scalar_int_mode when iterating over integer modes Richard Sandiford
2017-08-24 17:28 ` Jeff Law
2017-07-13 8:56 ` [50/77] Add helper routines for SUBREG_PROMOTED_VAR_P subregs Richard Sandiford
2017-08-24 6:17 ` Jeff Law
2017-07-13 8:57 ` [54/77] Add explicit int checks for alternative optab implementations Richard Sandiford
2017-08-24 21:35 ` Jeff Law
2017-07-13 8:57 ` [53/77] Pass a mode to const_scalar_mask_from_tree Richard Sandiford
2017-08-24 6:21 ` Jeff Law
2017-07-13 8:58 ` [55/77] Use scalar_int_mode in simplify_const_unary_operation Richard Sandiford
2017-08-24 21:35 ` Jeff Law
2017-07-13 8:58 ` [57/77] Use scalar_int_mode in expand_expr_addr_expr Richard Sandiford
2017-08-24 21:36 ` Jeff Law
2017-07-13 8:58 ` [56/77] Use the more specific type when two modes are known to be equal Richard Sandiford
2017-08-24 6:22 ` Jeff Law
2017-07-13 8:59 ` [60/77] Pass scalar_int_modes to do_jump_by_parts_* Richard Sandiford
2017-08-24 21:52 ` Jeff Law
2017-07-13 8:59 ` [58/77] Use scalar_int_mode in a try_combine optimisation Richard Sandiford
2017-08-24 21:37 ` Jeff Law
2017-07-13 8:59 ` [59/77] Add a rtx_jump_table_data::get_data_mode helper Richard Sandiford
2017-08-24 21:39 ` Jeff Law
2017-07-13 9:00 ` [61/77] Use scalar_int_mode in the AArch64 port Richard Sandiford
2017-08-24 21:56 ` Jeff Law
2017-09-05 8:49 ` James Greenhalgh
2017-07-13 9:01 ` [63/77] Simplifications after type switch Richard Sandiford
2017-08-24 22:09 ` Jeff Law
2017-07-13 9:01 ` [62/77] Big machine_mode to scalar_int_mode replacement Richard Sandiford
2017-08-24 21:57 ` Jeff Law
2017-07-13 9:01 ` [64/77] Add a scalar_mode class Richard Sandiford
2017-08-25 5:03 ` Jeff Law
2017-07-13 9:02 ` [65/77] Add a SCALAR_TYPE_MODE macro Richard Sandiford
2017-08-25 5:04 ` Jeff Law
2017-07-13 9:02 ` [66/77] Use scalar_mode for constant integers Richard Sandiford
2017-08-25 5:05 ` Jeff Law
2017-08-30 12:56 ` Richard Sandiford
2017-07-13 9:02 ` [67/77] Use scalar_mode in fixed-value.* Richard Sandiford
2017-08-25 8:15 ` Jeff Law
2017-07-13 9:02 ` [68/77] Use scalar_mode for is_int_mode/is_float_mode pairs Richard Sandiford
2017-08-25 6:19 ` Jeff Law
2017-07-13 9:03 ` [71/77] Use opt_scalar_mode for mode iterators Richard Sandiford
2017-08-25 16:46 ` Jeff Law
2017-07-13 9:03 ` [70/77] Make expand_fix/float check for scalar modes Richard Sandiford
2017-08-25 8:53 ` Jeff Law
2017-07-13 9:03 ` [69/77] Split scalar-only part out of convert_mode Richard Sandiford
2017-08-25 8:21 ` Jeff Law
2017-07-13 9:04 ` [73/77] Pass scalar_mode to scalar_mode_supported_p Richard Sandiford
2017-08-25 16:46 ` Jeff Law
2017-07-13 9:04 ` [72/77] " Richard Sandiford
2017-08-25 16:46 ` Jeff Law
2017-07-13 9:05 ` [77/77] Add a complex_mode class Richard Sandiford
2017-08-25 17:43 ` Jeff Law
2017-07-13 9:05 ` [75/77] Use scalar_mode in the AArch64 port Richard Sandiford
2017-08-25 16:48 ` Jeff Law
2017-09-05 8:49 ` James Greenhalgh
2017-07-13 9:05 ` [76/77] Add a scalar_mode_pod class Richard Sandiford
2017-08-25 17:16 ` Jeff Law
2017-07-13 9:05 ` [74/77] Various small scalar_mode changes Richard Sandiford
2017-08-25 17:31 ` Jeff Law
2017-07-22 21:02 ` [00/77] Add wrapper classes for machine_modes Segher Boessenkool
2017-07-24 9:28 ` Richard Sandiford
2017-07-24 10:56 ` Segher Boessenkool
2017-07-24 12:53 ` Richard Sandiford
2017-07-24 13:42 ` Segher Boessenkool
2017-07-24 18:31 ` Richard Biener
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