From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 82921 invoked by alias); 5 Oct 2015 10:45:49 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 82859 invoked by uid 89); 5 Oct 2015 10:45:47 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.1 required=5.0 tests=AWL,BAYES_50,SPF_PASS autolearn=ham version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (146.101.78.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 05 Oct 2015 10:45:43 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-5-ALY-qsF5RAWJ04Xwe-y2ow-1; Mon, 05 Oct 2015 11:45:39 +0100 Received: from localhost ([10.1.2.79]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 5 Oct 2015 11:45:38 +0100 From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Subject: Remove remaining uses of CONST_DOUBLE_FROM_REAL_VALUE Date: Mon, 05 Oct 2015 10:45:00 -0000 Message-ID: <874mi5d25p.fsf@e105548-lin.cambridge.arm.com> User-Agent: Gnus/5.130012 (Ma Gnus v0.12) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 X-MC-Unique: ALY-qsF5RAWJ04Xwe-y2ow-1 Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable X-SW-Source: 2015-10/txt/msg00383.txt.bz2 This patch replaces all uses of CONST_DOUBLE_FROM_REAL_VALUE with the already-existing const_double_from_real_value. Bootstrapped & regression-tested on x86_64-linux-gnu. Also tested by building one target per CPU directory and checking that there were no new warnings and no changes in testsuite output at -O2. OK to install? Thanks, Richard gcc/ * real.h (CONST_DOUBLE_ATOF): Use const_double_from_real_value instead of CONST_DOUBLE_FROM_REAL_VALUE. (CONST_DOUBLE_FROM_REAL_VALUE): Delete. * config/c6x/c6x.md (divsf3, divdf3): Use const_double_from_real_value instead of CONST_DOUBLE_FROM_REAL_VALUE. * config/epiphany/epiphany.md (fixuns_truncsfsi2): Likewise. * config/i386/i386.c (standard_80387_constant_rtx): Likewise. (ix86_expand_builtin, ix86_emit_i387_log1p, ix86_emit_i387_round) (ix86_emit_swsqrtsf): Likewise. * config/ia64/ia64.c (ia64_expand_builtin): Likewise. * config/mips/mips.md (fixuns_truncdfsi2, fixuns_truncdfdi2) (fixuns_truncsfsi2, fixuns_truncsfdi2): Likewise. * config/pa/pa.c (pa_expand_builtin): Likewise. * config/rs6000/rs6000.c (rs6000_load_constant_and_splat): Likewise. (rs6000_scale_v2df): Likewise. * config/rs6000/rs6000.md (*cmptf_internal2): Likewise. * config/s390/s390.md (fixuns_truncdddi2, fixuns_trunctddi2) (fixuns_trunc2): Likewise. * config/s390/vx-builtins.md (vec_ctd_s64, vec_ctd_u64, vec_ctsl) (vec_ctul): Likewise. * config/sparc/sparc.c (sparc_emit_fixunsdi): Likewise. * config/spu/spu.c (hwint_to_const_double, spu_float_const): Likewise. * config/spu/spu.md (floatunsdisf2, floatunstisf2): Likewise. * cse.c (fold_rtx): Likewise. * emit-rtl.c (immed_double_const): Likewise (in comments). (init_emit_once): Likewise. * expr.c (compress_float_constant, expand_expr_real_1) (const_vector_from_tree): Likewise. * optabs.c (expand_float, expand_fix): Likewise. * reg-stack.c (reg_to_stack): Likewise. * simplify-rtx.c (avoid_constant_pool_reference): Likewise. (simplify_const_unary_operation, simplify_binary_operation_1) (simplify_const_binary_operation, simplify_relational_operation) (simplify_immed_subreg): Likewise. diff --git a/gcc/config/c6x/c6x.md b/gcc/config/c6x/c6x.md index 075968d..692d83f 100644 --- a/gcc/config/c6x/c6x.md +++ b/gcc/config/c6x/c6x.md @@ -2811,7 +2811,7 @@ "TARGET_FP && flag_reciprocal_math" { operands[3] =3D force_reg (SFmode, - CONST_DOUBLE_FROM_REAL_VALUE (dconst2, SFmode)); + const_double_from_real_value (dconst2, SFmode)); operands[4] =3D gen_reg_rtx (SFmode); operands[5] =3D gen_reg_rtx (SFmode); operands[6] =3D gen_reg_rtx (SFmode); @@ -2836,7 +2836,7 @@ "TARGET_FP && flag_reciprocal_math" { operands[3] =3D force_reg (DFmode, - CONST_DOUBLE_FROM_REAL_VALUE (dconst2, DFmode)); + const_double_from_real_value (dconst2, DFmode)); operands[4] =3D gen_reg_rtx (DFmode); operands[5] =3D gen_reg_rtx (DFmode); operands[6] =3D gen_reg_rtx (DFmode); diff --git a/gcc/config/epiphany/epiphany.md b/gcc/config/epiphany/epiphany= .md index 4280926..4c8b5d6 100644 --- a/gcc/config/epiphany/epiphany.md +++ b/gcc/config/epiphany/epiphany.md @@ -982,7 +982,7 @@ rtx cmp =3D gen_rtx_LT (VOIDmode, cc1, CONST0_RTX (SFmode)); =20 real_2expN (&offset, 31, SFmode); - limit =3D CONST_DOUBLE_FROM_REAL_VALUE (offset, SFmode); + limit =3D const_double_from_real_value (offset, SFmode); limit =3D force_reg (SFmode, limit); emit_insn (gen_fix_truncsfsi2 (operands[0], operands[1])); emit_insn (gen_subsf3_f (tmp, operands[1], limit)); diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 44847b4..ff52779 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -10573,7 +10573,7 @@ standard_80387_constant_rtx (int idx) gcc_unreachable (); } =20 - return CONST_DOUBLE_FROM_REAL_VALUE (ext_80387_constants_table[i], + return const_double_from_real_value (ext_80387_constants_table[i], XFmode); } =20 @@ -40143,7 +40143,7 @@ ix86_expand_builtin (tree exp, rtx target, rtx subt= arget, rtx tmp; =20 real_inf (&inf); - tmp =3D CONST_DOUBLE_FROM_REAL_VALUE (inf, mode); + tmp =3D const_double_from_real_value (inf, mode); =20 tmp =3D validize_mem (force_const_mem (mode, tmp)); =20 @@ -47021,7 +47021,7 @@ void ix86_emit_i387_log1p (rtx op0, rtx op1) =20 emit_insn (gen_absxf2 (tmp, op1)); test =3D gen_rtx_GE (VOIDmode, tmp, - CONST_DOUBLE_FROM_REAL_VALUE ( + const_double_from_real_value ( REAL_VALUE_ATOF ("0.29289321881345247561810596348408353", XFmode), XFmode)); emit_jump_insn (gen_cbranchxf4 (test, XEXP (test, 0), XEXP (test, 1), la= bel1)); @@ -47095,7 +47095,7 @@ void ix86_emit_i387_round (rtx op0, rtx op1) e2 =3D gen_reg_rtx (inmode); res =3D gen_reg_rtx (outmode); =20 - half =3D CONST_DOUBLE_FROM_REAL_VALUE (dconsthalf, inmode); + half =3D const_double_from_real_value (dconsthalf, inmode); =20 /* round(a) =3D sgn(a) * floor(fabs(a) + 0.5) */ =20 @@ -47227,10 +47227,10 @@ void ix86_emit_swsqrtsf (rtx res, rtx a, machine_= mode mode, e3 =3D gen_reg_rtx (mode); =20 real_from_integer (&r, VOIDmode, -3, SIGNED); - mthree =3D CONST_DOUBLE_FROM_REAL_VALUE (r, SFmode); + mthree =3D const_double_from_real_value (r, SFmode); =20 real_arithmetic (&r, NEGATE_EXPR, &dconsthalf, NULL); - mhalf =3D CONST_DOUBLE_FROM_REAL_VALUE (r, SFmode); + mhalf =3D const_double_from_real_value (r, SFmode); unspec =3D UNSPEC_RSQRT; =20 if (VECTOR_MODE_P (mode)) diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c index 779fc58..99c965a 100644 --- a/gcc/config/ia64/ia64.c +++ b/gcc/config/ia64/ia64.c @@ -10473,7 +10473,7 @@ ia64_expand_builtin (tree exp, rtx target, rtx subt= arget ATTRIBUTE_UNUSED, rtx tmp; =20 real_inf (&inf); - tmp =3D CONST_DOUBLE_FROM_REAL_VALUE (inf, target_mode); + tmp =3D const_double_from_real_value (inf, target_mode); =20 tmp =3D validize_mem (force_const_mem (target_mode, tmp)); =20 diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 1d1c42b..3ad41c6 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -3976,7 +3976,7 @@ =20 if (reg1) /* Turn off complaints about unreached code. */ { - mips_emit_move (reg1, CONST_DOUBLE_FROM_REAL_VALUE (offset, DFmode)); + mips_emit_move (reg1, const_double_from_real_value (offset, DFmode)); do_pending_stack_adjust (); =20 test =3D gen_rtx_GE (VOIDmode, operands[1], reg1); @@ -4020,7 +4020,7 @@ =20 real_2expN (&offset, 63, DFmode); =20 - mips_emit_move (reg1, CONST_DOUBLE_FROM_REAL_VALUE (offset, DFmode)); + mips_emit_move (reg1, const_double_from_real_value (offset, DFmode)); do_pending_stack_adjust (); =20 test =3D gen_rtx_GE (VOIDmode, operands[1], reg1); @@ -4062,7 +4062,7 @@ =20 real_2expN (&offset, 31, SFmode); =20 - mips_emit_move (reg1, CONST_DOUBLE_FROM_REAL_VALUE (offset, SFmode)); + mips_emit_move (reg1, const_double_from_real_value (offset, SFmode)); do_pending_stack_adjust (); =20 test =3D gen_rtx_GE (VOIDmode, operands[1], reg1); @@ -4104,7 +4104,7 @@ =20 real_2expN (&offset, 63, SFmode); =20 - mips_emit_move (reg1, CONST_DOUBLE_FROM_REAL_VALUE (offset, SFmode)); + mips_emit_move (reg1, const_double_from_real_value (offset, SFmode)); do_pending_stack_adjust (); =20 test =3D gen_rtx_GE (VOIDmode, operands[1], reg1); diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c index 38daa5f..0dc0931 100644 --- a/gcc/config/pa/pa.c +++ b/gcc/config/pa/pa.c @@ -652,7 +652,7 @@ pa_expand_builtin (tree exp, rtx target, rtx subtarget = ATTRIBUTE_UNUSED, rtx tmp; =20 real_inf (&inf); - tmp =3D CONST_DOUBLE_FROM_REAL_VALUE (inf, target_mode); + tmp =3D const_double_from_real_value (inf, target_mode); =20 tmp =3D validize_mem (force_const_mem (target_mode, tmp)); =20 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index e408295..3b4820b 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -31849,19 +31849,19 @@ rs6000_load_constant_and_splat (machine_mode mode= , REAL_VALUE_TYPE dconst) =20 if (mode =3D=3D SFmode || mode =3D=3D DFmode) { - rtx d =3D CONST_DOUBLE_FROM_REAL_VALUE (dconst, mode); + rtx d =3D const_double_from_real_value (dconst, mode); reg =3D force_reg (mode, d); } else if (mode =3D=3D V4SFmode) { - rtx d =3D CONST_DOUBLE_FROM_REAL_VALUE (dconst, SFmode); + rtx d =3D const_double_from_real_value (dconst, SFmode); rtvec v =3D gen_rtvec (4, d, d, d, d); reg =3D gen_reg_rtx (mode); rs6000_expand_vector_init (reg, gen_rtx_PARALLEL (mode, v)); } else if (mode =3D=3D V2DFmode) { - rtx d =3D CONST_DOUBLE_FROM_REAL_VALUE (dconst, DFmode); + rtx d =3D const_double_from_real_value (dconst, DFmode); rtvec v =3D gen_rtvec (2, d, d); reg =3D gen_reg_rtx (mode); rs6000_expand_vector_init (reg, gen_rtx_PARALLEL (mode, v)); @@ -32699,7 +32699,7 @@ rs6000_scale_v2df (rtx tgt, rtx src, int scale) rtx elt; rtx scale_vec =3D gen_reg_rtx (V2DFmode); (void)real_powi (&r_pow, DFmode, &dconst2, hwi_scale); - elt =3D CONST_DOUBLE_FROM_REAL_VALUE (r_pow, DFmode); + elt =3D const_double_from_real_value (r_pow, DFmode); RTVEC_ELT (v, 0) =3D elt; RTVEC_ELT (v, 1) =3D elt; rs6000_expand_vector_init (scale_vec, gen_rtx_PARALLEL (V2DFmode, v)); diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 8c53c40..df9d48e 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -10582,9 +10582,9 @@ operands[13] =3D gen_label_rtx (); real_inf (&rv); operands[14] =3D force_const_mem (DFmode, - CONST_DOUBLE_FROM_REAL_VALUE (rv, DFmode)); + const_double_from_real_value (rv, DFmode)); operands[15] =3D force_const_mem (DFmode, - CONST_DOUBLE_FROM_REAL_VALUE (dconst0, + const_double_from_real_value (dconst0, DFmode)); if (TARGET_TOC) { diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 2be7653..1822459 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -4437,10 +4437,10 @@ emit_insn (gen_extendddtd2 (temp, operands[1])); temp =3D force_reg (TDmode, temp); emit_cmp_and_jump_insns (temp, - CONST_DOUBLE_FROM_REAL_VALUE (cmp, TDmode), + const_double_from_real_value (cmp, TDmode), LT, NULL_RTX, VOIDmode, 0, label1); emit_insn (gen_subtd3 (temp, temp, - CONST_DOUBLE_FROM_REAL_VALUE (sub, TDmode))); + const_double_from_real_value (sub, TDmode))); emit_insn (gen_fix_trunctddi2_dfp (operands[0], temp, GEN_INT (11))); emit_jump (label2); =20 @@ -4472,10 +4472,10 @@ decimal_real_from_string (&sub, "18446744073709551616.0"); /* 2^64 */ =20 emit_cmp_and_jump_insns (operands[1], - CONST_DOUBLE_FROM_REAL_VALUE (cmp, TDmode), + const_double_from_real_value (cmp, TDmode), LT, NULL_RTX, VOIDmode, 0, label1); emit_insn (gen_subtd3 (temp, operands[1], - CONST_DOUBLE_FROM_REAL_VALUE (sub, TDmode))); + const_double_from_real_value (sub, TDmode))); emit_insn (gen_fix_trunctddi2_dfp (operands[0], temp, GEN_INT (11))); emit_jump (label2); =20 @@ -4511,10 +4511,10 @@ real_2expN (&sub, , mode); =20 emit_cmp_and_jump_insns (operands[1], - CONST_DOUBLE_FROM_REAL_VALUE (cmp, mode), + const_double_from_real_value (cmp, mode), LT, NULL_RTX, VOIDmode, 0, label1); emit_insn (gen_sub3 (temp, operands[1], - CONST_DOUBLE_FROM_REAL_VALUE (sub, mode))); + const_double_from_real_value (sub, mode))); emit_insn (gen_fix_trunc2_bfp (operands[0], temp, GEN_INT (7))); emit_jump (label2); diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md index 7e20d2b..ff7408a 100644 --- a/gcc/config/s390/vx-builtins.md +++ b/gcc/config/s390/vx-builtins.md @@ -1669,7 +1669,7 @@ rtx c; =20 real_2expN (&f, -INTVAL (operands[2]), DFmode); - c =3D CONST_DOUBLE_FROM_REAL_VALUE (f, DFmode); + c =3D const_double_from_real_value (f, DFmode); =20 operands[3] =3D gen_rtx_CONST_VECTOR (V2DFmode, gen_rtvec (2, c, c)); operands[3] =3D force_reg (V2DFmode, operands[3]); @@ -1699,7 +1699,7 @@ rtx c; =20 real_2expN (&f, -INTVAL (operands[2]), DFmode); - c =3D CONST_DOUBLE_FROM_REAL_VALUE (f, DFmode); + c =3D const_double_from_real_value (f, DFmode); =20 operands[3] =3D gen_rtx_CONST_VECTOR (V2DFmode, gen_rtvec (2, c, c)); operands[3] =3D force_reg (V2DFmode, operands[3]); @@ -1730,7 +1730,7 @@ rtx c; =20 real_2expN (&f, INTVAL (operands[2]), DFmode); - c =3D CONST_DOUBLE_FROM_REAL_VALUE (f, DFmode); + c =3D const_double_from_real_value (f, DFmode); =20 operands[3] =3D gen_rtx_CONST_VECTOR (V2DFmode, gen_rtvec (2, c, c)); operands[3] =3D force_reg (V2DFmode, operands[3]); @@ -1761,7 +1761,7 @@ rtx c; =20 real_2expN (&f, INTVAL (operands[2]), DFmode); - c =3D CONST_DOUBLE_FROM_REAL_VALUE (f, DFmode); + c =3D const_double_from_real_value (f, DFmode); =20 operands[3] =3D gen_rtx_CONST_VECTOR (V2DFmode, gen_rtvec (2, c, c)); operands[3] =3D force_reg (V2DFmode, operands[3]); diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 43f0170..a7fe546 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -8067,7 +8067,7 @@ sparc_emit_fixunsdi (rtx *operands, machine_mode mode) f0 =3D gen_reg_rtx (mode); =20 emit_move_insn (limit, - CONST_DOUBLE_FROM_REAL_VALUE ( + const_double_from_real_value ( REAL_VALUE_ATOF ("9223372036854775808.0", mode), mode)); emit_cmp_and_jump_insns (in, limit, GE, NULL_RTX, mode, 0, neglab); =20 diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c index bdedecc..62faff6 100644 --- a/gcc/config/spu/spu.c +++ b/gcc/config/spu/spu.c @@ -1031,7 +1031,7 @@ hwint_to_const_double (machine_mode mode, HOST_WIDE_I= NT v) tv[0] =3D v >> 32; } real_from_target (&rv, tv, mode); - return CONST_DOUBLE_FROM_REAL_VALUE (rv, mode); + return const_double_from_real_value (rv, mode); } =20 void @@ -3075,7 +3075,7 @@ spu_float_const (const char *string, machine_mode mod= e) { REAL_VALUE_TYPE value; value =3D REAL_VALUE_ATOF (string, mode); - return CONST_DOUBLE_FROM_REAL_VALUE (value, mode); + return const_double_from_real_value (value, mode); } =20 int diff --git a/gcc/config/spu/spu.md b/gcc/config/spu/spu.md index 1416706..761dbc8 100644 --- a/gcc/config/spu/spu.md +++ b/gcc/config/spu/spu.md @@ -751,7 +751,7 @@ emit_insn (gen_shlqby_ti (op3_ti, op2_ti, GEN_INT (4))); =20 emit_move_insn (operands[4], - CONST_DOUBLE_FROM_REAL_VALUE (scale, SFmode)); + const_double_from_real_value (scale, SFmode)); emit_insn (gen_fmasf4 (operands[0], operands[2], operands[4], operands[3])); DONE; @@ -810,7 +810,7 @@ emit_insn (gen_shlqby_ti (op3_ti, op2_ti, GEN_INT (4))); =20 emit_move_insn (operands[4], - CONST_DOUBLE_FROM_REAL_VALUE (scale, SFmode)); + const_double_from_real_value (scale, SFmode)); emit_insn (gen_fmasf4 (operands[2], operands[2], operands[4], operands[3])); =20 diff --git a/gcc/cse.c b/gcc/cse.c index ef37579..a9cc26a 100644 --- a/gcc/cse.c +++ b/gcc/cse.c @@ -3342,7 +3342,7 @@ fold_rtx (rtx x, rtx_insn *insn) if (SCALAR_FLOAT_MODE_P (mode)) { #ifdef FLOAT_STORE_FLAG_VALUE - true_rtx =3D (CONST_DOUBLE_FROM_REAL_VALUE + true_rtx =3D (const_double_from_real_value (FLOAT_STORE_FLAG_VALUE (mode), mode)); #else true_rtx =3D NULL_RTX; diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c index a6ef154..c418c24 100644 --- a/gcc/emit-rtl.c +++ b/gcc/emit-rtl.c @@ -648,7 +648,7 @@ immed_wide_int_const (const wide_int_ref &v, machine_mo= de mode) implied upper bits are copies of the high bit of i1. The value itself is neither signed nor unsigned. Do not use this routine for non-integer modes; convert to REAL_VALUE_TYPE and use - CONST_DOUBLE_FROM_REAL_VALUE. */ + const_double_from_real_value. */ =20 rtx immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, machine_mode mode) @@ -5936,13 +5936,13 @@ init_emit_once (void) mode !=3D VOIDmode; mode =3D GET_MODE_WIDER_MODE (mode)) const_tiny_rtx[i][(int) mode] =3D - CONST_DOUBLE_FROM_REAL_VALUE (*r, mode); + const_double_from_real_value (*r, mode); =20 for (mode =3D GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT); mode !=3D VOIDmode; mode =3D GET_MODE_WIDER_MODE (mode)) const_tiny_rtx[i][(int) mode] =3D - CONST_DOUBLE_FROM_REAL_VALUE (*r, mode); + const_double_from_real_value (*r, mode); =20 const_tiny_rtx[i][(int) VOIDmode] =3D GEN_INT (i); =20 diff --git a/gcc/expr.c b/gcc/expr.c index 0bbfccd..6bb24c0 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -3654,7 +3654,7 @@ compress_float_constant (rtx x, rtx y) if (! exact_real_truncate (srcmode, &r)) continue; =20 - trunc_y =3D CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode); + trunc_y =3D const_double_from_real_value (r, srcmode); =20 if (targetm.legitimate_constant_p (srcmode, trunc_y)) { @@ -9708,7 +9708,7 @@ expand_expr_real_1 (tree exp, rtx target, machine_mod= e tmode, many insns, so we'd end up copying it to a register in any case. =20 Now, we do the copying in expand_binop, if appropriate. */ - return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp), + return const_double_from_real_value (TREE_REAL_CST (exp), TYPE_MODE (TREE_TYPE (exp))); =20 case FIXED_CST: @@ -11339,7 +11339,7 @@ const_vector_from_tree (tree exp) elt =3D VECTOR_CST_ELT (exp, i); =20 if (TREE_CODE (elt) =3D=3D REAL_CST) - RTVEC_ELT (v, i) =3D CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt), + RTVEC_ELT (v, i) =3D const_double_from_real_value (TREE_REAL_CST (elt), inner); else if (TREE_CODE (elt) =3D=3D FIXED_CST) RTVEC_ELT (v, i) =3D CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt), diff --git a/gcc/optabs.c b/gcc/optabs.c index c49d66b..223daf7 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -4605,7 +4605,7 @@ expand_float (rtx to, rtx from, int unsignedp) =20 real_2expN (&offset, GET_MODE_PRECISION (GET_MODE (from)), fmode); temp =3D expand_binop (fmode, add_optab, target, - CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode), + const_double_from_real_value (offset, fmode), target, 0, OPTAB_LIB_WIDEN); if (temp !=3D target) emit_move_insn (target, temp); @@ -4748,7 +4748,7 @@ expand_fix (rtx to, rtx from, int unsignedp) =20 bitsize =3D GET_MODE_PRECISION (GET_MODE (to)); real_2expN (&offset, bitsize - 1, fmode); - limit =3D CONST_DOUBLE_FROM_REAL_VALUE (offset, fmode); + limit =3D const_double_from_real_value (offset, fmode); lab1 =3D gen_label_rtx (); lab2 =3D gen_label_rtx (); =20 diff --git a/gcc/real.h b/gcc/real.h index 0ce3270..24fb18d 100644 --- a/gcc/real.h +++ b/gcc/real.h @@ -382,7 +382,7 @@ extern REAL_VALUE_TYPE real_from_string2 (const char *,= machine_mode); real_from_string2 (s, m) =20 #define CONST_DOUBLE_ATOF(s, m) \ - CONST_DOUBLE_FROM_REAL_VALUE (real_from_string2 (s, m), m) + const_double_from_real_value (real_from_string2 (s, m), m) =20 #define REAL_VALUE_FIX(r) \ real_to_integer (&(r)) @@ -431,8 +431,6 @@ REAL_VALUE_TYPE real_value_from_int_cst (const_tree, co= nst_tree); ((to) =3D *CONST_DOUBLE_REAL_VALUE (from)) =20 /* Return a CONST_DOUBLE with value R and mode M. */ -#define CONST_DOUBLE_FROM_REAL_VALUE(r, m) \ - const_double_from_real_value (r, m) extern rtx const_double_from_real_value (REAL_VALUE_TYPE, machine_mode); =20 /* Replace R by 1/R in the given machine mode, if the result is exact. */ diff --git a/gcc/reg-stack.c b/gcc/reg-stack.c index 3944041..3ff8173 100644 --- a/gcc/reg-stack.c +++ b/gcc/reg-stack.c @@ -3241,7 +3241,7 @@ reg_to_stack (void) REAL_VALUE_TYPE r; =20 real_nan (&r, "", 1, SFmode); - not_a_num =3D CONST_DOUBLE_FROM_REAL_VALUE (r, SFmode); + not_a_num =3D const_double_from_real_value (r, SFmode); not_a_num =3D force_const_mem (SFmode, not_a_num); } =20 diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index 96eaae7..84a4bad 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -228,7 +228,7 @@ avoid_constant_pool_reference (rtx x) REAL_VALUE_TYPE d; =20 REAL_VALUE_FROM_CONST_DOUBLE (d, c); - return CONST_DOUBLE_FROM_REAL_VALUE (d, GET_MODE (x)); + return const_double_from_real_value (d, GET_MODE (x)); } return x; =20 @@ -1684,7 +1684,7 @@ simplify_const_unary_operation (enum rtx_code code, m= achine_mode mode, =20 real_from_integer (&d, mode, std::make_pair (op, op_mode), SIGNED); d =3D real_value_truncate (mode, d); - return CONST_DOUBLE_FROM_REAL_VALUE (d, mode); + return const_double_from_real_value (d, mode); } else if (code =3D=3D UNSIGNED_FLOAT && CONST_SCALAR_INT_P (op)) { @@ -1702,7 +1702,7 @@ simplify_const_unary_operation (enum rtx_code code, m= achine_mode mode, =20 real_from_integer (&d, mode, std::make_pair (op, op_mode), UNSIGNED); d =3D real_value_truncate (mode, d); - return CONST_DOUBLE_FROM_REAL_VALUE (d, mode); + return const_double_from_real_value (d, mode); } =20 if (CONST_SCALAR_INT_P (op) && width > 0) @@ -1832,7 +1832,7 @@ simplify_const_unary_operation (enum rtx_code code, m= achine_mode mode, default: gcc_unreachable (); } - return CONST_DOUBLE_FROM_REAL_VALUE (d, mode); + return const_double_from_real_value (d, mode); } else if (CONST_DOUBLE_AS_FLOAT_P (op) && SCALAR_FLOAT_MODE_P (GET_MODE (op)) @@ -3112,7 +3112,7 @@ simplify_binary_operation_1 (enum rtx_code code, mach= ine_mode mode, && !real_equal (&d, &dconst0)) { real_arithmetic (&d, RDIV_EXPR, &dconst1, &d); - tem =3D CONST_DOUBLE_FROM_REAL_VALUE (d, mode); + tem =3D const_double_from_real_value (d, mode); return simplify_gen_binary (MULT, mode, op0, tem); } } @@ -3855,7 +3855,7 @@ simplify_const_binary_operation (enum rtx_code code, = machine_mode mode, } } real_from_target (&r, tmp0, mode); - return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); + return const_double_from_real_value (r, mode); } else { @@ -3936,7 +3936,7 @@ simplify_const_binary_operation (enum rtx_code code, = machine_mode mode, && (inexact || !real_identical (&result, &value))) return NULL_RTX; =20 - return CONST_DOUBLE_FROM_REAL_VALUE (result, mode); + return const_double_from_real_value (result, mode); } } =20 @@ -4462,7 +4462,7 @@ simplify_relational_operation (enum rtx_code code, ma= chine_mode mode, { REAL_VALUE_TYPE val; val =3D FLOAT_STORE_FLAG_VALUE (mode); - return CONST_DOUBLE_FROM_REAL_VALUE (val, mode); + return const_double_from_real_value (val, mode); } #else return NULL_RTX; @@ -5760,7 +5760,7 @@ simplify_immed_subreg (machine_mode outermode, rtx op, } =20 real_from_target (&r, tmp, outer_submode); - elems[elem] =3D CONST_DOUBLE_FROM_REAL_VALUE (r, outer_submode); + elems[elem] =3D const_double_from_real_value (r, outer_submode); } break; =20