From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from esa3.mentor.iphmx.com (esa3.mentor.iphmx.com [68.232.137.180]) by sourceware.org (Postfix) with ESMTPS id 532683858D20 for ; Wed, 15 Nov 2023 14:37:03 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 532683858D20 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=codesourcery.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=mentor.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 532683858D20 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=68.232.137.180 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700059025; cv=none; b=HGpGRaiAqVBDOMxd/yRqWX/vLmQWcu50S+uHBzq7fPgXlpskKZ8twPOrU0PgotyZi3OatAHnIGvFLCDXvDi9ZRqxjHJSr9qBQo+8XIl54U9w1no/K1Zd29C7dHLJPTcTFSWY5teKzjbrHPKbJ+CBzcfuyywDn83HjGlxydeerIA= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700059025; c=relaxed/simple; bh=ovlvMriWJ5+4dybs9J5F4Dbx7YtqymWNJK4Bqw1CMTI=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=MxZu+XSeizmc0tlhmBXNddJNu/7WVrZBT7noXMgjV1h/aLoMAY6+/TYdxOow2FiwtN9XLTiOpGVQBxIZdnWNah7z8Lu3mHfh/KaEbYvjq1//jt1vtbWmAxLMVYxsSyRe6gtm10DQ44nruJ1Ybo/L0OtX+EQdzlVNd29EnXITF7g= ARC-Authentication-Results: i=1; server2.sourceware.org X-CSE-ConnectionGUID: Y2LOlUcWRyuQAdZkkeG7Iw== X-CSE-MsgGUID: Tu0VorePSQGzDHvpM9IAOA== X-IronPort-AV: E=Sophos;i="6.03,305,1694764800"; d="scan'208,223";a="22839995" Received: from orw-gwy-02-in.mentorg.com ([192.94.38.167]) by esa3.mentor.iphmx.com with ESMTP; 15 Nov 2023 06:36:56 -0800 IronPort-SDR: 7qVRPHDbC8RLfGoVqzf/WS/562JOZ8LgKet1SuKBw5EWZass2cIlJmLLfzlCjI5WONJ7F0yfD1 XnT5pUtNQZTYOckBMoS/ukVV+WTjqVPAlw3/wTp91M/qAuqU8koCdINGCvIG3Xmiovt3m7IxwL pJpz+gRYTq75bJz6WUukWHqhYKI8i7hLEoll6x7mfmEeF+Ar+Oaa4hGOA4HIzJZ6KIfih+6MHn r6r6H2/OSUW/vCnKIqXKvmY9olr2OPDpQ91gI+ZFgaoDYn4pGrq2WaHrAyfdtBvC27FdOp9hk+ +OI= From: Thomas Schwinge To: Roger Sayle , CC: Tom de Vries Subject: nvptx: Fix copy'n'paste-o in '__builtin_nvptx_brev' description (was: [PATCH] nvptx: Add suppport for __builtin_nvptx_brev instrinsic) In-Reply-To: <007301d98034$82486ea0$86d94be0$@nextmovesoftware.com> References: <007301d98034$82486ea0$86d94be0$@nextmovesoftware.com> User-Agent: Notmuch/0.29.3+94~g74c3f1b (https://notmuchmail.org) Emacs/28.2 (x86_64-pc-linux-gnu) Date: Wed, 15 Nov 2023 15:36:50 +0100 Message-ID: <875y23ulq5.fsf@euler.schwinge.homeip.net> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="=-=-=" X-Originating-IP: [137.202.0.90] X-ClientProxiedBy: svr-ies-mbx-11.mgc.mentorg.com (139.181.222.11) To svr-ies-mbx-10.mgc.mentorg.com (139.181.222.10) X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00,GIT_PATCH_0,HEADER_FROM_DIFFERENT_DOMAINS,KAM_DMARC_STATUS,SPF_HELO_PASS,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: --=-=-= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Hi! On 2023-05-06T17:04:57+0100, "Roger Sayle" wro= te: > This patch adds support for (a pair of) bit reversal intrinsics > __builtin_nvptx_brev and __builtin_nvptx_brevll which perform 32-bit > and 64-bit bit reversal (using nvptx's brev instruction) matching > the __brev and __brevll instrinsics provided by NVidia's nvcc compiler. > https://docs.nvidia.com/cuda/cuda-math-api/group__CUDA__MATH__INTRINSIC__= INT.html (That got pushed in commit c09471fbc7588db2480f036aa56a2403d3c03ae5 "nvptx: Add suppport for __builtin_nvptx_brev instrinsic".) > --- a/gcc/doc/extend.texi > +++ b/gcc/doc/extend.texi > @@ -17941,6 +17942,20 @@ Enable global interrupt. > Disable global interrupt. > @enddefbuiltin > > +@node Nvidia PTX Built-in Functions > +@subsection Nvidia PTX Built-in Functions > + > +These built-in functions are available for the Nvidia PTX target: > + > +@defbuiltin{unsigned int __builtin_nvptx_brev (unsigned int @var{x})} > +Reverse the bit order of a 32-bit unsigned integer. > +Disable global interrupt. Pushed to master branch commit 4450984d0a18cd4e352d396231ba2c457d20feea "nvptx: Fix copy'n'paste-o in '__builtin_nvptx_brev' description", see attached. > +@enddefbuiltin > + > +@defbuiltin{unsigned long long __builtin_nvptx_brevll (unsigned long lon= g @var{x})} > +Reverse the bit order of a 64-bit unsigned integer. > +@enddefbuiltin > + > @node Basic PowerPC Built-in Functions > @subsection Basic PowerPC Built-in Functions Gr=C3=BC=C3=9Fe Thomas ----------------- Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstra=C3=9Fe 201= , 80634 M=C3=BCnchen; Gesellschaft mit beschr=C3=A4nkter Haftung; Gesch=C3= =A4ftsf=C3=BChrer: Thomas Heurung, Frank Th=C3=BCrauf; Sitz der Gesellschaf= t: M=C3=BCnchen; Registergericht M=C3=BCnchen, HRB 106955 --=-=-= Content-Type: text/x-diff Content-Disposition: inline; filename="0001-nvptx-Fix-copy-n-paste-o-in-__builtin_nvptx_brev-des.patch" >From 4450984d0a18cd4e352d396231ba2c457d20feea Mon Sep 17 00:00:00 2001 From: Thomas Schwinge Date: Mon, 4 Sep 2023 17:20:28 +0200 Subject: [PATCH] nvptx: Fix copy'n'paste-o in '__builtin_nvptx_brev' description Minor fix-up for commit c09471fbc7588db2480f036aa56a2403d3c03ae5 "nvptx: Add suppport for __builtin_nvptx_brev instrinsic". gcc/ * doc/extend.texi (Nvidia PTX Built-in Functions): Fix copy'n'paste-o in '__builtin_nvptx_brev' description. --- gcc/doc/extend.texi | 1 - 1 file changed, 1 deletion(-) diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 406ccc9bc75..a95121b0124 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -18471,7 +18471,6 @@ These built-in functions are available for the Nvidia PTX target: @defbuiltin{unsigned int __builtin_nvptx_brev (unsigned int @var{x})} Reverse the bit order of a 32-bit unsigned integer. -Disable global interrupt. @enddefbuiltin @defbuiltin{unsigned long long __builtin_nvptx_brevll (unsigned long long @var{x})} -- 2.34.1 --=-=-=--