From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 51553 invoked by alias); 3 Jan 2019 13:06:15 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 51542 invoked by uid 89); 3 Jan 2019 13:06:14 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:1521 X-HELO: foss.arm.com Received: from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 03 Jan 2019 13:06:13 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 10A07EBD; Thu, 3 Jan 2019 05:06:12 -0800 (PST) Received: from localhost (unknown [10.32.98.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C37813F5D4; Thu, 3 Jan 2019 05:06:10 -0800 (PST) From: Richard Sandiford To: Jakub Jelinek Mail-Followup-To: Jakub Jelinek ,Richard Biener , Jason Merrill , "Joseph S. Myers" , Jan Hubicka , gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Cc: Richard Biener , Jason Merrill , "Joseph S. Myers" , Jan Hubicka , gcc-patches@gcc.gnu.org Subject: Re: [PATCH] Add __builtin_convertvector support (PR c++/85052) References: <20190103100640.GM30353@tucnak> Date: Thu, 03 Jan 2019 13:06:00 -0000 In-Reply-To: <20190103100640.GM30353@tucnak> (Jakub Jelinek's message of "Thu, 3 Jan 2019 11:06:40 +0100") Message-ID: <875zv5sxfi.fsf@arm.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.1 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2019-01/txt/msg00102.txt.bz2 Jakub Jelinek writes: > + /* Can't use get_compute_type here, as supportable_convert_operation > + doesn't necessarily use an optab and needs two arguments. */ > + tree vector_compute_type > + = type_for_widest_vector_mode (TREE_TYPE (arg_type), mov_optab); > + unsigned HOST_WIDE_INT nelts; > + if (vector_compute_type > + && VECTOR_MODE_P (TYPE_MODE (vector_compute_type)) > + && subparts_gt (arg_type, vector_compute_type) > + && TYPE_VECTOR_SUBPARTS (vector_compute_type).is_constant (&nelts)) > + { > + while (nelts > 1) > + { > + tree ret1_type = build_vector_type (TREE_TYPE (ret_type), nelts); > + tree arg1_type = build_vector_type (TREE_TYPE (arg_type), nelts); > + if (supportable_convert_operation (code, ret1_type, arg1_type, > + &decl, &code1)) > + { > + new_rhs = expand_vector_piecewise (gsi, do_vec_conversion, > + ret_type, arg1_type, arg, > + decl, code1); > + g = gimple_build_assign (lhs, new_rhs); > + gsi_replace (gsi, g, false); > + return; > + } > + nelts = nelts / 2; > + } > + } I think for this it would be better to use: if (vector_compute_type && VECTOR_MODE_P (TYPE_MODE (vector_compute_type)) && subparts_gt (arg_type, vector_compute_type)) { unsigned HOST_WIDE_INT nelts = constant_lower_bound (TYPE_VECTOR_SUBPARTS (vector_compute_type)); since the loop is self-checking. E.g. this will make the Advanced SIMD handling on AArch64 the same regardless of whether SVE is also enabled. Thanks, Richard