From: Richard Sandiford <richard.sandiford@arm.com>
To: gcc-patches@gcc.gnu.org
Subject: [19/67] Add a smallest_int_mode_for_size helper function
Date: Fri, 09 Dec 2016 13:05:00 -0000 [thread overview]
Message-ID: <877f79mew4.fsf@e105548-lin.cambridge.arm.com> (raw)
In-Reply-To: <87h96dp8u6.fsf@e105548-lin.cambridge.arm.com> (Richard Sandiford's message of "Fri, 09 Dec 2016 12:48:01 +0000")
This patch adds a wrapper around smallest_mode_for_size
for cases in which the mode class is MODE_INT. Unlike
(int_)mode_for_size, smallest_mode_for_size always returns
a mode of the specified class, asserting if no such mode exists.
smallest_int_mode_for_size therefore returns a scalar_int_mode
rather than an opt_scalar_int_mode.
gcc/
2016-11-24 Richard Sandiford <richard.sandiford@arm.com>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* machmode.h (smallest_mode_for_size): Fix formatting.
(smallest_int_mode_for_size): New function.
* cfgexpand.c (expand_debug_expr): Use smallest_int_mode_for_size
instead of smallest_mopde_for_size.
* combine.c (make_extraction): Likewise.
* config/arc/arc.c (arc_expand_movmem): Likewise.
* config/i386/i386.c (ix86_get_mask_mode): Likewise.
* config/i386/i386.md (define_split): Likewise.
* config/s390/s390.c (s390_expand_insv): Likewise.
* config/sparc/sparc.c (assign_int_registers): Likewise.
* config/spu/spu.c (spu_function_value): Likewise.
(spu_function_arg): Likewise.
* coverage.c (get_gcov_type): Likewise.
(get_gcov_unsigned_t): Likewise.
* dse.c (find_shift_sequence): Likewise.
* expr.c (convert_move): Likewise.
(store_field): Likewise.
* internal-fn.c (expand_arith_overflow): Likewise.
* optabs-query.c (get_best_extraction_insn): Likewise.
* optabs.c (expand_twoval_binop_libfunc): Likewise.
* stor-layout.c (layout_type): Likewise.
(initialize_sizetypes): Likewise.
* targhooks.c (default_get_mask_mode): Likewise.
* tree-ssa-loop-manip.c (canonicalize_loop_ivs): Likewise.
diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index 3915c97..b531996 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -4486,7 +4486,7 @@ expand_debug_expr (tree exp)
{
if (mode1 == VOIDmode)
/* Bitfield. */
- mode1 = smallest_mode_for_size (bitsize, MODE_INT);
+ mode1 = smallest_int_mode_for_size (bitsize);
if (bitpos >= BITS_PER_UNIT)
{
op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
diff --git a/gcc/combine.c b/gcc/combine.c
index 573c558..29b849a 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -7586,7 +7586,7 @@ make_extraction (machine_mode mode, rtx inner, HOST_WIDE_INT pos,
{
/* Be careful not to go beyond the extracted object and maintain the
natural alignment of the memory. */
- wanted_inner_mode = smallest_mode_for_size (len, MODE_INT);
+ wanted_inner_mode = smallest_int_mode_for_size (len);
while (pos % GET_MODE_BITSIZE (wanted_inner_mode) + len
> GET_MODE_BITSIZE (wanted_inner_mode))
wanted_inner_mode = *GET_MODE_WIDER_MODE (wanted_inner_mode);
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 2b25a37..bc5c031 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -7621,7 +7621,7 @@ arc_expand_movmem (rtx *operands)
while (piece > size)
piece >>= 1;
- mode = smallest_mode_for_size (piece * BITS_PER_UNIT, MODE_INT);
+ mode = smallest_int_mode_for_size (piece * BITS_PER_UNIT);
/* If we don't re-use temporaries, the scheduler gets carried away,
and the register pressure gets unnecessarily high. */
if (0 && tmpx[i] && GET_MODE (tmpx[i]) == mode)
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 0fbb3ed..4d74bc4 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -50331,11 +50331,11 @@ ix86_get_mask_mode (unsigned nunits, unsigned vector_size)
|| (TARGET_AVX512VL && (vector_size == 32 || vector_size == 16)))
{
if (elem_size == 4 || elem_size == 8 || TARGET_AVX512BW)
- return smallest_mode_for_size (nunits, MODE_INT);
+ return smallest_int_mode_for_size (nunits);
}
- machine_mode elem_mode
- = smallest_mode_for_size (elem_size * BITS_PER_UNIT, MODE_INT);
+ scalar_int_mode elem_mode
+ = smallest_int_mode_for_size (elem_size * BITS_PER_UNIT);
gcc_assert (elem_size * nunits == vector_size);
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index f2248a5..1433cbf 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -7936,7 +7936,7 @@
no matter the size of the test. So find a mode that works. */
if (! MEM_VOLATILE_P (val))
{
- mode = smallest_mode_for_size (pos + len, MODE_INT);
+ mode = smallest_int_mode_for_size (pos + len);
val = adjust_address (val, mode, 0);
}
}
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index a3bb952..510c24c 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -6093,7 +6093,7 @@ s390_expand_insv (rtx dest, rtx op1, rtx op2, rtx src)
return true;
}
- smode = smallest_mode_for_size (bitsize, MODE_INT);
+ smode = smallest_int_mode_for_size (bitsize);
smode_bsize = GET_MODE_BITSIZE (smode);
mode_bsize = GET_MODE_BITSIZE (mode);
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 995b0af..28bb0c5 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -6626,8 +6626,8 @@ assign_int_registers (HOST_WIDE_INT bitpos, assign_data_t *data)
the latter case we may pick up unwanted bits. It's not a problem
at the moment but may wish to revisit. */
if (intoffset % BITS_PER_WORD != 0)
- mode = smallest_mode_for_size (BITS_PER_WORD - intoffset % BITS_PER_WORD,
- MODE_INT);
+ mode = smallest_int_mode_for_size (BITS_PER_WORD
+ - intoffset % BITS_PER_WORD);
else
mode = word_mode;
diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index e8fd572..ea449e0 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -3808,8 +3808,7 @@ spu_function_value (const_tree type, const_tree func ATTRIBUTE_UNUSED)
{
if (byte_size < 4)
byte_size = 4;
- smode =
- smallest_mode_for_size (byte_size * BITS_PER_UNIT, MODE_INT);
+ smode = smallest_int_mode_for_size (byte_size * BITS_PER_UNIT);
RTVEC_ELT (v, n) =
gen_rtx_EXPR_LIST (VOIDmode,
gen_rtx_REG (smode, FIRST_RETURN_REGNUM + n),
@@ -3847,7 +3846,7 @@ spu_function_arg (cumulative_args_t cum_v,
rtx gr_reg;
if (byte_size < 4)
byte_size = 4;
- smode = smallest_mode_for_size (byte_size * BITS_PER_UNIT, MODE_INT);
+ smode = smallest_int_mode_for_size (byte_size * BITS_PER_UNIT);
gr_reg = gen_rtx_EXPR_LIST (VOIDmode,
gen_rtx_REG (smode, FIRST_ARG_REGNUM + *cum),
const0_rtx);
diff --git a/gcc/coverage.c b/gcc/coverage.c
index 4167e26..bd351e5 100644
--- a/gcc/coverage.c
+++ b/gcc/coverage.c
@@ -143,8 +143,8 @@ static void coverage_obj_finish (vec<constructor_elt, va_gc> *);
tree
get_gcov_type (void)
{
- machine_mode mode
- = smallest_mode_for_size (LONG_LONG_TYPE_SIZE > 32 ? 64 : 32, MODE_INT);
+ scalar_int_mode mode
+ = smallest_int_mode_for_size (LONG_LONG_TYPE_SIZE > 32 ? 64 : 32);
return lang_hooks.types.type_for_mode (mode, false);
}
@@ -153,7 +153,7 @@ get_gcov_type (void)
static tree
get_gcov_unsigned_t (void)
{
- machine_mode mode = smallest_mode_for_size (32, MODE_INT);
+ scalar_int_mode mode = smallest_int_mode_for_size (32);
return lang_hooks.types.type_for_mode (mode, true);
}
\f
diff --git a/gcc/dse.c b/gcc/dse.c
index c8e22a7..93ff9a7 100644
--- a/gcc/dse.c
+++ b/gcc/dse.c
@@ -1573,7 +1573,7 @@ find_shift_sequence (int access_size,
int shift, bool speed, bool require_cst)
{
machine_mode store_mode = GET_MODE (store_info->mem);
- machine_mode new_mode;
+ scalar_int_mode new_mode;
rtx read_reg = NULL;
/* Some machines like the x86 have shift insns for each size of
@@ -1583,14 +1583,15 @@ find_shift_sequence (int access_size,
justify the value we want to read but is available in one insn on
the machine. */
- FOR_EACH_MODE_FROM (new_mode,
- smallest_mode_for_size (access_size * BITS_PER_UNIT,
- MODE_INT))
+ opt_scalar_int_mode new_mode_iter;
+ FOR_EACH_MODE_FROM (new_mode_iter,
+ smallest_int_mode_for_size (access_size * BITS_PER_UNIT))
{
rtx target, new_reg, new_lhs;
rtx_insn *shift_seq, *insn;
int cost;
+ new_mode = *new_mode_iter;
if (GET_MODE_BITSIZE (new_mode) > BITS_PER_WORD)
break;
diff --git a/gcc/expr.c b/gcc/expr.c
index 8141016..2e59bfd 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -344,8 +344,8 @@ convert_move (rtx to, rtx from, int unsignedp)
xImode for all MODE_PARTIAL_INT modes they use, but no others. */
if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
{
- machine_mode full_mode
- = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
+ scalar_int_mode full_mode
+ = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode));
gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
!= CODE_FOR_nothing);
@@ -359,8 +359,8 @@ convert_move (rtx to, rtx from, int unsignedp)
if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
{
rtx new_from;
- machine_mode full_mode
- = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
+ scalar_int_mode full_mode
+ = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode));
convert_optab ctab = unsignedp ? zext_optab : sext_optab;
enum insn_code icode;
@@ -6898,7 +6898,7 @@ store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
rtx temp_target;
if (mode == BLKmode || mode == VOIDmode)
- mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
+ mode = smallest_int_mode_for_size (size * BITS_PER_UNIT);
temp_target = gen_reg_rtx (mode);
emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
temp = temp_target;
@@ -6916,7 +6916,7 @@ store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
{
HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
rtx temp_target;
- mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
+ mode = smallest_int_mode_for_size (size * BITS_PER_UNIT);
temp_target = gen_reg_rtx (mode);
temp_target
= extract_bit_field (temp, size * BITS_PER_UNIT, 0, 1,
diff --git a/gcc/internal-fn.c b/gcc/internal-fn.c
index cdcbaa4..49075c2 100644
--- a/gcc/internal-fn.c
+++ b/gcc/internal-fn.c
@@ -2171,7 +2171,7 @@ expand_arith_overflow (enum tree_code code, gimple *stmt)
if (orig_precres == precres && precop <= BITS_PER_WORD)
{
int p = MAX (min_precision, precop);
- machine_mode m = smallest_mode_for_size (p, MODE_INT);
+ scalar_int_mode m = smallest_int_mode_for_size (p);
tree optype = build_nonstandard_integer_type (GET_MODE_PRECISION (m),
uns0_p && uns1_p
&& unsr_p);
@@ -2213,7 +2213,7 @@ expand_arith_overflow (enum tree_code code, gimple *stmt)
if (orig_precres == precres)
{
int p = MAX (prec0, prec1);
- machine_mode m = smallest_mode_for_size (p, MODE_INT);
+ scalar_int_mode m = smallest_int_mode_for_size (p);
tree optype = build_nonstandard_integer_type (GET_MODE_PRECISION (m),
uns0_p && uns1_p
&& unsr_p);
diff --git a/gcc/machmode.h b/gcc/machmode.h
index f1519a8..b3d2d76 100644
--- a/gcc/machmode.h
+++ b/gcc/machmode.h
@@ -589,9 +589,16 @@ float_mode_for_size (unsigned int size)
/* Similar to mode_for_size, but find the smallest mode for a given width. */
-extern machine_mode smallest_mode_for_size (unsigned int,
- enum mode_class);
+extern machine_mode smallest_mode_for_size (unsigned int, enum mode_class);
+/* Find the narrowest integer mode that contains at least SIZE bits.
+ Such a mode must exist. */
+
+inline scalar_int_mode
+smallest_int_mode_for_size (unsigned int size)
+{
+ return as_a <scalar_int_mode> (smallest_mode_for_size (size, MODE_INT));
+}
/* Return an integer mode of exactly the same size as the input mode. */
diff --git a/gcc/optabs-query.c b/gcc/optabs-query.c
index fdde578..e664587 100644
--- a/gcc/optabs-query.c
+++ b/gcc/optabs-query.c
@@ -193,13 +193,15 @@ get_best_extraction_insn (extraction_insn *insn,
unsigned HOST_WIDE_INT struct_bits,
machine_mode field_mode)
{
- machine_mode mode = smallest_mode_for_size (struct_bits, MODE_INT);
- FOR_EACH_MODE_FROM (mode, mode)
+ opt_scalar_int_mode mode_iter;
+ FOR_EACH_MODE_FROM (mode_iter, smallest_int_mode_for_size (struct_bits))
{
+ scalar_int_mode mode = *mode_iter;
if (get_extraction_insn (insn, pattern, type, mode))
{
- FOR_EACH_MODE_FROM (mode, mode)
+ FOR_EACH_MODE_FROM (mode_iter, mode)
{
+ mode = *mode_iter;
if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (field_mode)
|| TRULY_NOOP_TRUNCATION_MODES_P (insn->field_mode,
field_mode))
diff --git a/gcc/optabs.c b/gcc/optabs.c
index b2c8006..edafe4a 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -2082,8 +2082,7 @@ expand_twoval_binop_libfunc (optab binoptab, rtx op0, rtx op1,
/* The value returned by the library function will have twice as
many bits as the nominal MODE. */
- libval_mode = smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode),
- MODE_INT);
+ libval_mode = smallest_int_mode_for_size (2 * GET_MODE_BITSIZE (mode));
start_sequence ();
libval = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
libval_mode, 2,
diff --git a/gcc/stor-layout.c b/gcc/stor-layout.c
index 6337764..91e79ad 100644
--- a/gcc/stor-layout.c
+++ b/gcc/stor-layout.c
@@ -2121,12 +2121,15 @@ layout_type (tree type)
case BOOLEAN_TYPE:
case INTEGER_TYPE:
case ENUMERAL_TYPE:
- SET_TYPE_MODE (type,
- smallest_mode_for_size (TYPE_PRECISION (type), MODE_INT));
- TYPE_SIZE (type) = bitsize_int (GET_MODE_BITSIZE (TYPE_MODE (type)));
- /* Don't set TYPE_PRECISION here, as it may be set by a bitfield. */
- TYPE_SIZE_UNIT (type) = size_int (GET_MODE_SIZE (TYPE_MODE (type)));
- break;
+ {
+ scalar_int_mode mode
+ = smallest_int_mode_for_size (TYPE_PRECISION (type));
+ SET_TYPE_MODE (type, mode);
+ TYPE_SIZE (type) = bitsize_int (GET_MODE_BITSIZE (mode));
+ /* Don't set TYPE_PRECISION here, as it may be set by a bitfield. */
+ TYPE_SIZE_UNIT (type) = size_int (GET_MODE_SIZE (mode));
+ break;
+ }
case REAL_TYPE:
{
@@ -2571,8 +2574,7 @@ initialize_sizetypes (void)
bprecision
= MIN (precision + LOG2_BITS_PER_UNIT + 1, MAX_FIXED_MODE_SIZE);
- bprecision
- = GET_MODE_PRECISION (smallest_mode_for_size (bprecision, MODE_INT));
+ bprecision = GET_MODE_PRECISION (smallest_int_mode_for_size (bprecision));
if (bprecision > HOST_BITS_PER_DOUBLE_INT)
bprecision = HOST_BITS_PER_DOUBLE_INT;
@@ -2587,17 +2589,18 @@ initialize_sizetypes (void)
TYPE_UNSIGNED (bitsizetype) = 1;
/* Now layout both types manually. */
- SET_TYPE_MODE (sizetype, smallest_mode_for_size (precision, MODE_INT));
+ scalar_int_mode mode = smallest_int_mode_for_size (precision);
+ SET_TYPE_MODE (sizetype, mode);
SET_TYPE_ALIGN (sizetype, GET_MODE_ALIGNMENT (TYPE_MODE (sizetype)));
TYPE_SIZE (sizetype) = bitsize_int (precision);
- TYPE_SIZE_UNIT (sizetype) = size_int (GET_MODE_SIZE (TYPE_MODE (sizetype)));
+ TYPE_SIZE_UNIT (sizetype) = size_int (GET_MODE_SIZE (mode));
set_min_and_max_values_for_integral_type (sizetype, precision, UNSIGNED);
- SET_TYPE_MODE (bitsizetype, smallest_mode_for_size (bprecision, MODE_INT));
+ mode = smallest_int_mode_for_size (bprecision);
+ SET_TYPE_MODE (bitsizetype, mode);
SET_TYPE_ALIGN (bitsizetype, GET_MODE_ALIGNMENT (TYPE_MODE (bitsizetype)));
TYPE_SIZE (bitsizetype) = bitsize_int (bprecision);
- TYPE_SIZE_UNIT (bitsizetype)
- = size_int (GET_MODE_SIZE (TYPE_MODE (bitsizetype)));
+ TYPE_SIZE_UNIT (bitsizetype) = size_int (GET_MODE_SIZE (mode));
set_min_and_max_values_for_integral_type (bitsizetype, bprecision, UNSIGNED);
/* Create the signed variants of *sizetype. */
diff --git a/gcc/targhooks.c b/gcc/targhooks.c
index 90892fa..4f7744f 100644
--- a/gcc/targhooks.c
+++ b/gcc/targhooks.c
@@ -1184,8 +1184,8 @@ machine_mode
default_get_mask_mode (unsigned nunits, unsigned vector_size)
{
unsigned elem_size = vector_size / nunits;
- machine_mode elem_mode
- = smallest_mode_for_size (elem_size * BITS_PER_UNIT, MODE_INT);
+ scalar_int_mode elem_mode
+ = smallest_int_mode_for_size (elem_size * BITS_PER_UNIT);
machine_mode vector_mode;
gcc_assert (elem_size * nunits == vector_size);
diff --git a/gcc/tree-ssa-loop-manip.c b/gcc/tree-ssa-loop-manip.c
index f2d3492..e624a46 100644
--- a/gcc/tree-ssa-loop-manip.c
+++ b/gcc/tree-ssa-loop-manip.c
@@ -1462,7 +1462,6 @@ canonicalize_loop_ivs (struct loop *loop, tree *nit, bool bump_in_latch)
gcond *stmt;
edge exit = single_dom_exit (loop);
gimple_seq stmts;
- machine_mode mode;
bool unsigned_p = false;
for (psi = gsi_start_phis (loop->header);
@@ -1489,7 +1488,7 @@ canonicalize_loop_ivs (struct loop *loop, tree *nit, bool bump_in_latch)
precision = TYPE_PRECISION (type);
}
- mode = smallest_mode_for_size (precision, MODE_INT);
+ scalar_int_mode mode = smallest_int_mode_for_size (precision);
precision = GET_MODE_PRECISION (mode);
type = build_nonstandard_integer_type (precision, unsigned_p);
next prev parent reply other threads:[~2016-12-09 13:05 UTC|newest]
Thread overview: 79+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-09 12:48 [0/67] Add wrapper classes for machine_modes Richard Sandiford
2016-12-09 12:50 ` [1/67] Add an E_ prefix to mode names and update case statements Richard Sandiford
2016-12-09 12:52 ` [2/67] Make machine_mode a class Richard Sandiford
2016-12-15 22:34 ` Trevor Saunders
2016-12-09 12:53 ` [3/67] Add GDB pretty printer for machine mode classes Richard Sandiford
2016-12-09 12:54 ` [4/67] Add FOR_EACH iterators for modes Richard Sandiford
2016-12-09 12:55 ` [6/67] Make GET_MODE_WIDER return an opt_mode Richard Sandiford
2016-12-09 12:55 ` [5/67] Small tweak to array_value_type Richard Sandiford
2016-12-09 12:57 ` [7/67] Add scalar_float_mode Richard Sandiford
2016-12-09 14:19 ` David Malcolm
2016-12-09 14:30 ` Richard Sandiford
2016-12-09 12:57 ` [8/67] Simplify gen_trunc/extend_conv_libfunc Richard Sandiford
2016-12-09 12:58 ` [9/67] Add SCALAR_FLOAT_TYPE_MODE Richard Sandiford
2016-12-09 12:59 ` [10/67] Make assemble_real take a scalar_float_mode Richard Sandiford
2016-12-09 13:00 ` [0/67] Add wrapper classes for machine_modes Richard Biener
2016-12-09 13:54 ` Richard Sandiford
2016-12-09 13:00 ` [12/67] Use opt_scalar_float_mode when iterating over float modes Richard Sandiford
2016-12-09 13:00 ` [11/67] Add a float_mode_for_size helper function Richard Sandiford
2016-12-09 13:01 ` [13/67] Make floatn_mode return an opt_scalar_float_mode Richard Sandiford
2016-12-09 13:02 ` [14/67] Make libgcc_floating_mode_supported_p take a scalar_float_mode Richard Sandiford
2016-12-09 13:03 ` [16/67] Add scalar_int_mode_pod Richard Sandiford
2016-12-09 13:03 ` [15/67] Add scalar_int_mode Richard Sandiford
2016-12-09 13:04 ` [17/67] Add an int_mode_for_size helper function Richard Sandiford
2016-12-09 13:05 ` Richard Sandiford [this message]
2016-12-09 13:05 ` [18/67] Make int_mode_for_mode return an opt_scalar_int_mode Richard Sandiford
2016-12-09 13:06 ` [20/67] Replace MODE_INT checks with is_int_mode Richard Sandiford
2016-12-09 13:07 ` [21/67] Replace SCALAR_INT_MODE_P checks with is_a <scalar_int_mode> Richard Sandiford
2016-12-09 13:07 ` [22/67] Replace !VECTOR_MODE_P " Richard Sandiford
2016-12-09 13:08 ` [23/67] Replace != VOIDmode checks " Richard Sandiford
2016-12-09 13:08 ` [24/67] Replace a != BLKmode check " Richard Sandiford
2016-12-09 13:22 ` Richard Biener
2016-12-09 14:42 ` Richard Sandiford
2016-12-09 13:09 ` [25/67] Use is_a <scalar_int_mode> for bitmask optimisations Richard Sandiford
2016-12-09 13:10 ` [27/67] Use is_a <scalar_int_mode> before LOAD_EXTEND_OP Richard Sandiford
2016-12-09 13:10 ` [26/67] Use is_a <scalar_int_mode> in subreg/extract simplifications Richard Sandiford
2016-12-09 13:11 ` [28/67] Use is_a <scalar_int_mode> for miscellaneous types of test Richard Sandiford
2016-12-09 13:12 ` [30/67] Use scalar_int_mode for doubleword splits Richard Sandiford
2016-12-09 13:12 ` [29/67] Make some *_loc_descriptor helpers take scalar_int_mode Richard Sandiford
2016-12-09 13:13 ` [31/67] Use scalar_int_mode for move2add Richard Sandiford
2016-12-09 13:14 ` [33/67] Add a NARROWEST_INT_MODE macro Richard Sandiford
2016-12-09 13:14 ` [32/67] Check is_a <scalar_int_mode> before calling valid_pointer_mode Richard Sandiford
2016-12-09 13:15 ` [34/67] Add a SCALAR_INT_TYPE_MODE macro Richard Sandiford
2016-12-09 13:16 ` [36/67] Use scalar_int_mode in the RTL iv routines Richard Sandiford
2016-12-09 13:16 ` [35/67] Add uses of as_a <scalar_int_mode> Richard Sandiford
2016-12-09 13:17 ` [38/67] Move SCALAR_INT_MODE_P out of strict_volatile_bitfield_p Richard Sandiford
2016-12-09 13:17 ` [37/67] Use scalar_int_mode when emitting cstores Richard Sandiford
2016-12-09 13:18 ` [39/67] Two changes to the get_best_mode interface Richard Sandiford
2016-12-09 13:19 ` [40/67] Use scalar_int_mode for extraction_insn fields Richard Sandiford
2016-12-09 13:20 ` [41/67] Split scalar integer handling out of force_to_mode Richard Sandiford
2016-12-09 13:20 ` [42/67] Use scalar_int_mode in simplify_shift_const_1 Richard Sandiford
2016-12-09 13:22 ` [43/67] Use scalar_int_mode in simplify_comparison Richard Sandiford
2016-12-09 13:22 ` [44/67] Make simplify_and_const_int take a scalar_int_mode Richard Sandiford
2016-12-09 13:23 ` [45/67] Make extract_left_shift " Richard Sandiford
2016-12-09 13:23 ` [46/67] Make widest_int_mode_for_size return " Richard Sandiford
2016-12-09 13:24 ` [47/67] Make subroutines of nonzero_bits operate on scalar_int_mode Richard Sandiford
2016-12-09 13:25 ` [49/67] Simplify nonzero/num_sign_bits hooks Richard Sandiford
2016-12-09 13:25 ` [48/67] Make subroutines of num_sign_bit_copies operate on scalar_int_mode Richard Sandiford
2016-12-09 13:28 ` [50/67] Add helper routines for SUBREG_PROMOTED_VAR_P subregs Richard Sandiford
2016-12-09 13:30 ` [51/67] Use opt_scalar_int_mode when iterating over integer modes Richard Sandiford
2016-12-09 13:30 ` [52/67] Use scalar_int_mode in extract/store_bit_field Richard Sandiford
2016-12-09 13:31 ` [53/67] Pass a mode to const_scalar_mask_from_tree Richard Sandiford
2016-12-09 13:31 ` [54/67] Add explicit int checks for alternative optab implementations Richard Sandiford
2016-12-09 13:33 ` [55/67] Use scalar_int_mode in simplify_const_unary_operation Richard Sandiford
2016-12-09 13:33 ` [56/67] Use the more specific type when two modes are known to be equal Richard Sandiford
2016-12-09 13:34 ` [57/67] Use scalar_int_mode in expand_expr_addr_expr Richard Sandiford
2016-12-09 13:35 ` [58/67] Use scalar_int_mode in a try_combine optimisation Richard Sandiford
2016-12-09 13:36 ` [60/67] Pass scalar_int_modes to do_jump_by_parts_* Richard Sandiford
2016-12-09 13:36 ` [59/67] Add a rtx_jump_table_data::get_data_mode helper Richard Sandiford
2016-12-09 13:37 ` [61/67] Use scalar_int_mode in the AArch64 port Richard Sandiford
2016-12-09 13:38 ` [63/67] Simplifications after type switch Richard Sandiford
2016-12-09 13:38 ` [62/67] Big machine_mode to scalar_int_mode replacement Richard Sandiford
2016-12-09 13:40 ` [64/67] Add a scalar_mode class Richard Sandiford
2016-12-09 13:40 ` [65/67] Use scalar_mode in the AArch64 port Richard Sandiford
2016-12-09 13:40 ` [66/67] Add a scalar_mode_pod class Richard Sandiford
2016-12-09 13:41 ` [67/67] Add a complex_mode class Richard Sandiford
2016-12-09 18:20 ` [0/67] Add wrapper classes for machine_modes Sandra Loosemore
2017-05-05 7:08 ` Jeff Law
2017-05-24 14:33 ` Richard Sandiford
2017-06-28 17:27 ` Jeff Law
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