Update the MIPS VxWorks configuration

Update the MIPS VxWorks configuration

[Richard Sandiford]

This patch fixes the MIPS VxWorks configuration, which previously
didn't build because of a failure to include vx-common.h.  It also:

  - Changes the MIPS multilibs to match those supported by
    recent VxWorks versions.  MIPS I is no longer needed,
    but more MIPS II and MIPS III combinations are.

    (Note that it is still possible to create a MIPS I rather
    than MIPS II compiler by configuring with --with-arch=mips1.)

  - Adds RTP support.

  - Uses the VXWORKS_* macros defined in config/vx*.h.

  - Moves definitions from SUBTARGET_CPP_SPEC to TARGET_OS_CPP_BUILTINS.

The RTP PIC multilibs build, but aren't usable yet because gcc
doesn't understand the VxWorks PIC model.  I'll be submitting
patches for that soon.

Tested on mips-wrs-vxworks.  Applied to trunk.

Richard


gcc/
	* config.gcc (mips-wrs-vxworks): Add vx-common.h to tm_file.
	Set the default --with-arch setting to mips2.
	* config/mips/t-vxworks (MULTILIB_OPTIONS, MULTILIB_MATCHES)
	(MULTILIB_EXCEPTIONS): Redefine with new multilibs.
	(MULTILIB_OSDIRNAMES): Delete.
	(MULTILIB_DIRNAMES): Define.
	* config/mips/vxworks.h (LINK_SPEC): Add VXWORKS_LINK_SPEC.
	(LIB_SPEC, STARTFILE_SPEC, ENDFILE_SPEC): Define.
	(TARGET_OS_CPP_BUILTINS): Incorporate old SUBTARGET_CPP_SPEC
	definitions, except for _WRS_R3K_EXC_SUPPORT.  Call
	VXWORKS_OS_CPP_BUILTINS.
	(SUBTARGET_CPP_SPEC): Redefine to VXWORKS_ADDITIONAL_CPP_SPEC.
	(MIPS_DEBUGGING_INFO): Undefine.
	(FUNCTION_PROFILER): Define to VXWORKS_FUNCTION_PROFILER.

Index: gcc/config.gcc
===================================================================
--- gcc/config.gcc	(revision 123427)
+++ gcc/config.gcc	(working copy)
@@ -1708,7 +1708,7 @@ mips*-*-rtems*)
 mips-wrs-vxworks)
 	# We want vxworks.h after mips/elf.h, which unfortunately means we
 	# have to redo the tm_file list from scratch.
-	tm_file="elfos.h mips/mips.h svr4.h mips/elf.h vxworks.h mips/vxworks.h"
+	tm_file="elfos.h mips/mips.h svr4.h mips/elf.h vx-common.h vxworks.h mips/vxworks.h"
 	tmake_file="${tmake_file} mips/t-vxworks"
 	;;
 mips-wrs-windiss)	# Instruction-level simulator for VxWorks.
@@ -2692,6 +2692,9 @@ if test x$with_cpu = x ; then
 	  ;;
       esac
       ;;
+    mips*-*-vxworks)
+      with_arch=mips2
+      ;;
     sparc*-*-*)
       with_cpu="`echo ${target} | sed 's/-.*$//'`"
       ;;
Index: gcc/config/mips/t-vxworks
===================================================================
--- gcc/config/mips/t-vxworks	(revision 123427)
+++ gcc/config/mips/t-vxworks	(working copy)
@@ -1,16 +1,17 @@
-# Multilibs for VxWorks.
-
-# default is mips1 EB hard-float
-MULTILIB_OPTIONS = mips2/mips3 EL msoft-float
-MULTILIB_MATCHES = EL=mel mips2=mips32 mips3=mips4 mips3=mips64
-
-MULTILIB_EXCEPTIONS = EL EL/msoft-float mips3/msoft-float mips3/EL/msoft-float
+# Multilibs for VxWorks.  We want these 8 architecture combinations:
+#
+#    {-mips2,-mips3} x {-EB,-EL} x {-mhard-float,-msoft-float}
+#
+# where the first option in each group is the default.  The -mips2
+# multilibs use o32 and the -mips3 multilibs use o64.
+#
+# We want three multilibs for each architecture combination:
+# default (kernel mode), -mrtp and -mrtp/-fPIC.
+MULTILIB_OPTIONS = mabi=o64 mips3 EL msoft-float mrtp fPIC
+MULTILIB_DIRNAMES = o64 mips3 EL msoft-float mrtp pic
+MULTILIB_MATCHES = EL=mel fPIC=fpic
+MULTILIB_EXCEPTIONS = mips3* mabi=o64 fPIC \
+		      $(addprefix mabi=o64/, EL* msoft-float* mrtp* fPIC*) \
+		      $(addsuffix /fPIC, *mabi=o64 *mips3 *EL *msoft-float)
 
 MUTLILIB_EXTRA_OPTS = -G 0 -mno-branch-likely
-
-MULTILIB_OSDIRNAMES = msoft-float=!MIPS32sfr3kgnu \
-		    mips2=!MIPS32gnu mips2/msoft-float=!MIPS32sfgnu \
-		    mips2/EL=!MIPS32gnule \
-		    mips2/EL/msoft-float=!MIPS32sfgnule \
-		    mips3=!MIPS64gnu mips3/EL=!MIPS64gnule 
-
Index: gcc/config/mips/vxworks.h
===================================================================
--- gcc/config/mips/vxworks.h	(revision 123427)
+++ gcc/config/mips/vxworks.h	(working copy)
@@ -46,23 +46,43 @@ #define ASM_SPEC "\
 #define LINK_SPEC "\
 %(endian_spec) \
 %{!G:-G 0} %{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips64} \
-%{bestGnum}"
+%{bestGnum}" \
+VXWORKS_LINK_SPEC
+
+#undef  LIB_SPEC
+#define LIB_SPEC VXWORKS_LIB_SPEC
+#undef  STARTFILE_SPEC
+#define STARTFILE_SPEC VXWORKS_STARTFILE_SPEC
+#undef  ENDFILE_SPEC
+#define ENDFILE_SPEC VXWORKS_ENDFILE_SPEC
 
 #define TARGET_OS_CPP_BUILTINS()                        \
   do                                                    \
     {                                                   \
-      builtin_define ("__vxworks");                     \
-      builtin_assert ("system=unix");                   \
+      if (TARGET_64BIT)					\
+	builtin_define ("CPU=MIPS64");			\
+      else						\
+	builtin_define ("CPU=MIPS32");			\
+      if (TARGET_BIG_ENDIAN)				\
+	builtin_define ("MIPSEB");			\
+      else						\
+	builtin_define ("MIPSEL");			\
+      if (TARGET_SOFT_FLOAT)				\
+	builtin_define ("SOFT_FLOAT");			\
+      VXWORKS_OS_CPP_BUILTINS ();			\
     }                                                   \
   while (0)
 
 #undef SUBTARGET_CPP_SPEC
-#define SUBTARGET_CPP_SPEC \
-"%{!DCPU=*: %{mips3|mips4|mips64:-DCPU=MIPS64;:-DCPU=MIPS32}} \
-  %{EL|mel:-DMIPSEL;:-DMIPSEB} \
-  %{msoft-float:-DSOFT_FLOAT} \
-  %{mips1:-D_WRS_R3K_EXC_SUPPORT}"
+#define SUBTARGET_CPP_SPEC VXWORKS_ADDITIONAL_CPP_SPEC
 
 /* No sdata.  */
 #undef MIPS_DEFAULT_GVALUE
 #define MIPS_DEFAULT_GVALUE 0
+
+/* Other formats are already disabled in config/vxworks.h.  */
+#undef MIPS_DEBUGGING_INFO
+
+/* No _mcount profiling on VxWorks.  */
+#undef FUNCTION_PROFILER
+#define FUNCTION_PROFILER VXWORKS_FUNCTION_PROFILER