From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 21579 invoked by alias); 10 Jan 2015 13:05:25 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 21564 invoked by uid 89); 10 Jan 2015 13:05:24 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-Spam-User: qpsmtpd, 2 recipients X-HELO: mail-wi0-f170.google.com Received: from mail-wi0-f170.google.com (HELO mail-wi0-f170.google.com) (209.85.212.170) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Sat, 10 Jan 2015 13:05:23 +0000 Received: by mail-wi0-f170.google.com with SMTP id bs8so6766700wib.1; Sat, 10 Jan 2015 05:05:20 -0800 (PST) X-Received: by 10.194.76.73 with SMTP id i9mr8565558wjw.93.1420895120000; Sat, 10 Jan 2015 05:05:20 -0800 (PST) Received: from localhost ([95.144.14.138]) by mx.google.com with ESMTPSA id ww4sm13670259wjc.47.2015.01.10.05.05.19 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 10 Jan 2015 05:05:19 -0800 (PST) From: Richard Sandiford To: Eric Botcazou Mail-Followup-To: Eric Botcazou ,gcc-patches@gcc.gnu.org, Richard Sandiford , Alan Hayward , "steven\@gcc.gnu.org" , rdsandiford@googlemail.com Cc: gcc-patches@gcc.gnu.org, Richard Sandiford , Alan Hayward , "steven\@gcc.gnu.org" Subject: Re: [PATCH][rtlanal.c][BE][1/2] Fix vector load/stores to not use ld1/st1 References: <2241316.8n9R8QCkJl@polaris> <87bnn4ha55.fsf@googlemail.com> <2243996.KNkFcg5eZm@polaris> Date: Sat, 10 Jan 2015 14:59:00 -0000 Message-ID: <87a91qg50x.fsf@googlemail.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2015-01/txt/msg00584.txt.bz2 Sorry for the slow response. Jeff has approved the patch in the meantime, but I didn't want to go ahead and apply it while there was still disagreement... Eric Botcazou writes: >> Please be more specific though. If you don't think the patch is correct, >> what do you think the requirement should be and how should it be integrated >> into the existing checks? > > Good question, but I have asked it first. :-) > > So what are the new subregs that we want to accept here? Can someone write > this down explicitly, I think that we cannot go ahead without that. The idea is that if: (1) we have a non-paradoxical subreg; (2) both (reg:ymode xregno) and (reg:xmode xregno) occupy full hard registers (no padding or unused upper bits); (3) (reg:ymode xregno) and (reg:xmode xregno) store the same number of bytes (X) in each constituent hard register; (4) the offset is a multiple of X, i.e. the data we're accessing is aligned to a register boundary; and (5) endianness is regular (no differences between words and bytes, or between registers and memory) then the register offset is always the byte offset divided by X. >> E.g. the assert is there because the main calculation is based on: >> >> /* Size of ymode must not be greater than the size of xmode. */ >> mode_multiple = GET_MODE_SIZE (xmode) / GET_MODE_SIZE (ymode); >> gcc_assert (mode_multiple != 0); >> >> which clearly isn't a useful value if the division isn't exact. >> Do you mean that, since mode_multiple isn't correct for the >> DI-of-a-CI case, we should reformulate the end of the function >> to avoid using mode_multiple at all? > > Yes. It's not really obvious to me how to do that though. Maybe I just don't understand the cases that the existing code is trying to handle well enough. Thanks, Richard