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Marchesi" To: Sebastian Huber Cc: gcc-patches@gcc.gnu.org Subject: Re: [PATCH 1/2] Allow subtarget customization of CC1_SPEC References: <20220722130250.59766-1-sebastian.huber@embedded-brains.de> Date: Fri, 22 Jul 2022 16:02:51 +0200 In-Reply-To: <20220722130250.59766-1-sebastian.huber@embedded-brains.de> (Sebastian Huber's message of "Fri, 22 Jul 2022 15:02:49 +0200") Message-ID: <87bkth454k.fsf@oracle.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/28.0.50 (gnu/linux) Content-Type: text/plain X-ClientProxiedBy: LO4P265CA0103.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:2c3::6) To BYAPR10MB2888.namprd10.prod.outlook.com (2603:10b6:a03:88::32) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e27f9ae3-ec49-4953-163e-08da6beae1a9 X-MS-TrafficTypeDiagnostic: BYAPR10MB3717:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: swlFxnax9oDIqhJWZAHqwwiU9ZBCZUozQTOQ9b1Yk5UawrInUtEIU678or5jYR9lQcuck8mdmISeXwVUzJgDawA1bIbS6PLDSm9znshmjEsaXVGPvvhBZ/SlXXmZMCkuFtdT2fCIlsci3O2H7YfZne4z/IVU2v+ivqSNbjjuv7epg4bkuSS3pEYbgjkbPjTQBsfaf7opzG/TaOB664wU7pLHKNfUFlap4zB0IyC9qe0e6wH8FatoBAbnO4gvG3DmByeNrBwKfPCvEbh5IuqByNpSiK8MetaumFzXuwW4txFnrt3lT2IUg0JsFjeBSGscPm9fWRx5rgkp2MP3NVz2H6a3bJysqrNP4K//mSJsF5Gjxq4kyDfJ1+ZPLCmncA+vc8tGgYhmTefjH6OnpX1Bki0o7TZF5ULqYuHWqGDnozLAMYvTvAvxaOj9OfGa/bpmkwlm4b87scyOAQCzrNmluvg6FDccCSkZC3yxEPOisY5SABnmfHUkKEzq8Oj3t3hXLRpPwamZNzhtgBYPl8tUYgZ7zSMLOdKIt6omd4q4UR7V79EJ10fwX8dLS2+k9xn9ynsRkOe1CUsVLfvouRvibth8bXWOm5g6QokSJK61zWalMelku0R4tT3Y+UjKtmfO0/O9EcFfqh1D7GASCwDlh0CdNDACvlWu8pWgLodF7oSMCMeYGvpnXuQQiL66NtNBllVV9kq4ErsBjly0pjiYoAxjfRHs8wAphd+EtYE//hVbo2DzdU2nvp1eUfBGEoQP/cm8t1vgUye1emhR1p2OoTLWluuj8XKUxiTWUrzn1tBLe55xjnqwGnSzzL3oZGptSrJGo8NRhOm0U6rJ0UEhPZLpJH7mMvRV/dgyXC6pW5Y= X-Forefront-Antispam-Report: CIP:255.255.255.255; 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I find "subtarget" confusing in this context. If it is about rtems.h, linux.h or sol2.h, wouldn't this be better called OS_CC1_SPEC or similar? These files specify configurations that apply to a set of targets, not to a subset of a target... > gcc/ChangeLog: > > * gcc.cc (SUBTARGET_CC1_SPEC): Define if not defined. > (CC1_SPEC): Define to SUBTARGET_CC1_SPEC. > * config/arm/arm.h (CC1_SPEC): Remove. > * config/arc/arc.h (CC1_SPEC): Append SUBTARGET_CC1_SPEC. > * config/cris/cris.h (CC1_SPEC): Likewise. > * config/frv/frv.h (CC1_SPEC): Likewise. > * config/i386/i386.h (CC1_SPEC): Likewise. > * config/ia64/ia64.h (CC1_SPEC): Likewise. > * config/lm32/lm32.h (CC1_SPEC): Likewise. > * config/m32r/m32r.h (CC1_SPEC): Likewise. > * config/mcore/mcore.h (CC1_SPEC): Likewise. > * config/microblaze/microblaze.h: Likewise. > * config/nds32/nds32.h (CC1_SPEC): Likewise. > * config/nios2/nios2.h (CC1_SPEC): Likewise. > * config/pa/pa.h (CC1_SPEC): Likewise. > * config/rs6000/sysv4.h (CC1_SPEC): Likewise. > * config/rx/rx.h (CC1_SPEC): Likewise. > * config/sparc/sparc.h (CC1_SPEC): Likewise. > --- > gcc/config/arc/arc.h | 3 ++- > gcc/config/arm/arm.h | 4 ---- > gcc/config/cris/cris.h | 3 ++- > gcc/config/frv/frv.h | 2 +- > gcc/config/i386/i386.h | 2 +- > gcc/config/ia64/ia64.h | 2 +- > gcc/config/lm32/lm32.h | 2 +- > gcc/config/m32r/m32r.h | 2 +- > gcc/config/mcore/mcore.h | 2 +- > gcc/config/microblaze/microblaze.h | 3 ++- > gcc/config/nds32/nds32.h | 2 +- > gcc/config/nios2/nios2.h | 2 +- > gcc/config/pa/pa.h | 2 +- > gcc/config/rs6000/sysv4.h | 3 ++- > gcc/config/rx/rx.h | 3 ++- > gcc/config/sparc/sparc.h | 2 +- > gcc/gcc.cc | 8 +++++++- > 17 files changed, 27 insertions(+), 20 deletions(-) > > diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h > index 539a1662084..177287b11aa 100644 > --- a/gcc/config/arc/arc.h > +++ b/gcc/config/arc/arc.h > @@ -68,7 +68,8 @@ along with GCC; see the file COPYING3. If not see > #define CC1_SPEC "%{EB:%{EL:%emay not use both -EB and -EL}} \ > %{EB:-mbig-endian} %{EL:-mlittle-endian} \ > %{G*} \ > -" > +" \ > +SUBTARGET_CC1_SPEC > extern const char *arc_cpu_to_as (int argc, const char **argv); > > #define EXTRA_SPEC_FUNCTIONS \ > diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h > index f479540812a..24fdf7fde23 100644 > --- a/gcc/config/arm/arm.h > +++ b/gcc/config/arm/arm.h > @@ -91,10 +91,6 @@ extern tree arm_bf16_ptr_type_node; > #undef CPP_SPEC > #define CPP_SPEC "%(subtarget_cpp_spec)" > > -#ifndef CC1_SPEC > -#define CC1_SPEC "" > -#endif > - > /* This macro defines names of additional specifications to put in the specs > that can be used in various specifications like CC1_SPEC. Its definition > is an initializer with a subgrouping for each command option. > diff --git a/gcc/config/cris/cris.h b/gcc/config/cris/cris.h > index 6edfe13d92c..ed89b3fa6b0 100644 > --- a/gcc/config/cris/cris.h > +++ b/gcc/config/cris/cris.h > @@ -135,7 +135,8 @@ extern int cris_cpu_version; > %{metrax100:-march=v8}\ > %{march=*:-march=%*}\ > %{mcpu=*:-mcpu=%*}\ > - %(cc1_subtarget)" > + %(cc1_subtarget)" \ > + SUBTARGET_CC1_SPEC > > /* For the cris-*-elf subtarget. */ > #define CRIS_CC1_SUBTARGET_SPEC \ > diff --git a/gcc/config/frv/frv.h b/gcc/config/frv/frv.h > index 8cd67f75b09..b0f39ee238e 100644 > --- a/gcc/config/frv/frv.h > +++ b/gcc/config/frv/frv.h > @@ -115,7 +115,7 @@ > > Do not define this macro if it does not need to do anything. */ > /* For ABI compliance, we need to put bss data into the normal data section. */ > -#define CC1_SPEC "%{G*}" > +#define CC1_SPEC "%{G*}" SUBTARGET_CC1_SPEC > > #undef LINK_SPEC > #define LINK_SPEC "\ > diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h > index f16df633e84..f1ceb6b2557 100644 > --- a/gcc/config/i386/i386.h > +++ b/gcc/config/i386/i386.h > @@ -614,7 +614,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); > #define TARGET_D_HAS_STDCALL_CONVENTION ix86_d_has_stdcall_convention > > #ifndef CC1_SPEC > -#define CC1_SPEC "%(cc1_cpu) " > +#define CC1_SPEC "%(cc1_cpu) " SUBTARGET_CC1_SPEC > #endif > > /* This macro defines names of additional specifications to put in the > diff --git a/gcc/config/ia64/ia64.h b/gcc/config/ia64/ia64.h > index bd0ef35e9a4..0e11cef0edc 100644 > --- a/gcc/config/ia64/ia64.h > +++ b/gcc/config/ia64/ia64.h > @@ -51,7 +51,7 @@ do { \ > { "asm_extra", ASM_EXTRA_SPEC }, \ > SUBTARGET_EXTRA_SPECS > > -#define CC1_SPEC "%(cc1_cpu) " > +#define CC1_SPEC "%(cc1_cpu) " SUBTARGET_CC1_SPEC > > #define ASM_EXTRA_SPEC "" > > diff --git a/gcc/config/lm32/lm32.h b/gcc/config/lm32/lm32.h > index 23f66c90446..65a9141cd94 100644 > --- a/gcc/config/lm32/lm32.h > +++ b/gcc/config/lm32/lm32.h > @@ -63,7 +63,7 @@ > #define LIB_SPEC "%{!T*:-T sim.ld}" > > #undef CC1_SPEC > -#define CC1_SPEC "%{G*}" > +#define CC1_SPEC "%{G*}" SUBTARGET_CC1_SPEC > > /*---------------------------------*/ > /* Target machine storage layout. */ > diff --git a/gcc/config/m32r/m32r.h b/gcc/config/m32r/m32r.h > index b96eec8fe3f..38632683152 100644 > --- a/gcc/config/m32r/m32r.h > +++ b/gcc/config/m32r/m32r.h > @@ -155,7 +155,7 @@ > #define CPP_SPEC "%(cpp_cpu)" > > #undef CC1_SPEC > -#define CC1_SPEC "%{G*} %(cc1_cpu)" > +#define CC1_SPEC "%{G*} %(cc1_cpu)" SUBTARGET_CC1_SPEC > > /* Options to pass on to the assembler. */ > #undef ASM_SPEC > diff --git a/gcc/config/mcore/mcore.h b/gcc/config/mcore/mcore.h > index c905c4024f3..1a11d651b72 100644 > --- a/gcc/config/mcore/mcore.h > +++ b/gcc/config/mcore/mcore.h > @@ -82,7 +82,7 @@ > extern char * mcore_current_function_name; > > /* The MCore ABI says that bitfields are unsigned by default. */ > -#define CC1_SPEC "-funsigned-bitfields" > +#define CC1_SPEC "-funsigned-bitfields" SUBTARGET_CC1_SPEC > > /* Target machine storage Layout. */ > > diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h > index d28bc766de8..7ace9a07cfe 100644 > --- a/gcc/config/microblaze/microblaze.h > +++ b/gcc/config/microblaze/microblaze.h > @@ -119,7 +119,8 @@ extern enum pipeline_type microblaze_pipe; > %{G*} \ > %(subtarget_cc1_spec) \ > %{mxl-multiply-high:-mcpu=v6.00.a} \ > -" > +" \ > +SUBTARGET_CC1_SPEC > #endif > > #define EXTRA_SPECS \ > diff --git a/gcc/config/nds32/nds32.h b/gcc/config/nds32/nds32.h > index 18ef8ae9ee8..55366f0d29f 100644 > --- a/gcc/config/nds32/nds32.h > +++ b/gcc/config/nds32/nds32.h > @@ -962,7 +962,7 @@ enum nds32_builtins > {"float", "%{!mfloat-abi=*:-mfloat-abi=%(VALUE)}" } > > #define CC1_SPEC \ > - NDS32_EXT_DSP_SPEC > + NDS32_EXT_DSP_SPEC SUBTARGET_CC1_SPEC > > #define ASM_SPEC \ > " %{mbig-endian:-EB} %{mlittle-endian:-EL}" \ > diff --git a/gcc/config/nios2/nios2.h b/gcc/config/nios2/nios2.h > index 7c7d5c05fd7..60b052b945b 100644 > --- a/gcc/config/nios2/nios2.h > +++ b/gcc/config/nios2/nios2.h > @@ -58,7 +58,7 @@ > #define OPTION_DEFAULT_SPECS \ > {"arch", "%{!march=*:%{!mcpu=*:-march=%(VALUE)}}" } > > -#define CC1_SPEC "%{G*}" > +#define CC1_SPEC "%{G*}" SUBTARGET_CC1_SPEC > > #if TARGET_ENDIAN_DEFAULT == 0 > # define ASM_SPEC "%{!meb:-EL} %{meb:-EB} %{march=*:-march=%*}" > diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h > index 92d3d1841a9..dc14d5c0561 100644 > --- a/gcc/config/pa/pa.h > +++ b/gcc/config/pa/pa.h > @@ -202,7 +202,7 @@ do { \ > } \ > while (0) > > -#define CC1_SPEC "%{pg:} %{p:}" > +#define CC1_SPEC "%{pg:} %{p:}" SUBTARGET_CC1_SPEC > > #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}" > > diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h > index 7e2519de5d4..a6791654a5a 100644 > --- a/gcc/config/rs6000/sysv4.h > +++ b/gcc/config/rs6000/sysv4.h > @@ -585,7 +585,8 @@ ENDIAN_SELECT(" -mbig", " -mlittle", DEFAULT_ASM_ENDIAN) > %{msdata: -msdata=default} \ > %{mno-sdata: -msdata=none} \ > %{!mbss-plt: %{!msecure-plt: %(cc1_secure_plt_default)}}" \ > -GNU_USER_TARGET_CC1_SPEC > +GNU_USER_TARGET_CC1_SPEC \ > +SUBTARGET_CC1_SPEC > > /* Default starting address if specified. */ > #define LINK_START_SPEC "\ > diff --git a/gcc/config/rx/rx.h b/gcc/config/rx/rx.h > index ce9c2ff1278..eff426aa9e3 100644 > --- a/gcc/config/rx/rx.h > +++ b/gcc/config/rx/rx.h > @@ -79,7 +79,8 @@ > #define CC1_SPEC "\ > %{mas100-syntax:%{gdwarf*:%e-mas100-syntax is incompatible with -gdwarf}} \ > %{mcpu=rx100:%{fpu:%erx100 cpu does not have FPU hardware}} \ > - %{mcpu=rx200:%{fpu:%erx200 cpu does not have FPU hardware}}" > + %{mcpu=rx200:%{fpu:%erx200 cpu does not have FPU hardware}}" \ > + SUBTARGET_CC1_SPEC > > #undef STARTFILE_SPEC > #define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:crt0.o%s} crtbegin.o%s" > diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h > index 2e17fca197a..149de720367 100644 > --- a/gcc/config/sparc/sparc.h > +++ b/gcc/config/sparc/sparc.h > @@ -327,7 +327,7 @@ along with GCC; see the file COPYING3. If not see > /* This used to translate -dalign to -malign, but that is no good > because it can't turn off the usual meaning of making debugging dumps. */ > > -#define CC1_SPEC "" > +#define CC1_SPEC SUBTARGET_CC1_SPEC > > /* Override in target specific files. */ > #define ASM_CPU_SPEC "\ > diff --git a/gcc/gcc.cc b/gcc/gcc.cc > index 5cbb38560b2..abc076fe233 100644 > --- a/gcc/gcc.cc > +++ b/gcc/gcc.cc > @@ -703,10 +703,16 @@ proper position among the other output files. */ > #define CPP_SPEC "" > #endif > > +/* Subtargets can define SUBTARGET_CC1_SPEC to provide extra args to cc1 and > + cc1plus or extra switch-translations. */ > +#ifndef SUBTARGET_CC1_SPEC > +#define SUBTARGET_CC1_SPEC "" > +#endif > + > /* config.h can define CC1_SPEC to provide extra args to cc1 and cc1plus > or extra switch-translations. */ > #ifndef CC1_SPEC > -#define CC1_SPEC "" > +#define CC1_SPEC SUBTARGET_CC1_SPEC > #endif > > /* config.h can define CC1PLUS_SPEC to provide extra args to cc1plus