From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 64403 invoked by alias); 23 Oct 2017 17:35:13 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 64388 invoked by uid 89); 23 Oct 2017 17:35:13 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-11.3 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,RCVD_IN_SORBS_SPAM,SPF_PASS autolearn=ham version=3.3.2 spammy=087 X-HELO: mail-wm0-f49.google.com Received: from mail-wm0-f49.google.com (HELO mail-wm0-f49.google.com) (74.125.82.49) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 23 Oct 2017 17:35:11 +0000 Received: by mail-wm0-f49.google.com with SMTP id q132so11305862wmd.2 for ; Mon, 23 Oct 2017 10:35:10 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:mail-followup-to:subject:references:date :in-reply-to:message-id:user-agent:mime-version; bh=amxwNAjse7WtDPxN4LZemzmjacMYM0CYHPHvBWEXDp8=; b=dHB4h8tXb80xITzZqi0XJKeHNj4rzh9HydpHaXF2z+ZLQbGEoLI3Wy+A4g53fUPMD8 pf+CcRRNnE3ld7pbUwRhv2Ikqm0fpL/mcNkDy6PBWrR1/FUVu5ixsY8I246IgIAkYqTR cIRxMNqB3qzAyNytZyI+mn0+SwuoEz5KJ2ecmfTw18FXAFQqm6PdSuM7RZdhaHi2RrAz GK73WlkiBHTgv7TPgtco811Gl+GGtS5yFJV/CiOAaHGkWcTL5TjtiLDMpP2RrmesKhbx FszL7cfx0LfYFA6BIixHbzyzGzJ4Frla6EKWd7e9L3UoUhJ/kbABh6Vg8W+9sM4q2NAw thig== X-Gm-Message-State: AMCzsaWMi8o3aZcBjmgHP3uD6hzqs4E44zV0MraZXOivlthSwD6t/53S 5kUGs8x3JnYrRBV/BABtBWCUxrmfk2o= X-Google-Smtp-Source: ABhQp+Ru85XD+1ie8shpz5ueLgp+FkblS0MvYUFUgxeyXp4EQW9tzBRX9jyXyE0xkdYrLVxvqh/rLQ== X-Received: by 10.28.131.200 with SMTP id f191mr6488955wmd.39.1508780108838; Mon, 23 Oct 2017 10:35:08 -0700 (PDT) Received: from localhost ([2.26.27.199]) by smtp.gmail.com with ESMTPSA id u7sm5114704wmf.15.2017.10.23.10.35.07 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 23 Oct 2017 10:35:07 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@linaro.org Subject: [087/nnn] poly_int: subreg_get_info References: <871sltvm7r.fsf@linaro.org> Date: Mon, 23 Oct 2017 17:35:00 -0000 In-Reply-To: <871sltvm7r.fsf@linaro.org> (Richard Sandiford's message of "Mon, 23 Oct 2017 17:54:32 +0100") Message-ID: <87d15dg438.fsf@linaro.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2017-10/txt/msg01588.txt.bz2 This patch makes subreg_get_info handle polynomial sizes. 2017-10-23 Richard Sandiford Alan Hayward David Sherwood gcc/ * rtlanal.c (subreg_get_info): Handle polynomial mode sizes. Index: gcc/rtlanal.c =================================================================== --- gcc/rtlanal.c 2017-10-23 17:25:30.705135972 +0100 +++ gcc/rtlanal.c 2017-10-23 17:25:32.610067499 +0100 @@ -3694,8 +3694,9 @@ subreg_get_info (unsigned int xregno, ma gcc_assert (xregno < FIRST_PSEUDO_REGISTER); - unsigned int xsize = GET_MODE_SIZE (xmode); - unsigned int ysize = GET_MODE_SIZE (ymode); + poly_uint64 xsize = GET_MODE_SIZE (xmode); + poly_uint64 ysize = GET_MODE_SIZE (ymode); + bool rknown = false; /* If the register representation of a non-scalar mode has holes in it, @@ -3707,6 +3708,7 @@ subreg_get_info (unsigned int xregno, ma /* As a consequence, we must be dealing with a constant number of scalars, and thus a constant offset. */ HOST_WIDE_INT coffset = offset.to_constant (); + HOST_WIDE_INT cysize = ysize.to_constant (); nregs_xmode = HARD_REGNO_NREGS_WITH_PADDING (xregno, xmode); unsigned int nunits = GET_MODE_NUNITS (xmode); scalar_mode xmode_unit = GET_MODE_INNER (xmode); @@ -3727,7 +3729,7 @@ subreg_get_info (unsigned int xregno, ma of each unit. */ if ((coffset / GET_MODE_SIZE (xmode_unit) + 1 < nunits) && (coffset / GET_MODE_SIZE (xmode_unit) - != ((coffset + ysize - 1) / GET_MODE_SIZE (xmode_unit)))) + != ((coffset + cysize - 1) / GET_MODE_SIZE (xmode_unit)))) { info->representable_p = false; rknown = true; @@ -3738,8 +3740,12 @@ subreg_get_info (unsigned int xregno, ma nregs_ymode = hard_regno_nregs (xregno, ymode); + /* Subreg sizes must be ordered, so that we can tell whether they are + partial, paradoxical or complete. */ + gcc_checking_assert (ordered_p (xsize, ysize)); + /* Paradoxical subregs are otherwise valid. */ - if (!rknown && known_zero (offset) && ysize > xsize) + if (!rknown && known_zero (offset) && may_gt (ysize, xsize)) { info->representable_p = true; /* If this is a big endian paradoxical subreg, which uses more @@ -3761,20 +3767,19 @@ subreg_get_info (unsigned int xregno, ma /* If registers store different numbers of bits in the different modes, we cannot generally form this subreg. */ + poly_uint64 regsize_xmode, regsize_ymode; if (!HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode) && !HARD_REGNO_NREGS_HAS_PADDING (xregno, ymode) - && (xsize % nregs_xmode) == 0 - && (ysize % nregs_ymode) == 0) + && multiple_p (xsize, nregs_xmode, ®size_xmode) + && multiple_p (ysize, nregs_ymode, ®size_ymode)) { - int regsize_xmode = xsize / nregs_xmode; - int regsize_ymode = ysize / nregs_ymode; if (!rknown - && ((nregs_ymode > 1 && regsize_xmode > regsize_ymode) - || (nregs_xmode > 1 && regsize_ymode > regsize_xmode))) + && ((nregs_ymode > 1 && may_gt (regsize_xmode, regsize_ymode)) + || (nregs_xmode > 1 && may_gt (regsize_ymode, regsize_xmode)))) { info->representable_p = false; - info->nregs = CEIL (ysize, regsize_xmode); - if (!can_div_trunc_p (offset, regsize_xmode, &info->offset)) + if (!can_div_away_from_zero_p (ysize, regsize_xmode, &info->nregs) + || !can_div_trunc_p (offset, regsize_xmode, &info->offset)) /* Checked by validate_subreg. We must know at compile time which inner registers are being accessed. */ gcc_unreachable (); @@ -3800,7 +3805,7 @@ subreg_get_info (unsigned int xregno, ma HOST_WIDE_INT count; if (!rknown && WORDS_BIG_ENDIAN == REG_WORDS_BIG_ENDIAN - && regsize_xmode == regsize_ymode + && must_eq (regsize_xmode, regsize_ymode) && constant_multiple_p (offset, regsize_ymode, &count)) { info->representable_p = true; @@ -3837,8 +3842,7 @@ subreg_get_info (unsigned int xregno, ma be exact, otherwise we don't know how to verify the constraint. These conditions may be relaxed but subreg_regno_offset would need to be redesigned. */ - gcc_assert ((xsize % num_blocks) == 0); - poly_uint64 bytes_per_block = xsize / num_blocks; + poly_uint64 bytes_per_block = exact_div (xsize, num_blocks); /* Get the number of the first block that contains the subreg and the byte offset of the subreg from the start of that block. */