From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 92229 invoked by alias); 23 Oct 2017 17:19:50 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 92050 invoked by uid 89); 23 Oct 2017 17:19:50 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-11.3 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,RCVD_IN_SORBS_SPAM,SPF_PASS autolearn=ham version=3.3.2 spammy=opera, 15727 X-HELO: mail-wr0-f175.google.com Received: from mail-wr0-f175.google.com (HELO mail-wr0-f175.google.com) (209.85.128.175) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 23 Oct 2017 17:19:48 +0000 Received: by mail-wr0-f175.google.com with SMTP id g90so18145682wrd.6 for ; Mon, 23 Oct 2017 10:19:48 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:mail-followup-to:subject:references:date :in-reply-to:message-id:user-agent:mime-version; bh=xVMxMhGH7IqxZn8RV5hr/scgccQCC+sbqfizv2RCBuE=; b=GyLtS1Sz8tt3rFV5F3LKJZGuIegx4CmOLZCT+iu0/PK7+7+MlybX/0nLIEF9U4GowV YrMQtW+q0+sNJESHpGwPdWWZ2JZq+Ti7r+MGZUKKp4F/iSaU9mO0agCynWqC5/9DQMAI 6Fz2wvLsPWIqS/d2UP8uXxHFzo8e5n/2sVf2hf1NPmojc8ARtu87tCQch4hPcHT18y8i NjDGaGtYxmFhgJc5VU20SZ+q2wkVTRS402GwlOa6jHpeTCxg5olhNhWgWlLFvZ0Zspy9 p/S6zR0tb7tO9NeyeSi2YZ/ukEPhfwy1GnU7ivd+RJTRpijeR7gk3506xgNIb/Tmhloy UE3w== X-Gm-Message-State: AMCzsaXRS9CS0QlypUbCQHPVF4UP5gv9ObSfY71HbEmSMG5emZGVmwoA pI+2Lo1UYK6PKxseCozobmnzWwCz1lM= X-Google-Smtp-Source: ABhQp+Q8IsKkvLgfkphe45ZOWbU2NORou2QLAwVjS4JTjri6HGf/fGcvHPB/zXxdszL+8G4abjIozg== X-Received: by 10.223.167.154 with SMTP id j26mr11071928wrc.174.1508779186111; Mon, 23 Oct 2017 10:19:46 -0700 (PDT) Received: from localhost ([2.26.27.199]) by smtp.gmail.com with ESMTPSA id x73sm5487053wme.34.2017.10.23.10.19.45 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 23 Oct 2017 10:19:45 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@linaro.org Subject: [046/nnn] poly_int: instantiate_virtual_regs References: <871sltvm7r.fsf@linaro.org> Date: Mon, 23 Oct 2017 17:20:00 -0000 In-Reply-To: <871sltvm7r.fsf@linaro.org> (Richard Sandiford's message of "Mon, 23 Oct 2017 17:54:32 +0100") Message-ID: <87d15dn5n3.fsf@linaro.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2017-10/txt/msg01547.txt.bz2 This patch makes the instantiate virtual regs pass track offsets as poly_ints. 2017-10-23 Richard Sandiford Alan Hayward David Sherwood gcc/ * function.c (in_arg_offset, var_offset, dynamic_offset) (out_arg_offset, cfa_offset): Change from int to poly_int64. (instantiate_new_reg): Return the new offset as a poly_int64_pod rather than a HOST_WIDE_INT. (instantiate_virtual_regs_in_rtx): Track polynomial offsets. (instantiate_virtual_regs_in_insn): Likewise. Index: gcc/function.c =================================================================== --- gcc/function.c 2017-10-23 17:18:53.834514759 +0100 +++ gcc/function.c 2017-10-23 17:18:59.743148042 +0100 @@ -1367,11 +1367,11 @@ initial_value_entry (int i, rtx *hreg, r routines. They contain the offsets of the virtual registers from their respective hard registers. */ -static int in_arg_offset; -static int var_offset; -static int dynamic_offset; -static int out_arg_offset; -static int cfa_offset; +static poly_int64 in_arg_offset; +static poly_int64 var_offset; +static poly_int64 dynamic_offset; +static poly_int64 out_arg_offset; +static poly_int64 cfa_offset; /* In most machines, the stack pointer register is equivalent to the bottom of the stack. */ @@ -1418,10 +1418,10 @@ #define STACK_DYNAMIC_OFFSET(FNDECL) \ offset indirectly through the pointer. Otherwise, return 0. */ static rtx -instantiate_new_reg (rtx x, HOST_WIDE_INT *poffset) +instantiate_new_reg (rtx x, poly_int64_pod *poffset) { rtx new_rtx; - HOST_WIDE_INT offset; + poly_int64 offset; if (x == virtual_incoming_args_rtx) { @@ -1480,7 +1480,7 @@ instantiate_virtual_regs_in_rtx (rtx *lo if (rtx x = *loc) { rtx new_rtx; - HOST_WIDE_INT offset; + poly_int64 offset; switch (GET_CODE (x)) { case REG: @@ -1533,7 +1533,7 @@ safe_insn_predicate (int code, int opera static void instantiate_virtual_regs_in_insn (rtx_insn *insn) { - HOST_WIDE_INT offset; + poly_int64 offset; int insn_code, i; bool any_change = false; rtx set, new_rtx, x; @@ -1572,7 +1572,8 @@ instantiate_virtual_regs_in_insn (rtx_in to the generic case is avoiding a new pseudo and eliminating a move insn in the initial rtl stream. */ new_rtx = instantiate_new_reg (SET_SRC (set), &offset); - if (new_rtx && offset != 0 + if (new_rtx + && maybe_nonzero (offset) && REG_P (SET_DEST (set)) && REGNO (SET_DEST (set)) > LAST_VIRTUAL_REGISTER) { @@ -1598,17 +1599,18 @@ instantiate_virtual_regs_in_insn (rtx_in /* Handle a plus involving a virtual register by determining if the operands remain valid if they're modified in place. */ + poly_int64 delta; if (GET_CODE (SET_SRC (set)) == PLUS && recog_data.n_operands >= 3 && recog_data.operand_loc[1] == &XEXP (SET_SRC (set), 0) && recog_data.operand_loc[2] == &XEXP (SET_SRC (set), 1) - && CONST_INT_P (recog_data.operand[2]) + && poly_int_rtx_p (recog_data.operand[2], &delta) && (new_rtx = instantiate_new_reg (recog_data.operand[1], &offset))) { - offset += INTVAL (recog_data.operand[2]); + offset += delta; /* If the sum is zero, then replace with a plain move. */ - if (offset == 0 + if (known_zero (offset) && REG_P (SET_DEST (set)) && REGNO (SET_DEST (set)) > LAST_VIRTUAL_REGISTER) { @@ -1686,7 +1688,7 @@ instantiate_virtual_regs_in_insn (rtx_in new_rtx = instantiate_new_reg (x, &offset); if (new_rtx == NULL) continue; - if (offset == 0) + if (known_zero (offset)) x = new_rtx; else { @@ -1711,7 +1713,7 @@ instantiate_virtual_regs_in_insn (rtx_in new_rtx = instantiate_new_reg (SUBREG_REG (x), &offset); if (new_rtx == NULL) continue; - if (offset != 0) + if (maybe_nonzero (offset)) { start_sequence (); new_rtx = expand_simple_binop