From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 73235 invoked by alias); 9 Dec 2017 23:08:20 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 73223 invoked by uid 89); 9 Dec 2017 23:08:20 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-11.0 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_2,GIT_PATCH_3,KAM_ASCII_DIVIDERS,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-wm0-f44.google.com Received: from mail-wm0-f44.google.com (HELO mail-wm0-f44.google.com) (74.125.82.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Sat, 09 Dec 2017 23:08:18 +0000 Received: by mail-wm0-f44.google.com with SMTP id y82so8692549wmg.1 for ; Sat, 09 Dec 2017 15:08:18 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:mail-followup-to:subject:references:date :in-reply-to:message-id:user-agent:mime-version; bh=IkATfMeoK51th1afG+HL9Uek4ezpnhyoZXBFj6psWE8=; b=Z6sisVTIWP6AFAQmEJy7KVnuyin6+qfWCYw5g+Tr1IYk3Q5kWwtbcJSzCWxjgYQBXN DfH+3WdG26AxGoVbHrHJCz/KKaR15z/xXUfzd/HaFpt0ulWDsxMJPU19Jr3TA0mEWAe4 aE5rU0wWfGmV5KCQV/Ku6XJWqJ/SPgU67deEzM1OJtAkJqNZmErTJv9K8Y6gvzAV4iZ8 bGRW3lLqC0Exs5+2smrgwO3axQTRxW4FDD5orXcqF/cXVCjXADlKg2okr+B5T9bD2a/B 9HDlRQfSu1Ft/L9RUIR3i+zjTbrCf6FlQbTzWBrPvY87CltOWUkNNgoK8q1Qd0nPqKj+ t0RA== X-Gm-Message-State: AKGB3mId7XDLduBrioQghBKH3YVcpwgWMq0w20Pku34ErORsWq8py2pr YxsgbvKft5Y93RAp4WZXVt9SejNi9FY= X-Google-Smtp-Source: AGs4zMZ0Od/vU1xGuRukAoPnoRdQkeFCe3gpxY6Ea/aS8S1TX/GtxA5sN2t+Z2VcMosb1vkzsrRCSQ== X-Received: by 10.28.92.146 with SMTP id q140mr7868964wmb.41.1512860896581; Sat, 09 Dec 2017 15:08:16 -0800 (PST) Received: from localhost ([2.25.234.120]) by smtp.gmail.com with ESMTPSA id 43sm12958978wru.81.2017.12.09.15.08.15 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 09 Dec 2017 15:08:15 -0800 (PST) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@linaro.org Subject: [01/13] Add a qimode_for_vec_perm helper function References: <87indfmrgt.fsf@linaro.org> Date: Sat, 09 Dec 2017 23:08:00 -0000 In-Reply-To: <87indfmrgt.fsf@linaro.org> (Richard Sandiford's message of "Sat, 09 Dec 2017 23:06:26 +0000") Message-ID: <87efo3mrds.fsf@linaro.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2017-12/txt/msg00554.txt.bz2 The vec_perm code falls back to doing byte-level permutes if element-level permutes aren't supported. There were two copies of the code to calculate the mode, and later patches add another, so this patch splits it out into a helper function. 2017-12-09 Richard Sandiford gcc/ * optabs-query.h (qimode_for_vec_perm): Declare. * optabs-query.c (can_vec_perm_p): Split out qimode search to... (qimode_for_vec_perm): ...this new function. * optabs.c (expand_vec_perm): Use qimode_for_vec_perm. Index: gcc/optabs-query.h =================================================================== --- gcc/optabs-query.h 2017-12-09 22:47:12.476364764 +0000 +++ gcc/optabs-query.h 2017-12-09 22:47:14.730310076 +0000 @@ -174,6 +174,7 @@ enum insn_code can_extend_p (machine_mod enum insn_code can_float_p (machine_mode, machine_mode, int); enum insn_code can_fix_p (machine_mode, machine_mode, int, bool *); bool can_conditionally_move_p (machine_mode mode); +opt_machine_mode qimode_for_vec_perm (machine_mode); bool can_vec_perm_p (machine_mode, bool, vec_perm_indices *); /* Find a widening optab even if it doesn't widen as much as we want. */ #define find_widening_optab_handler(A, B, C) \ Index: gcc/optabs-query.c =================================================================== --- gcc/optabs-query.c 2017-12-09 22:47:12.476364764 +0000 +++ gcc/optabs-query.c 2017-12-09 22:47:14.729310075 +0000 @@ -345,6 +345,22 @@ can_conditionally_move_p (machine_mode m return direct_optab_handler (movcc_optab, mode) != CODE_FOR_nothing; } +/* If a target doesn't implement a permute on a vector with multibyte + elements, we can try to do the same permute on byte elements. + If this makes sense for vector mode MODE then return the appropriate + byte vector mode. */ + +opt_machine_mode +qimode_for_vec_perm (machine_mode mode) +{ + machine_mode qimode; + if (GET_MODE_INNER (mode) != QImode + && mode_for_vector (QImode, GET_MODE_SIZE (mode)).exists (&qimode) + && VECTOR_MODE_P (qimode)) + return qimode; + return opt_machine_mode (); +} + /* Return true if VEC_PERM_EXPR of arbitrary input vectors can be expanded using SIMD extensions of the CPU. SEL may be NULL, which stands for an unknown constant. Note that additional permutations @@ -375,9 +391,7 @@ can_vec_perm_p (machine_mode mode, bool return true; /* We allow fallback to a QI vector mode, and adjust the mask. */ - if (GET_MODE_INNER (mode) == QImode - || !mode_for_vector (QImode, GET_MODE_SIZE (mode)).exists (&qimode) - || !VECTOR_MODE_P (qimode)) + if (!qimode_for_vec_perm (mode).exists (&qimode)) return false; /* ??? For completeness, we ought to check the QImode version of Index: gcc/optabs.c =================================================================== --- gcc/optabs.c 2017-12-09 22:47:12.476364764 +0000 +++ gcc/optabs.c 2017-12-09 22:47:14.731310077 +0000 @@ -5452,9 +5452,7 @@ expand_vec_perm (machine_mode mode, rtx /* Set QIMODE to a different vector mode with byte elements. If no such mode, or if MODE already has byte elements, use VOIDmode. */ - if (GET_MODE_INNER (mode) == QImode - || !mode_for_vector (QImode, w).exists (&qimode) - || !VECTOR_MODE_P (qimode)) + if (!qimode_for_vec_perm (mode).exists (&qimode)) qimode = VOIDmode; /* If the input is a constant, expand it specially. */