* [PATCH] Fix PR target/70669 (allow __float128 to use direct move)
@ 2016-04-14 22:43 Michael Meissner
2016-04-14 23:07 ` David Edelsohn
2016-05-02 13:55 ` Andreas Schwab
0 siblings, 2 replies; 3+ messages in thread
From: Michael Meissner @ 2016-04-14 22:43 UTC (permalink / raw)
To: gcc-patches, dje.gcc
[-- Attachment #1: Type: text/plain, Size: 878 bytes --]
When adding the basic __float128 support, I forgot to enable direct move
support for moving __float128 between VSX registers and GPR registers.
This patch enables using direct move for __float128 variables on Power8
systems. I bootstrapped the compiler and found no regressions with this
patch. Is it ok to apply to the GCC trunk?
[gcc]
2016-04-14 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/70669
* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Add
direct move handlers for KFmode. Change TFmode handlers test from
FLOAT128_IEEE_P to FLOAT128_VECTOR_P.
[gcc/testsuite]
2016-04-14 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/70669
* gcc.target/powerpc/pr70669.c: New test.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797
[-- Attachment #2: pr70669.patch01b --]
[-- Type: text/plain, Size: 4167 bytes --]
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 234910)
+++ gcc/config/rs6000/rs6000.c (working copy)
@@ -3132,8 +3132,6 @@ rs6000_init_hard_regno_mode_ok (bool glo
reg_addr[V4SFmode].reload_load = CODE_FOR_reload_v4sf_di_load;
reg_addr[V2DFmode].reload_store = CODE_FOR_reload_v2df_di_store;
reg_addr[V2DFmode].reload_load = CODE_FOR_reload_v2df_di_load;
- reg_addr[KFmode].reload_store = CODE_FOR_reload_kf_di_store;
- reg_addr[KFmode].reload_load = CODE_FOR_reload_kf_di_load;
reg_addr[DFmode].reload_store = CODE_FOR_reload_df_di_store;
reg_addr[DFmode].reload_load = CODE_FOR_reload_df_di_load;
reg_addr[DDmode].reload_store = CODE_FOR_reload_dd_di_store;
@@ -3141,7 +3139,13 @@ rs6000_init_hard_regno_mode_ok (bool glo
reg_addr[SFmode].reload_store = CODE_FOR_reload_sf_di_store;
reg_addr[SFmode].reload_load = CODE_FOR_reload_sf_di_load;
- if (FLOAT128_IEEE_P (TFmode))
+ if (FLOAT128_VECTOR_P (KFmode))
+ {
+ reg_addr[KFmode].reload_store = CODE_FOR_reload_kf_di_store;
+ reg_addr[KFmode].reload_load = CODE_FOR_reload_kf_di_load;
+ }
+
+ if (FLOAT128_VECTOR_P (TFmode))
{
reg_addr[TFmode].reload_store = CODE_FOR_reload_tf_di_store;
reg_addr[TFmode].reload_load = CODE_FOR_reload_tf_di_load;
@@ -3182,6 +3186,18 @@ rs6000_init_hard_regno_mode_ok (bool glo
reg_addr[V8HImode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprv8hi;
reg_addr[V16QImode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprv16qi;
reg_addr[SFmode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprsf;
+
+ if (FLOAT128_VECTOR_P (KFmode))
+ {
+ reg_addr[KFmode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxkf;
+ reg_addr[KFmode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprkf;
+ }
+
+ if (FLOAT128_VECTOR_P (TFmode))
+ {
+ reg_addr[TFmode].reload_gpr_vsx = CODE_FOR_reload_gpr_from_vsxtf;
+ reg_addr[TFmode].reload_vsx_gpr = CODE_FOR_reload_vsx_from_gprtf;
+ }
}
}
else
@@ -3200,8 +3216,6 @@ rs6000_init_hard_regno_mode_ok (bool glo
reg_addr[V4SFmode].reload_load = CODE_FOR_reload_v4sf_si_load;
reg_addr[V2DFmode].reload_store = CODE_FOR_reload_v2df_si_store;
reg_addr[V2DFmode].reload_load = CODE_FOR_reload_v2df_si_load;
- reg_addr[KFmode].reload_store = CODE_FOR_reload_kf_si_store;
- reg_addr[KFmode].reload_load = CODE_FOR_reload_kf_si_load;
reg_addr[DFmode].reload_store = CODE_FOR_reload_df_si_store;
reg_addr[DFmode].reload_load = CODE_FOR_reload_df_si_load;
reg_addr[DDmode].reload_store = CODE_FOR_reload_dd_si_store;
@@ -3209,6 +3223,12 @@ rs6000_init_hard_regno_mode_ok (bool glo
reg_addr[SFmode].reload_store = CODE_FOR_reload_sf_si_store;
reg_addr[SFmode].reload_load = CODE_FOR_reload_sf_si_load;
+ if (FLOAT128_VECTOR_P (KFmode))
+ {
+ reg_addr[KFmode].reload_store = CODE_FOR_reload_kf_si_store;
+ reg_addr[KFmode].reload_load = CODE_FOR_reload_kf_si_load;
+ }
+
if (FLOAT128_IEEE_P (TFmode))
{
reg_addr[TFmode].reload_store = CODE_FOR_reload_tf_si_store;
Index: gcc/testsuite/gcc.target/powerpc/pr70669.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr70669.c (revision 0)
+++ gcc/testsuite/gcc.target/powerpc/pr70669.c (working copy)
@@ -0,0 +1,22 @@
+/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-options "-O2 -mcpu=power8 -mfloat128" } */
+
+#ifndef TYPE
+#define TYPE __float128
+#endif
+
+void foo (TYPE *p, TYPE *q)
+{
+ TYPE r = *q;
+#ifndef NO_ASM
+ __asm__ (" # %0" : "+r" (r));
+#endif
+ *p = r;
+}
+
+/* { dg-final { scan-assembler "mfvsrd" } } */
+/* { dg-final { scan-assembler "mtvsrd" } } */
+/* { dg-final { scan-assembler-times "stxvd2x" 1 } } */
+/* { dg-final { scan-assembler-times "lxvd2x" 1 } } */
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] Fix PR target/70669 (allow __float128 to use direct move)
2016-04-14 22:43 [PATCH] Fix PR target/70669 (allow __float128 to use direct move) Michael Meissner
@ 2016-04-14 23:07 ` David Edelsohn
2016-05-02 13:55 ` Andreas Schwab
1 sibling, 0 replies; 3+ messages in thread
From: David Edelsohn @ 2016-04-14 23:07 UTC (permalink / raw)
To: Michael Meissner, GCC Patches
On Thu, Apr 14, 2016 at 6:43 PM, Michael Meissner
<meissner@linux.vnet.ibm.com> wrote:
> When adding the basic __float128 support, I forgot to enable direct move
> support for moving __float128 between VSX registers and GPR registers.
>
> This patch enables using direct move for __float128 variables on Power8
> systems. I bootstrapped the compiler and found no regressions with this
> patch. Is it ok to apply to the GCC trunk?
>
> [gcc]
> 2016-04-14 Michael Meissner <meissner@linux.vnet.ibm.com>
>
> PR target/70669
> * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Add
> direct move handlers for KFmode. Change TFmode handlers test from
> FLOAT128_IEEE_P to FLOAT128_VECTOR_P.
>
> [gcc/testsuite]
> 2016-04-14 Michael Meissner <meissner@linux.vnet.ibm.com>
>
> PR target/70669
> * gcc.target/powerpc/pr70669.c: New test.
Okay.
Thanks, David
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] Fix PR target/70669 (allow __float128 to use direct move)
2016-04-14 22:43 [PATCH] Fix PR target/70669 (allow __float128 to use direct move) Michael Meissner
2016-04-14 23:07 ` David Edelsohn
@ 2016-05-02 13:55 ` Andreas Schwab
1 sibling, 0 replies; 3+ messages in thread
From: Andreas Schwab @ 2016-05-02 13:55 UTC (permalink / raw)
To: Michael Meissner; +Cc: gcc-patches, dje.gcc
Michael Meissner <meissner@linux.vnet.ibm.com> writes:
> PR target/70669
> * gcc.target/powerpc/pr70669.c: New test.
FAIL: gcc.target/powerpc/pr70669.c scan-assembler mtvsrd
FAIL: gcc.target/powerpc/pr70669.c scan-assembler-times stxvd2x 1
foo:
.quad .L.foo,.TOC.@tocbase,0
.previous
.type foo, @function
.L.foo:
lxvd2x 12,0,4
xxpermdi 11,12,12,3
mfvsrd 10,12
mfvsrd 11,11
#APP
# 14 "/daten/gcc/gcc-20160501/gcc/testsuite/gcc.target/powerpc/pr70669.c" 1
# 10
# 0 "" 2
#NO_APP
std 10,0(3)
std 11,8(3)
blr
Andreas.
--
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
"And now for something completely different."
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2016-04-14 22:43 [PATCH] Fix PR target/70669 (allow __float128 to use direct move) Michael Meissner
2016-04-14 23:07 ` David Edelsohn
2016-05-02 13:55 ` Andreas Schwab
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