Re: [PATCH, MIPS] Add seq Octeon instruction

[Richard Sandiford <rdsandiford@googlemail.com>]

Adam Nemet <anemet@caviumnetworks.com> writes:
> Richard Sandiford wrote:
>> So if we want to use sltiu for zero comparisons, I think
>> it would be technically better to have something like:
>> 
>> (define_insn "*seq_<GPR:mode><GPR2:mode>_seq"
>>   [(set (match_operand:GPR2 0 "register_operand" "=d,d,d")
>> 	(eq:GPR2 (match_operand:GPR 1 "register_operand" "%d,d,d")
>> 		 (match_operand:GPR 2 "reg_imm10_operand" "d,J,YB")))]
>>   "ISA_HAS_SEQ_SNE"
>>   "@
>>     seq\t%0,%1,%2
>>     sltiu\t%0,%1,1
>>     seqi\t%0,%1,%2"
>>   [(set_attr "type" "slt")
>>    (set_attr "mode" "<GPR:MODE>")])
>
> Here it is.  Bootstrapped and tested on mips64octeon-unknown-linux-gnu.
>
> I had to slightly modify the tests (even existing ones) to accept both
> sltu and sltiu in the assembly.
>
> Looks good?

Yes, thanks.  OK for trunk.

TBH, I'm curious why it's better to use sltiu over the new instructions
for the zero case.  Is it just tradition?  Or is there some performance
benefit?  The patch is OK regardless, but if there's something you could
add as a comment, that'd be great.

Richard