From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 95856 invoked by alias); 23 Oct 2017 16:59:38 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 95847 invoked by uid 89); 23 Oct 2017 16:59:38 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-10.9 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_2,GIT_PATCH_3,KAM_ASCII_DIVIDERS,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-wr0-f171.google.com Received: from mail-wr0-f171.google.com (HELO mail-wr0-f171.google.com) (209.85.128.171) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 23 Oct 2017 16:59:36 +0000 Received: by mail-wr0-f171.google.com with SMTP id y39so18112093wrd.4 for ; Mon, 23 Oct 2017 09:59:36 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:mail-followup-to:subject:references:date :in-reply-to:message-id:user-agent:mime-version; bh=KRsp4p0ixPeJgs/pVXgpAkMsPtTEr2P4DunWpLDwBk4=; b=HOaehV99IgTkA9bUEJGDO1UazHMWqeE6GxCa0uZcd6+RjpGmexjR2CjUO3ckW0u/TH SGKeICXo8K3eb1pFFSjAnUkBChDbjQ+ZiYYJEuG/3II1fTzOZ4WKmKSV3gwDf2vObAlE wROmzPOQDFVo7lf4bXCsQtf1WMWlE22/HCVOzVF6aGm74FwIiS7aLRkTI+0prC3uv+Yu EulSnT78l65aH8jaiQklV4RVWLpoBnasIKPPq1Y3IErngaezZjgCBiE8WeWHVZTRyCbz 1eAmgl7CAd6qwreVtv9z1EmHAGS0wFT+gPeWjz4qcWAWOJos0XlHvZ59LXXkUGkOEm5q ambw== X-Gm-Message-State: AMCzsaWZ3+bKsU3z3kSe00TMnZl3ZeGcYufg+kODT6DdJaZ0TVuE27i0 9Trhu/8dDUktJtw+DjeFlO+l3TRlPXg= X-Google-Smtp-Source: ABhQp+SK8nomILJ5FZlKf7DYMy+6w5pfgdnJeBltBhWB75CqcoL4bnKFcsKhzQIuqCcppFVfpmX9FA== X-Received: by 10.223.168.45 with SMTP id l42mr11723617wrc.15.1508777974130; Mon, 23 Oct 2017 09:59:34 -0700 (PDT) Received: from localhost ([2.26.27.199]) by smtp.gmail.com with ESMTPSA id u7sm5046971wmf.15.2017.10.23.09.59.32 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 23 Oct 2017 09:59:33 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@linaro.org Subject: [003/nnn] poly_int: MACRO_MODE References: <871sltvm7r.fsf@linaro.org> Date: Mon, 23 Oct 2017 17:00:00 -0000 In-Reply-To: <871sltvm7r.fsf@linaro.org> (Richard Sandiford's message of "Mon, 23 Oct 2017 17:54:32 +0100") Message-ID: <87lgk1u7ez.fsf@linaro.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2017-10/txt/msg01503.txt.bz2 This patch uses a MACRO_MODE wrapper for the target macro invocations in targhooks.c and address.h, so that macros for non-AArch64 targets can continue to treat modes as fixed-size. It didn't seem worth converting the address macros to hooks since (a) they're heavily used, (b) they should be probably be replaced with a different interface rather than converted to hooks as-is, and most importantly (c) addresses.h already localises the problem. 2017-10-23 Richard Sandiford Alan Hayward David Sherwood gcc/ * machmode.h (MACRO_MODE): New macro. * addresses.h (base_reg_class, ok_for_base_p_1): Use it. * targhooks.c (default_libcall_value, default_secondary_reload) (default_memory_move_cost, default_register_move_cost) (default_class_max_nregs): Likewise. Index: gcc/machmode.h =================================================================== --- gcc/machmode.h 2017-10-23 16:52:20.675923636 +0100 +++ gcc/machmode.h 2017-10-23 17:00:49.664349224 +0100 @@ -685,6 +685,17 @@ fixed_size_mode::includes_p (machine_mod return true; } +/* Wrapper for mode arguments to target macros, so that if a target + doesn't need polynomial-sized modes, its header file can continue + to treat everything as fixed_size_mode. This should go away once + macros are moved to target hooks. It shouldn't be used in other + contexts. */ +#if NUM_POLY_INT_COEFFS == 1 +#define MACRO_MODE(MODE) (as_a (MODE)) +#else +#define MACRO_MODE(MODE) (MODE) +#endif + extern opt_machine_mode mode_for_size (unsigned int, enum mode_class, int); /* Return the machine mode to use for a MODE_INT of SIZE bits, if one Index: gcc/addresses.h =================================================================== --- gcc/addresses.h 2017-10-23 16:52:20.675923636 +0100 +++ gcc/addresses.h 2017-10-23 17:00:49.663350133 +0100 @@ -31,14 +31,15 @@ base_reg_class (machine_mode mode ATTRIB enum rtx_code index_code ATTRIBUTE_UNUSED) { #ifdef MODE_CODE_BASE_REG_CLASS - return MODE_CODE_BASE_REG_CLASS (mode, as, outer_code, index_code); + return MODE_CODE_BASE_REG_CLASS (MACRO_MODE (mode), as, outer_code, + index_code); #else #ifdef MODE_BASE_REG_REG_CLASS if (index_code == REG) - return MODE_BASE_REG_REG_CLASS (mode); + return MODE_BASE_REG_REG_CLASS (MACRO_MODE (mode)); #endif #ifdef MODE_BASE_REG_CLASS - return MODE_BASE_REG_CLASS (mode); + return MODE_BASE_REG_CLASS (MACRO_MODE (mode)); #else return BASE_REG_CLASS; #endif @@ -58,15 +59,15 @@ ok_for_base_p_1 (unsigned regno ATTRIBUT enum rtx_code index_code ATTRIBUTE_UNUSED) { #ifdef REGNO_MODE_CODE_OK_FOR_BASE_P - return REGNO_MODE_CODE_OK_FOR_BASE_P (regno, mode, as, + return REGNO_MODE_CODE_OK_FOR_BASE_P (regno, MACRO_MODE (mode), as, outer_code, index_code); #else #ifdef REGNO_MODE_OK_FOR_REG_BASE_P if (index_code == REG) - return REGNO_MODE_OK_FOR_REG_BASE_P (regno, mode); + return REGNO_MODE_OK_FOR_REG_BASE_P (regno, MACRO_MODE (mode)); #endif #ifdef REGNO_MODE_OK_FOR_BASE_P - return REGNO_MODE_OK_FOR_BASE_P (regno, mode); + return REGNO_MODE_OK_FOR_BASE_P (regno, MACRO_MODE (mode)); #else return REGNO_OK_FOR_BASE_P (regno); #endif Index: gcc/targhooks.c =================================================================== --- gcc/targhooks.c 2017-10-23 17:00:20.920834919 +0100 +++ gcc/targhooks.c 2017-10-23 17:00:49.664349224 +0100 @@ -941,7 +941,7 @@ default_libcall_value (machine_mode mode const_rtx fun ATTRIBUTE_UNUSED) { #ifdef LIBCALL_VALUE - return LIBCALL_VALUE (mode); + return LIBCALL_VALUE (MACRO_MODE (mode)); #else gcc_unreachable (); #endif @@ -1071,11 +1071,13 @@ default_secondary_reload (bool in_p ATTR } #ifdef SECONDARY_INPUT_RELOAD_CLASS if (in_p) - rclass = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x); + rclass = SECONDARY_INPUT_RELOAD_CLASS (reload_class, + MACRO_MODE (reload_mode), x); #endif #ifdef SECONDARY_OUTPUT_RELOAD_CLASS if (! in_p) - rclass = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x); + rclass = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, + MACRO_MODE (reload_mode), x); #endif if (rclass != NO_REGS) { @@ -1603,7 +1605,7 @@ default_memory_move_cost (machine_mode m #ifndef MEMORY_MOVE_COST return (4 + memory_move_secondary_cost (mode, (enum reg_class) rclass, in)); #else - return MEMORY_MOVE_COST (mode, (enum reg_class) rclass, in); + return MEMORY_MOVE_COST (MACRO_MODE (mode), (enum reg_class) rclass, in); #endif } @@ -1618,7 +1620,8 @@ default_register_move_cost (machine_mode #ifndef REGISTER_MOVE_COST return 2; #else - return REGISTER_MOVE_COST (mode, (enum reg_class) from, (enum reg_class) to); + return REGISTER_MOVE_COST (MACRO_MODE (mode), + (enum reg_class) from, (enum reg_class) to); #endif } @@ -1807,7 +1810,8 @@ default_class_max_nregs (reg_class_t rcl machine_mode mode ATTRIBUTE_UNUSED) { #ifdef CLASS_MAX_NREGS - return (unsigned char) CLASS_MAX_NREGS ((enum reg_class) rclass, mode); + return (unsigned char) CLASS_MAX_NREGS ((enum reg_class) rclass, + MACRO_MODE (mode)); #else return ((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD); #endif