From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 63499 invoked by alias); 23 Oct 2017 11:24:26 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 63432 invoked by uid 89); 23 Oct 2017 11:24:14 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-10.5 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_2,GIT_PATCH_3,KAM_ASCII_DIVIDERS,RCVD_IN_DNSWL_NONE,RCVD_IN_SORBS_SPAM,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-wr0-f182.google.com Received: from mail-wr0-f182.google.com (HELO mail-wr0-f182.google.com) (209.85.128.182) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 23 Oct 2017 11:24:05 +0000 Received: by mail-wr0-f182.google.com with SMTP id o44so16957738wrf.11 for ; Mon, 23 Oct 2017 04:24:04 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:mail-followup-to:subject:references:date :in-reply-to:message-id:user-agent:mime-version; bh=eOt9MJpkKPe0dA9hJB5KwKKiy0o0T6OesVL47oj+wgk=; b=ENbQN+FFddqi5iAyGyfMAh+0GHIyXvhIsxbJ/avNbL8JX/J+NMgydMKDLOya6pmlTP ++gXSv8UAE/OMUIqXML7ZuItl71n5zP97oszvjAluZe2fV3FLwKczUF4Q23A0LSLXFXk QRm24oMCcORjYOVecaKWF5gaofDgaKMmMxbooFEaafrz4trjnVdlx8aHjDjPyJZ8j+iq Na4X5v/TkofW00WNxfoyQ/T8iOgJbckISd7rvhBamGE5Ur/g3qXFzyMWXzbYBiAlhXca nnmvk63Xbwqg/C2uHRpKzBE1DK5XIySq5Wqsqrgb5QnGT8Tj3tljCFhilAsDnncI1E9G OTIQ== X-Gm-Message-State: AMCzsaWZCa8LRb9Enp1YD0k18yYfgR5OXupL9XvJnO7PPuEkaBEt7H6b aI56jGJiXINkFEBITwiFG1z/I4QoL4U= X-Google-Smtp-Source: ABhQp+SVGapZ1XcRMVxge44yWzfkiypTdQCA8hYc/LFQBUYYgHhBhqEgqNbzzt3UsKWYgf1f3o0gag== X-Received: by 10.223.134.212 with SMTP id 20mr10228600wry.81.1508757842772; Mon, 23 Oct 2017 04:24:02 -0700 (PDT) Received: from localhost ([2.26.27.199]) by smtp.gmail.com with ESMTPSA id m20sm2211280wma.26.2017.10.23.04.24.01 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 23 Oct 2017 04:24:02 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@linaro.org Subject: [11/nn] Add narrower_subreg_mode helper function References: <87wp3mxgir.fsf@linaro.org> Date: Mon, 23 Oct 2017 11:24:00 -0000 In-Reply-To: <87wp3mxgir.fsf@linaro.org> (Richard Sandiford's message of "Mon, 23 Oct 2017 12:14:36 +0100") Message-ID: <87lgk2w1in.fsf@linaro.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2017-10/txt/msg01463.txt.bz2 This patch adds a narrowing equivalent of wider_subreg_mode. At present there is only one user. 2017-10-23 Richard Sandiford Alan Hayward David Sherwood gcc/ * rtl.h (narrower_subreg_mode): New function. * ira-color.c (update_costs_from_allocno): Use it. Index: gcc/rtl.h =================================================================== --- gcc/rtl.h 2017-10-23 11:44:06.562686090 +0100 +++ gcc/rtl.h 2017-10-23 11:44:15.916785881 +0100 @@ -2972,6 +2972,16 @@ subreg_lowpart_offset (machine_mode oute } /* Given that a subreg has outer mode OUTERMODE and inner mode INNERMODE, + return the smaller of the two modes if they are different sizes, + otherwise return the outer mode. */ + +inline machine_mode +narrower_subreg_mode (machine_mode outermode, machine_mode innermode) +{ + return paradoxical_subreg_p (outermode, innermode) ? innermode : outermode; +} + +/* Given that a subreg has outer mode OUTERMODE and inner mode INNERMODE, return the mode that is big enough to hold both the outer and inner values. Prefer the outer mode in the event of a tie. */ Index: gcc/ira-color.c =================================================================== --- gcc/ira-color.c 2017-10-23 11:44:11.500538024 +0100 +++ gcc/ira-color.c 2017-10-23 11:44:15.915819948 +0100 @@ -1367,15 +1367,14 @@ update_costs_from_allocno (ira_allocno_t || ALLOCNO_ASSIGNED_P (another_allocno)) continue; - if (GET_MODE_SIZE (ALLOCNO_MODE (cp->second)) < GET_MODE_SIZE (mode)) - /* If we have different modes use the smallest one. It is - a sub-register move. It is hard to predict what LRA - will reload (the pseudo or its sub-register) but LRA - will try to minimize the data movement. Also for some - register classes bigger modes might be invalid, - e.g. DImode for AREG on x86. For such cases the - register move cost will be maximal. */ - mode = ALLOCNO_MODE (cp->second); + /* If we have different modes use the smallest one. It is + a sub-register move. It is hard to predict what LRA + will reload (the pseudo or its sub-register) but LRA + will try to minimize the data movement. Also for some + register classes bigger modes might be invalid, + e.g. DImode for AREG on x86. For such cases the + register move cost will be maximal. */ + mode = narrower_subreg_mode (mode, ALLOCNO_MODE (cp->second)); cost = (cp->second == allocno ? ira_register_move_cost[mode][rclass][aclass]