From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 127759 invoked by alias); 1 Jun 2017 06:16:01 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 127520 invoked by uid 89); 1 Jun 2017 06:15:53 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE,RCVD_IN_SORBS_SPAM,RCVD_IN_SORBS_WEB,SPF_PASS autolearn=no version=3.3.2 spammy=tip X-HELO: mail-wm0-f52.google.com Received: from mail-wm0-f52.google.com (HELO mail-wm0-f52.google.com) (74.125.82.52) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 01 Jun 2017 06:15:50 +0000 Received: by mail-wm0-f52.google.com with SMTP id b84so144388372wmh.0 for ; Wed, 31 May 2017 23:15:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:mail-followup-to:cc:subject:references :date:in-reply-to:message-id:user-agent:mime-version; bh=sK2UNJmnfYPmhLxw/J7ZK/oawqBDfcCHWjce6K/ZuBI=; b=ivVBLVeDAhbrogK//7eJ/xbBVT1ltfOxwBZ7V0aX8BqE/CoNKpfVq77wPMytwV7Iqh 5EqP4vbbC1t9zzn7tWGvad4NY631OAeEHFyUpxnaQ2Kh4IaRfdfrXfWkVBgjvMN6iv2W utQtoypFVKx2ixxIMusCpCAatGngf0wJSgaf1CulhTFpkrUH9Nn/6/7jVzQY0CHvRUFi sBD9r9McjPjNVZ+k/9mDgyLpZs6IJL41vI2vv1UH3+wi1tA790KTN3hKA9GUJ/QUI0hO smMBzvRXGuK5U2xx+A1Y5YpjDbevCc7Cx4OyR09cBgSmIallJuMF9kq8VRkk2z8HTRlN raAQ== X-Gm-Message-State: AODbwcCpkmY0pUwlTZfrQ3wIboefs3UTFPe9gt+/cx8eMet9ajCLPtpR 6S/UVDgBUT1ycg4d X-Received: by 10.28.152.133 with SMTP id a127mr7910325wme.115.1496297752543; Wed, 31 May 2017 23:15:52 -0700 (PDT) Received: from localhost (92.40.248.228.threembb.co.uk. [92.40.248.228]) by smtp.gmail.com with ESMTPSA id r6sm14593809wme.27.2017.05.31.23.15.51 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 31 May 2017 23:15:51 -0700 (PDT) From: Richard Sandiford To: Prakhar Bahuguna Mail-Followup-To: Prakhar Bahuguna ,, , richard.sandiford@linaro.org Cc: , Subject: Re: [PATCH, GCC/ARM/gcc-7-branch] Backport PR71607 References: <20170525132626.t536vqs4yhhtvwyh@e107464-lin.cambridge.arm.com> <87o9u9mo9v.fsf@linaro.org> <20170531124844.y263emgdovlu7z2f@e107464-lin.cambridge.arm.com> <87fuflmar4.fsf@linaro.org> <20170531153845.b23jxwtbrovcxje7@e107464-lin.cambridge.arm.com> Date: Thu, 01 Jun 2017 06:16:00 -0000 In-Reply-To: <20170531153845.b23jxwtbrovcxje7@e107464-lin.cambridge.arm.com> (Prakhar Bahuguna's message of "Wed, 31 May 2017 16:38:45 +0100") Message-ID: <87lgpcz10s.fsf@linaro.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.1 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2017-06/txt/msg00001.txt.bz2 Prakhar Bahuguna writes: > On 31/05/2017 14:11:43, Richard Sandiford wrote: >> Prakhar Bahuguna writes: >> > On 31/05/2017 09:19:40, Richard Sandiford wrote: >> >> const_ints are supposed to be stored in sign-extended form, so a 32-bit >> >> integer with the MSB set should be 0xffffffff80000000|x instead of >> >> 0x80000000|x. It's a bug if you have one where that isn't true. >> >> >> >> In the patch it looks like this could come from: >> >> ...these two splits, where the GEN_INTs should probably be: >> >> >> >> gen_int_mode (..., SImode); >> >> >> >> instead. >> > >> > Hi Richard, thanks for the tip. Is there a test case that could produce an >> > incorrect result? I've attempted to create one using negative doubles and >> > floats but haven't succeeded. >> >> Just to check, are you testing with --enable-checking=yes,rtl? >> >> When the values you tried were split, did you get the sign-extended form >> or the zero-extended form? >> >> Thanks, >> Richard > > I've now rebuilt with --enable-checking=yes,rtl and it appears that the split > values are being correctly sign-extended in the rtl and appear correctly in the > assembly. > > However, if you believe it is safer to use gen_int_mode(), I'll respin the > patch accordingly. Yeah, I think it would be safer. But if they were already correctly sign-extended, then what did you mean by: Also the pattern for splitting 32-bit immediates had to be changed, it was not accepting unsigned 32-bit unsigned integers with the MSB set. I believe const_int_operand expects the mode of the operand to be set to VOIDmode and not SImode. I have only changed it in the patterns that were affecting this code, though I suggest looking into changing it in the rest of the ARM backend. Thanks, Richard