[committed] PR target/31388: Fix MIPS16 post-reload ICE

[committed] PR target/31388: Fix MIPS16 post-reload ICE

[Richard Sandiford]

This patch fixes PR target/31388, a post-reload ICE on MIPS16.
As described in:

    http://gcc.gnu.org/ml/gcc-bugs/2007-03/msg02682.html

the problem is that the MIPS16 move patterns are introducing
new uses of the GP pseudo register during reload.

The patch implements the fix I described in the link above.
I verified that mips64vrel-elf now builds to completion --
it's the only target with MIPS16 multilibs by default -- and that
the gcc test results for:

    -mips16/-EL/-mabi=eabi/-mgp32
    -mips16/-EB/-mabi=eabi/-mgp64/-mlong32

were at least reasonable.  Applied to trunk.

Richard


gcc/
	PR target/31388
	* config/mips/mips.md (load_const_gp): New insn.
	* config/mips/mips.c (mips_split_symbol): Avoid using or creating
	the MIPS16 GP pseudo register if no_new_pseudos.
	(mips16_gp_pseudo_reg): Use gen_load_const_gp.

Index: gcc/config/mips/mips.md
===================================================================
--- gcc/config/mips/mips.md	(revision 123397)
+++ gcc/config/mips/mips.md	(working copy)
@@ -4074,6 +4074,11 @@ (define_insn "mfhc1"
   [(set_attr "type"	"mfc")
    (set_attr "mode"	"SF")])
 
+;; Move a constant that satisfies CONST_GP_P into operand 0.
+(define_expand "load_const_gp"
+  [(set (match_operand 0 "register_operand" "=d")
+	(const (unspec [(const_int 0)] UNSPEC_GP)))])
+
 ;; Insn to initialize $gp for n32/n64 abicalls.  Operand 0 is the offset
 ;; of _gp from the start of this function.  Operand 1 is the incoming
 ;; function address.
Index: gcc/config/mips/mips.c
===================================================================
--- gcc/config/mips/mips.c	(revision 123397)
+++ gcc/config/mips/mips.c	(working copy)
@@ -1888,10 +1888,15 @@ mips_split_symbol (rtx temp, rtx addr)
 {
   rtx high;
 
-  if (TARGET_MIPS16)
-    high = mips16_gp_pseudo_reg ();
-  else
+  if (!TARGET_MIPS16)
     high = mips_force_temporary (temp, gen_rtx_HIGH (Pmode, copy_rtx (addr)));
+  else if (no_new_pseudos)
+    {
+      emit_insn (gen_load_const_gp (copy_rtx (temp)));
+      high = temp;
+    }
+  else
+    high = mips16_gp_pseudo_reg ();
   return gen_rtx_LO_SUM (Pmode, high, addr);
 }
 
@@ -7808,19 +7813,13 @@ mips16_gp_pseudo_reg (void)
 {
   if (cfun->machine->mips16_gp_pseudo_rtx == NULL_RTX)
     {
-      rtx unspec;
       rtx insn, scan;
 
       cfun->machine->mips16_gp_pseudo_rtx = gen_reg_rtx (Pmode);
 
       /* We want to initialize this to a value which gcc will believe
          is constant.  */
-      start_sequence ();
-      unspec = gen_rtx_UNSPEC (VOIDmode, gen_rtvec (1, const0_rtx), UNSPEC_GP);
-      emit_move_insn (cfun->machine->mips16_gp_pseudo_rtx,
-		      gen_rtx_CONST (Pmode, unspec));
-      insn = get_insns ();
-      end_sequence ();
+      insn = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx);
 
       push_topmost_sequence ();
       /* We need to emit the initialization after the FUNCTION_BEG