From: Richard Sandiford <richard.sandiford@linaro.org>
To: Jakub Jelinek <jakub@redhat.com>
Cc: Richard Earnshaw <richard.earnshaw@arm.com>,
James Greenhalgh <james.greenhalgh@arm.com>,
Marcus Shawcroft <marcus.shawcroft@arm.com>,
gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] Fix aarch64_simd_reg_or_zero predicate (PR fortran/84565)
Date: Tue, 27 Feb 2018 14:22:00 -0000 [thread overview]
Message-ID: <87muzuh5r5.fsf@linaro.org> (raw)
In-Reply-To: <20180227091251.GD5867@tucnak> (Jakub Jelinek's message of "Tue, 27 Feb 2018 10:12:51 +0100")
Jakub Jelinek <jakub@redhat.com> writes:
> Hi!
>
> The following testcase ICEs, because the aarch64_cmeqdf instruction
> starting with r256612 no longer accepts CONST0_RTX (E_DFmode) as
> valid argument, but the expander generates it anyway.
>
> The bug has been introduced during the addition of aarch64_simd_imm_zero
> and aarch64_simd_or_scalar_imm_zero predicates, before the predicate
> used to be:
> (define_predicate "aarch64_simd_reg_or_zero"
> (and (match_code "reg,subreg,const_int,const_double,const_vector")
> (ior (match_operand 0 "register_operand")
> (ior (match_test "op == const0_rtx")
> (match_test "aarch64_simd_imm_zero_p (op, mode)")))))
> with
> bool
> aarch64_simd_imm_zero_p (rtx x, machine_mode mode)
> {
> return x == CONST0_RTX (mode);
> }
> and so matched not just const,const_vector zeros, but also
> const_int zero (that is through op == const0_rtx) and const_double
> zero too.
Thanks for fixing this.
> Bootstrapped/regtested on aarch64-linux (scratch Fedora gcc 8 package build
> with the patch applied), ok for trunk?
>
> 2018-02-27 Jakub Jelinek <jakub@redhat.com>
>
> PR fortran/84565
> * config/aarch64/predicates.md (aarch64_simd_reg_or_zero): Use
> aarch64_simd_or_scalar_imm_zero rather than aarch64_simd_imm_zero.
>
> * gfortran.dg/pr84565.f90: New test.
>
> --- gcc/config/aarch64/predicates.md.jj 2018-02-06 13:13:06.305751221 +0100
> +++ gcc/config/aarch64/predicates.md 2018-02-26 16:30:01.902195208 +0100
> @@ -395,7 +395,7 @@ (define_predicate "aarch64_simd_reg_or_z
> (and (match_code "reg,subreg,const_int,const_double,const,const_vector")
> (ior (match_operand 0 "register_operand")
> (match_test "op == const0_rtx")
> - (match_operand 0 "aarch64_simd_imm_zero"))))
> + (match_operand 0 "aarch64_simd_or_scalar_imm_zero"))))
I think this makes the match_test on the line above redundant.
LGTM otherwise (but I can't approve). We should probably clean up
the predicates so that the zero checks are more consistent. genrecog
could probably help by ignoring predicate codes that obviously don't
apply (CONST_INT for vectors, CONST_VECTOR for ints, etc.). But that's
obviously all stage 1 stuff.
Richard
next prev parent reply other threads:[~2018-02-27 14:22 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-27 9:50 Jakub Jelinek
2018-02-27 14:22 ` Richard Sandiford [this message]
2018-02-28 21:49 ` Jakub Jelinek
2018-03-07 10:36 ` James Greenhalgh
2018-03-06 16:13 ` Patch ping (Re: [PATCH] Fix aarch64_simd_reg_or_zero predicate (PR fortran/84565)) Jakub Jelinek
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