From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 1724 invoked by alias); 3 Aug 2014 14:20:46 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 1712 invoked by uid 89); 3 Aug 2014 14:20:45 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-we0-f173.google.com Received: from mail-we0-f173.google.com (HELO mail-we0-f173.google.com) (74.125.82.173) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Sun, 03 Aug 2014 14:20:44 +0000 Received: by mail-we0-f173.google.com with SMTP id q58so6482657wes.4 for ; Sun, 03 Aug 2014 07:20:41 -0700 (PDT) X-Received: by 10.180.12.76 with SMTP id w12mr21967652wib.4.1407075641636; Sun, 03 Aug 2014 07:20:41 -0700 (PDT) Received: from localhost ([95.145.138.172]) by mx.google.com with ESMTPSA id h13sm36177762wjs.2.2014.08.03.07.20.41 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 03 Aug 2014 07:20:41 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, rdsandiford@googlemail.com Subject: [PATCH 36/50] reload1.c:note_reg_elim_costly References: <87y4v5d77q.fsf@googlemail.com> Date: Sun, 03 Aug 2014 14:20:00 -0000 In-Reply-To: <87y4v5d77q.fsf@googlemail.com> (Richard Sandiford's message of "Sun, 03 Aug 2014 14:38:01 +0100") Message-ID: <87mwbl7iyv.fsf@googlemail.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2014-08/txt/msg00172.txt.bz2 gcc/ * reload1.c: Include rtl-iter.h. (note_reg_elim_costly): Turn from being a for_each_rtx callback to being a function that examines each subrtx itself. (eliminate_regs_1, elimination_costs_in_insn): Update accordingly. Index: gcc/reload1.c =================================================================== --- gcc/reload1.c 2014-08-03 11:25:09.697952056 +0100 +++ gcc/reload1.c 2014-08-03 11:25:30.135154111 +0100 @@ -45,6 +45,7 @@ Software Foundation; either version 3, o #include "target.h" #include "emit-rtl.h" #include "dumpfile.h" +#include "rtl-iter.h" /* This file contains the reload pass of the compiler, which is run after register allocation has been done. It checks that @@ -2486,34 +2487,33 @@ set_label_offsets (rtx x, rtx insn, int } } -/* Called through for_each_rtx, this function examines every reg that occurs - in PX and adjusts the costs for its elimination which are gathered by IRA. - DATA is the insn in which PX occurs. We do not recurse into MEM - expressions. */ +/* This function examines every reg that occurs in X and adjusts the + costs for its elimination which are gathered by IRA. INSN is the + insn in which X occurs. We do not recurse into MEM expressions. */ -static int -note_reg_elim_costly (rtx *px, void *data) +static void +note_reg_elim_costly (const_rtx x, rtx insn) { - rtx insn = (rtx)data; - rtx x = *px; - - if (MEM_P (x)) - return -1; - - if (REG_P (x) - && REGNO (x) >= FIRST_PSEUDO_REGISTER - && reg_equiv_init (REGNO (x)) - && reg_equiv_invariant (REGNO (x))) + subrtx_iterator::array_type array; + FOR_EACH_SUBRTX (iter, array, x, NONCONST) { - rtx t = reg_equiv_invariant (REGNO (x)); - rtx new_rtx = eliminate_regs_1 (t, Pmode, insn, true, true); - int cost = set_src_cost (new_rtx, optimize_bb_for_speed_p (elim_bb)); - int freq = REG_FREQ_FROM_BB (elim_bb); + const_rtx x = *iter; + if (MEM_P (x)) + iter.skip_subrtxes (); + else if (REG_P (x) + && REGNO (x) >= FIRST_PSEUDO_REGISTER + && reg_equiv_init (REGNO (x)) + && reg_equiv_invariant (REGNO (x))) + { + rtx t = reg_equiv_invariant (REGNO (x)); + rtx new_rtx = eliminate_regs_1 (t, Pmode, insn, true, true); + int cost = set_src_cost (new_rtx, optimize_bb_for_speed_p (elim_bb)); + int freq = REG_FREQ_FROM_BB (elim_bb); - if (cost != 0) - ira_adjust_equiv_reg_cost (REGNO (x), -cost * freq); + if (cost != 0) + ira_adjust_equiv_reg_cost (REGNO (x), -cost * freq); + } } - return 0; } /* Scan X and replace any eliminable registers (such as fp) with a @@ -2888,7 +2888,7 @@ eliminate_regs_1 (rtx x, enum machine_mo if (for_costs && memory_address_p (GET_MODE (x), XEXP (x, 0)) && !memory_address_p (GET_MODE (x), new_rtx)) - for_each_rtx (&XEXP (x, 0), note_reg_elim_costly, insn); + note_reg_elim_costly (XEXP (x, 0), insn); return replace_equiv_address_nv (x, new_rtx); @@ -3731,7 +3731,7 @@ elimination_costs_in_insn (rtx insn) if (old_set && recog_data.operand_loc[i] == &SET_SRC (old_set)) is_set_src = true; if (is_set_src && !sets_reg_p) - note_reg_elim_costly (&SET_SRC (old_set), insn); + note_reg_elim_costly (SET_SRC (old_set), insn); in_plus = false; if (plus_src && sets_reg_p && (recog_data.operand_loc[i] == &XEXP (plus_src, 0)