Re: [PATCH] Add support for MIPS r3 and r5

[Richard Sandiford <rdsandiford@googlemail.com>]

Andrew Bennett <Andrew.Bennett@imgtec.com> writes:
> diff --git a/gcc/config/mips/mips-cpus.def b/gcc/config/mips/mips-cpus.def
> index 07fbf9c..f2e23c6 100644
> --- a/gcc/config/mips/mips-cpus.def
> +++ b/gcc/config/mips/mips-cpus.def
> @@ -44,9 +44,13 @@ MIPS_CPU ("mips4", PROCESSOR_R8000, 4, 0)
>     isn't tuned to a specific processor.  */
>  MIPS_CPU ("mips32", PROCESSOR_4KC, 32, PTF_AVOID_BRANCHLIKELY)
>  MIPS_CPU ("mips32r2", PROCESSOR_74KF2_1, 33, PTF_AVOID_BRANCHLIKELY)
> +MIPS_CPU ("mips32r3", PROCESSOR_M4K, 34, PTF_AVOID_BRANCHLIKELY)
> +MIPS_CPU ("mips32r5", PROCESSOR_74KF2_1, 36, PTF_AVOID_BRANCHLIKELY)

Looks odd for mips32r2 and mips32r5 to have the same processor tuning
but mips32r3 to be different.  I assume 74KF2_1 is just a reasonable
default, given the lack of tuning for a real r5 CPU?  That's fine if so,
but probably deserves a comment.

>  MIPS_CPU ("mips64", PROCESSOR_5KC, 64, PTF_AVOID_BRANCHLIKELY)
>  /* ??? For now just tune the generic MIPS64r2 for 5KC as well.   */
>  MIPS_CPU ("mips64r2", PROCESSOR_5KC, 65, PTF_AVOID_BRANCHLIKELY)
> +MIPS_CPU ("mips64r3", PROCESSOR_5KC, 66, PTF_AVOID_BRANCHLIKELY)
> +MIPS_CPU ("mips64r5", PROCESSOR_5KC, 68, PTF_AVOID_BRANCHLIKELY)

Now "MIPS64r2 and above".

> @@ -724,7 +752,7 @@ struct mips_cpu_info {
>  /* Infer a -msynci setting from a -mips argument, on the assumption that
>     -msynci is desired where possible.  */
>  #define MIPS_ISA_SYNCI_SPEC \
> -  "%{msynci|mno-synci:;:%{mips32r2|mips64r2:-msynci;:-mno-synci}}"
> +  "%{msynci|mno-synci:;:%{mips32r2|mips32r3|mips32r5|mips64r2|mips64r3|mips64r5:-msynci;:-mno-synci}}"

Please split the line to stay within 80 chars.

> @@ -141,7 +151,8 @@ along with GCC; see the file COPYING3.  If not see
>    "%{EL:-m elf32lmip} \
>     %{EB:-m elf32bmip} \
>     %(endian_spec) \
> -   %{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips32r2} %{mips64} \
> +   %{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips32r2}           \
> +   %{mips32r3} %{mips32r5} %{mips64} \
>     %(netbsd_link_spec)"
>  
>  #define NETBSD_ENTRY_POINT "__start"

Not sure the omission of mips64r2 was deliberate here, or in vxworks.h.

As Joseph said, the .po stuff should be left alone.  The .pot file is
regenerated near to a release so that the translators can update the
.po files.

Looks good otherwise, thanks.

Richard