From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 26140 invoked by alias); 8 May 2014 19:27:59 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 26130 invoked by uid 89); 8 May 2014 19:27:59 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=AWL,BAYES_50,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-wg0-f42.google.com Received: from mail-wg0-f42.google.com (HELO mail-wg0-f42.google.com) (74.125.82.42) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Thu, 08 May 2014 19:27:58 +0000 Received: by mail-wg0-f42.google.com with SMTP id y10so2917250wgg.25 for ; Thu, 08 May 2014 12:27:55 -0700 (PDT) X-Received: by 10.194.90.107 with SMTP id bv11mr4639754wjb.11.1399577275326; Thu, 08 May 2014 12:27:55 -0700 (PDT) Received: from localhost ([2.26.169.52]) by mx.google.com with ESMTPSA id h1sm2425554wjy.7.2014.05.08.12.27.54 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 May 2014 12:27:54 -0700 (PDT) From: Richard Sandiford To: Andrew Bennett Mail-Followup-To: Andrew Bennett ,"gcc-patches\@gcc.gnu.org" , Matthew Fortune , Saeed Ghazanfar , Rich Fuhler , rdsandiford@googlemail.com Cc: "gcc-patches\@gcc.gnu.org" , Matthew Fortune , Saeed Ghazanfar , Rich Fuhler Subject: Re: [PATCH] Add support for MIPS r3 and r5 References: <0DA23CC379F5F945ACB41CF394B98277578C80@LEMAIL01.le.imgtec.org> Date: Thu, 08 May 2014 19:27:00 -0000 In-Reply-To: <0DA23CC379F5F945ACB41CF394B98277578C80@LEMAIL01.le.imgtec.org> (Andrew Bennett's message of "Thu, 8 May 2014 13:47:33 +0000") Message-ID: <87mwes2hqe.fsf@talisman.default> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2014-05/txt/msg00518.txt.bz2 Andrew Bennett writes: > diff --git a/gcc/config/mips/mips-cpus.def b/gcc/config/mips/mips-cpus.def > index 07fbf9c..f2e23c6 100644 > --- a/gcc/config/mips/mips-cpus.def > +++ b/gcc/config/mips/mips-cpus.def > @@ -44,9 +44,13 @@ MIPS_CPU ("mips4", PROCESSOR_R8000, 4, 0) > isn't tuned to a specific processor. */ > MIPS_CPU ("mips32", PROCESSOR_4KC, 32, PTF_AVOID_BRANCHLIKELY) > MIPS_CPU ("mips32r2", PROCESSOR_74KF2_1, 33, PTF_AVOID_BRANCHLIKELY) > +MIPS_CPU ("mips32r3", PROCESSOR_M4K, 34, PTF_AVOID_BRANCHLIKELY) > +MIPS_CPU ("mips32r5", PROCESSOR_74KF2_1, 36, PTF_AVOID_BRANCHLIKELY) Looks odd for mips32r2 and mips32r5 to have the same processor tuning but mips32r3 to be different. I assume 74KF2_1 is just a reasonable default, given the lack of tuning for a real r5 CPU? That's fine if so, but probably deserves a comment. > MIPS_CPU ("mips64", PROCESSOR_5KC, 64, PTF_AVOID_BRANCHLIKELY) > /* ??? For now just tune the generic MIPS64r2 for 5KC as well. */ > MIPS_CPU ("mips64r2", PROCESSOR_5KC, 65, PTF_AVOID_BRANCHLIKELY) > +MIPS_CPU ("mips64r3", PROCESSOR_5KC, 66, PTF_AVOID_BRANCHLIKELY) > +MIPS_CPU ("mips64r5", PROCESSOR_5KC, 68, PTF_AVOID_BRANCHLIKELY) Now "MIPS64r2 and above". > @@ -724,7 +752,7 @@ struct mips_cpu_info { > /* Infer a -msynci setting from a -mips argument, on the assumption that > -msynci is desired where possible. */ > #define MIPS_ISA_SYNCI_SPEC \ > - "%{msynci|mno-synci:;:%{mips32r2|mips64r2:-msynci;:-mno-synci}}" > + "%{msynci|mno-synci:;:%{mips32r2|mips32r3|mips32r5|mips64r2|mips64r3|mips64r5:-msynci;:-mno-synci}}" Please split the line to stay within 80 chars. > @@ -141,7 +151,8 @@ along with GCC; see the file COPYING3. If not see > "%{EL:-m elf32lmip} \ > %{EB:-m elf32bmip} \ > %(endian_spec) \ > - %{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips32r2} %{mips64} \ > + %{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips32r2} \ > + %{mips32r3} %{mips32r5} %{mips64} \ > %(netbsd_link_spec)" > > #define NETBSD_ENTRY_POINT "__start" Not sure the omission of mips64r2 was deliberate here, or in vxworks.h. As Joseph said, the .po stuff should be left alone. The .pot file is regenerated near to a release so that the translators can update the .po files. Looks good otherwise, thanks. Richard