From: Richard Sandiford <richard.sandiford@linaro.org>
To: gcc-patches@gcc.gnu.org
Subject: [101/nnn] poly_int: GET_MODE_NUNITS
Date: Mon, 23 Oct 2017 17:41:00 -0000 [thread overview]
Message-ID: <87o9oxdao8.fsf@linaro.org> (raw)
In-Reply-To: <871sltvm7r.fsf@linaro.org> (Richard Sandiford's message of "Mon, 23 Oct 2017 17:54:32 +0100")
This patch changes GET_MODE_NUNITS from unsigned char
to poly_uint16, although it remains a macro when compiling
target code with NUM_POLY_INT_COEFFS == 1.
If the number of units isn't known at compile time, we use:
(const:M (vec_duplicate:M X))
to represent a vector in which every element is equal to X. The code
ensures that there is only a single instance of each constant, so that
pointer equality is enough. (This is a requirement for the constants
that go in const_tiny_rtx, but we might as well do it for all constants.)
Similarly we use:
(const:M (vec_series:M A B))
for a linear series starting at A and having step B.
The to_constant call in make_vector_type goes away in a later patch.
2017-10-23 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* machmode.h (mode_nunits): Change from unsigned char to
poly_uint16_pod.
(ONLY_FIXED_SIZE_MODES): New macro.
(pod_mode::measurement_type, scalar_int_mode::measurement_type)
(scalar_float_mode::measurement_type, scalar_mode::measurement_type)
(complex_mode::measurement_type, fixed_size_mode::measurement_type):
New typedefs.
(mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
(GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
or if measurement_type is not polynomial.
* genmodes.c (ZERO_COEFFS): New macro.
(emit_mode_nunits_inline): Make mode_nunits_inline return a
poly_uint16.
(emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
Use ZERO_COEFFS when emitting initializers.
* data-streamer.h (bp_pack_poly_value): New function.
(bp_unpack_poly_value): Likewise.
* lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
for GET_MODE_NUNITS.
* lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
for GET_MODE_NUNITS.
* tree.c (make_vector_type): Remove temporary shim and make
the real function take the number of units as a poly_uint64
rather than an int.
(build_vector_type_for_mode): Handle polynomial nunits.
* emit-rtl.c (gen_const_vec_duplicate_1): Likewise.
(gen_const_vec_series, gen_rtx_CONST_VECTOR): Likewise.
* genrecog.c (validate_pattern): Likewise.
* optabs-query.c (can_mult_highpart_p): Likewise.
* optabs-tree.c (expand_vec_cond_expr_p): Likewise.
* optabs.c (expand_vector_broadcast, expand_binop_directly)
(shift_amt_for_vec_perm_mask, expand_vec_perm, expand_vec_cond_expr)
(expand_mult_highpart): Likewise.
* rtlanal.c (subreg_get_info): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_const_unary_operation, simplify_binary_operation_1)
(simplify_const_binary_operation, simplify_ternary_operation)
(test_vector_ops_duplicate, test_vector_ops): Likewise.
* tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
(vect_grouped_load_supported): Likewise.
* tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
* tree-vect-loop.c (have_whole_vector_shift): Likewise.
gcc/ada/
* gcc-interface/misc.c (enumerate_modes): Handle polynomial
GET_MODE_NUNITS.
Index: gcc/machmode.h
===================================================================
--- gcc/machmode.h 2017-10-23 17:11:54.535862371 +0100
+++ gcc/machmode.h 2017-10-23 17:25:48.620492005 +0100
@@ -25,7 +25,7 @@ typedef opt_mode<machine_mode> opt_machi
extern CONST_MODE_SIZE unsigned short mode_size[NUM_MACHINE_MODES];
extern const unsigned short mode_precision[NUM_MACHINE_MODES];
extern const unsigned char mode_inner[NUM_MACHINE_MODES];
-extern const unsigned char mode_nunits[NUM_MACHINE_MODES];
+extern const poly_uint16_pod mode_nunits[NUM_MACHINE_MODES];
extern CONST_MODE_UNIT_SIZE unsigned char mode_unit_size[NUM_MACHINE_MODES];
extern const unsigned short mode_unit_precision[NUM_MACHINE_MODES];
extern const unsigned char mode_wider[NUM_MACHINE_MODES];
@@ -76,6 +76,14 @@ struct mode_traits<machine_mode>
typedef machine_mode from_int;
};
+/* Always treat machine modes as fixed-size while compiling code specific
+ to targets that have no variable-size modes. */
+#if defined (IN_TARGET_CODE) && NUM_POLY_INT_COEFFS == 1
+#define ONLY_FIXED_SIZE_MODES 1
+#else
+#define ONLY_FIXED_SIZE_MODES 0
+#endif
+
/* Get the name of mode MODE as a string. */
extern const char * const mode_name[NUM_MACHINE_MODES];
@@ -313,6 +321,7 @@ opt_mode<T>::exists (U *mode) const
struct pod_mode
{
typedef typename mode_traits<T>::from_int from_int;
+ typedef typename T::measurement_type measurement_type;
machine_mode m_mode;
ALWAYS_INLINE operator machine_mode () const { return m_mode; }
@@ -391,6 +400,7 @@ is_a (machine_mode m, U *result)
{
public:
typedef mode_traits<scalar_int_mode>::from_int from_int;
+ typedef unsigned short measurement_type;
ALWAYS_INLINE scalar_int_mode () {}
ALWAYS_INLINE scalar_int_mode (from_int m) : m_mode (machine_mode (m)) {}
@@ -415,6 +425,7 @@ scalar_int_mode::includes_p (machine_mod
{
public:
typedef mode_traits<scalar_float_mode>::from_int from_int;
+ typedef unsigned short measurement_type;
ALWAYS_INLINE scalar_float_mode () {}
ALWAYS_INLINE scalar_float_mode (from_int m) : m_mode (machine_mode (m)) {}
@@ -439,6 +450,7 @@ scalar_float_mode::includes_p (machine_m
{
public:
typedef mode_traits<scalar_mode>::from_int from_int;
+ typedef unsigned short measurement_type;
ALWAYS_INLINE scalar_mode () {}
ALWAYS_INLINE scalar_mode (from_int m) : m_mode (machine_mode (m)) {}
@@ -480,6 +492,7 @@ scalar_mode::includes_p (machine_mode m)
{
public:
typedef mode_traits<complex_mode>::from_int from_int;
+ typedef unsigned short measurement_type;
ALWAYS_INLINE complex_mode () {}
ALWAYS_INLINE complex_mode (from_int m) : m_mode (machine_mode (m)) {}
@@ -570,7 +583,7 @@ mode_to_unit_precision (machine_mode mod
/* Return the base GET_MODE_NUNITS value for MODE. */
-ALWAYS_INLINE unsigned short
+ALWAYS_INLINE poly_uint16
mode_to_nunits (machine_mode mode)
{
#if GCC_VERSION >= 4001
@@ -627,7 +640,29 @@ #define GET_MODE_UNIT_PRECISION(MODE) (m
/* Get the number of units in an object of mode MODE. This is 2 for
complex modes and the number of elements for vector modes. */
-#define GET_MODE_NUNITS(MODE) (mode_to_nunits (MODE))
+#if ONLY_FIXED_SIZE_MODES
+#define GET_MODE_NUNITS(MODE) (mode_to_nunits (MODE).coeffs[0])
+#else
+ALWAYS_INLINE poly_uint16
+GET_MODE_NUNITS (machine_mode mode)
+{
+ return mode_to_nunits (mode);
+}
+
+template<typename T>
+ALWAYS_INLINE typename if_poly<typename T::measurement_type>::t
+GET_MODE_NUNITS (const T &mode)
+{
+ return mode_to_nunits (mode);
+}
+
+template<typename T>
+ALWAYS_INLINE typename if_nonpoly<typename T::measurement_type>::t
+GET_MODE_NUNITS (const T &mode)
+{
+ return mode_to_nunits (mode).coeffs[0];
+}
+#endif
/* Get the next wider natural mode (eg, QI -> HI -> SI -> DI -> TI). */
@@ -660,6 +695,7 @@ #define GET_MODE_COMPLEX_MODE(MODE) ((ma
{
public:
typedef mode_traits<fixed_size_mode>::from_int from_int;
+ typedef unsigned short measurement_type;
ALWAYS_INLINE fixed_size_mode () {}
ALWAYS_INLINE fixed_size_mode (from_int m) : m_mode (machine_mode (m)) {}
Index: gcc/genmodes.c
===================================================================
--- gcc/genmodes.c 2017-10-23 17:11:40.124715442 +0100
+++ gcc/genmodes.c 2017-10-23 17:25:48.618492077 +0100
@@ -901,6 +901,16 @@ calc_wider_mode (void)
}
}
+/* Text to add to the constant part of a poly_int_pod initializer in
+ order to fill out te whole structure. */
+#if NUM_POLY_INT_COEFFS == 1
+#define ZERO_COEFFS ""
+#elif NUM_POLY_INT_COEFFS == 2
+#define ZERO_COEFFS ", 0"
+#else
+#error "Unknown value of NUM_POLY_INT_COEFFS"
+#endif
+
/* Output routines. */
#define tagged_printf(FMT, ARG, TAG) do { \
@@ -1008,11 +1018,10 @@ inline __attribute__((__always_inline__)
#else\n\
extern __inline__ __attribute__((__always_inline__, __gnu_inline__))\n\
#endif\n\
-unsigned char\n\
+poly_uint16\n\
mode_nunits_inline (machine_mode mode)\n\
{\n\
- extern const unsigned char mode_nunits[NUM_MACHINE_MODES];\n\
- gcc_assert (mode >= 0 && mode < NUM_MACHINE_MODES);\n\
+ extern poly_uint16_pod mode_nunits[NUM_MACHINE_MODES];\n\
switch (mode)\n\
{");
@@ -1381,10 +1390,10 @@ emit_mode_nunits (void)
int c;
struct mode_data *m;
- print_decl ("unsigned char", "mode_nunits", "NUM_MACHINE_MODES");
+ print_decl ("poly_uint16_pod", "mode_nunits", "NUM_MACHINE_MODES");
for_all_modes (c, m)
- tagged_printf ("%u", m->ncomponents, m->name);
+ tagged_printf ("{ %u" ZERO_COEFFS " }", m->ncomponents, m->name);
print_closer ();
}
Index: gcc/data-streamer.h
===================================================================
--- gcc/data-streamer.h 2017-02-23 19:54:15.000000000 +0000
+++ gcc/data-streamer.h 2017-10-23 17:25:48.617492113 +0100
@@ -126,6 +126,17 @@ bp_pack_value (struct bitpack_d *bp, bit
bp->pos = pos;
}
+/* Pack VAL into the bit-packing context BP, using NBITS for each
+ coefficient. */
+static inline void
+bp_pack_poly_value (struct bitpack_d *bp,
+ const poly_int<NUM_POLY_INT_COEFFS, bitpack_word_t> &val,
+ unsigned nbits)
+{
+ for (int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
+ bp_pack_value (bp, val.coeffs[i], nbits);
+}
+
/* Finishes bit-packing of BP. */
static inline void
streamer_write_bitpack (struct bitpack_d *bp)
@@ -174,6 +185,17 @@ bp_unpack_value (struct bitpack_d *bp, u
return val & mask;
}
+/* Unpacks a polynomial value from the bit-packing context BP in which each
+ coefficient has NBITS bits. */
+static inline poly_int<NUM_POLY_INT_COEFFS, bitpack_word_t>
+bp_unpack_poly_value (struct bitpack_d *bp, unsigned nbits)
+{
+ poly_int_pod<NUM_POLY_INT_COEFFS, bitpack_word_t> x;
+ for (int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
+ x.coeffs[i] = bp_unpack_value (bp, nbits);
+ return x;
+}
+
/* Write a character to the output block. */
Index: gcc/lto-streamer-in.c
===================================================================
--- gcc/lto-streamer-in.c 2017-10-23 11:41:25.264312838 +0100
+++ gcc/lto-streamer-in.c 2017-10-23 17:25:48.619492041 +0100
@@ -1607,7 +1607,7 @@ lto_input_mode_table (struct lto_file_de
unsigned int size = bp_unpack_value (&bp, 8);
unsigned int prec = bp_unpack_value (&bp, 16);
machine_mode inner = (machine_mode) bp_unpack_value (&bp, 8);
- unsigned int nunits = bp_unpack_value (&bp, 8);
+ poly_uint16 nunits = bp_unpack_poly_value (&bp, 16);
unsigned int ibit = 0, fbit = 0;
unsigned int real_fmt_len = 0;
const char *real_fmt_name = NULL;
@@ -1645,7 +1645,7 @@ lto_input_mode_table (struct lto_file_de
: GET_MODE_INNER (mr) != table[(int) inner])
|| GET_MODE_IBIT (mr) != ibit
|| GET_MODE_FBIT (mr) != fbit
- || GET_MODE_NUNITS (mr) != nunits)
+ || may_ne (GET_MODE_NUNITS (mr), nunits))
continue;
else if ((mclass == MODE_FLOAT || mclass == MODE_DECIMAL_FLOAT)
&& strcmp (REAL_MODE_FORMAT (mr)->name, real_fmt_name) != 0)
Index: gcc/lto-streamer-out.c
===================================================================
--- gcc/lto-streamer-out.c 2017-10-23 17:11:40.246949037 +0100
+++ gcc/lto-streamer-out.c 2017-10-23 17:25:48.620492005 +0100
@@ -2775,7 +2775,7 @@ lto_write_mode_table (void)
bp_pack_value (&bp, GET_MODE_SIZE (m), 8);
bp_pack_value (&bp, GET_MODE_PRECISION (m), 16);
bp_pack_value (&bp, GET_MODE_INNER (m), 8);
- bp_pack_value (&bp, GET_MODE_NUNITS (m), 8);
+ bp_pack_poly_value (&bp, GET_MODE_NUNITS (m), 16);
switch (GET_MODE_CLASS (m))
{
case MODE_FRACT:
Index: gcc/tree.c
===================================================================
--- gcc/tree.c 2017-10-23 17:22:35.830905181 +0100
+++ gcc/tree.c 2017-10-23 17:25:48.625491825 +0100
@@ -9654,19 +9654,19 @@ omp_clause_operand_check_failed (int idx
}
#endif /* ENABLE_TREE_CHECKING */
\f
-/* Create a new vector type node holding SUBPARTS units of type INNERTYPE,
+/* Create a new vector type node holding NUNITS units of type INNERTYPE,
and mapped to the machine mode MODE. Initialize its fields and build
the information necessary for debugging output. */
static tree
-make_vector_type (tree innertype, int nunits, machine_mode mode)
+make_vector_type (tree innertype, poly_int64 nunits, machine_mode mode)
{
tree t;
tree mv_innertype = TYPE_MAIN_VARIANT (innertype);
t = make_node (VECTOR_TYPE);
TREE_TYPE (t) = mv_innertype;
- SET_TYPE_VECTOR_SUBPARTS (t, nunits);
+ SET_TYPE_VECTOR_SUBPARTS (t, nunits.to_constant ()); /* Temporary */
SET_TYPE_MODE (t, mode);
if (TYPE_STRUCTURAL_EQUALITY_P (mv_innertype) || in_lto_p)
@@ -9693,13 +9693,6 @@ make_vector_type (tree innertype, int nu
return t;
}
-/* Temporary. */
-static tree
-make_vector_type (tree innertype, poly_uint64 nunits, machine_mode mode)
-{
- return make_vector_type (innertype, (int) nunits.to_constant (), mode);
-}
-
static tree
make_or_reuse_type (unsigned size, int unsignedp)
{
@@ -10557,7 +10550,7 @@ reconstruct_complex_type (tree type, tre
tree
build_vector_type_for_mode (tree innertype, machine_mode mode)
{
- int nunits;
+ poly_int64 nunits;
unsigned int bitsize;
switch (GET_MODE_CLASS (mode))
Index: gcc/emit-rtl.c
===================================================================
--- gcc/emit-rtl.c 2017-10-23 17:25:30.703136044 +0100
+++ gcc/emit-rtl.c 2017-10-23 17:25:48.618492077 +0100
@@ -5926,8 +5926,8 @@ static GTY((deletable)) rtx spare_vec_du
static rtx
gen_const_vec_duplicate_1 (machine_mode mode, rtx el)
{
- int nunits = GET_MODE_NUNITS (mode);
- if (1)
+ int nunits;
+ if (GET_MODE_NUNITS (mode).is_constant (&nunits))
{
rtvec v = rtvec_alloc (nunits);
@@ -6024,8 +6024,8 @@ gen_const_vec_series (machine_mode mode,
{
gcc_assert (CONSTANT_P (base) && CONSTANT_P (step));
- int nunits = GET_MODE_NUNITS (mode);
- if (1)
+ int nunits;
+ if (GET_MODE_NUNITS (mode).is_constant (&nunits))
{
rtvec v = rtvec_alloc (nunits);
scalar_mode inner_mode = GET_MODE_INNER (mode);
@@ -6089,7 +6089,7 @@ gen_const_vector (machine_mode mode, int
rtx
gen_rtx_CONST_VECTOR (machine_mode mode, rtvec v)
{
- gcc_assert (GET_MODE_NUNITS (mode) == GET_NUM_ELEM (v));
+ gcc_assert (must_eq (GET_MODE_NUNITS (mode), GET_NUM_ELEM (v)));
/* If the values are all the same, check to see if we can use one of the
standard constant vectors. */
Index: gcc/genrecog.c
===================================================================
--- gcc/genrecog.c 2017-10-23 17:16:50.367528682 +0100
+++ gcc/genrecog.c 2017-10-23 17:25:48.619492041 +0100
@@ -746,14 +746,20 @@ validate_pattern (rtx pattern, md_rtx_in
= VECTOR_MODE_P (mode) ? GET_MODE_INNER (mode) : mode;
if (GET_CODE (XEXP (pattern, 1)) == PARALLEL)
{
- int expected = VECTOR_MODE_P (mode) ? GET_MODE_NUNITS (mode) : 1;
- if (XVECLEN (XEXP (pattern, 1), 0) != expected)
+ int expected = 1;
+ unsigned int nelems;
+ if (VECTOR_MODE_P (mode)
+ && !GET_MODE_NUNITS (mode).is_constant (&expected))
+ error_at (info->loc,
+ "vec_select with variable-sized mode %s",
+ GET_MODE_NAME (mode));
+ else if (XVECLEN (XEXP (pattern, 1), 0) != expected)
error_at (info->loc,
"vec_select parallel with %d elements, expected %d",
XVECLEN (XEXP (pattern, 1), 0), expected);
- else if (VECTOR_MODE_P (imode))
+ else if (VECTOR_MODE_P (imode)
+ && GET_MODE_NUNITS (imode).is_constant (&nelems))
{
- unsigned int nelems = GET_MODE_NUNITS (imode);
int i;
for (i = 0; i < expected; ++i)
if (CONST_INT_P (XVECEXP (XEXP (pattern, 1), 0, i))
Index: gcc/optabs-query.c
===================================================================
--- gcc/optabs-query.c 2017-10-23 17:22:32.723227539 +0100
+++ gcc/optabs-query.c 2017-10-23 17:25:48.620492005 +0100
@@ -445,7 +445,12 @@ can_mult_highpart_p (machine_mode mode,
if (GET_MODE_CLASS (mode) != MODE_VECTOR_INT)
return 0;
- nunits = GET_MODE_NUNITS (mode);
+ /* We need a constant number of elements in order to construct
+ the permute mask below. */
+ /* ??? Maybe we should have specific optabs for these permutations,
+ so that we can use them even for a variable number of units. */
+ if (!GET_MODE_NUNITS (mode).is_constant (&nunits))
+ return 0;
op = uns_p ? vec_widen_umult_even_optab : vec_widen_smult_even_optab;
if (optab_handler (op, mode) != CODE_FOR_nothing)
Index: gcc/optabs-tree.c
===================================================================
--- gcc/optabs-tree.c 2017-10-23 17:11:39.939361220 +0100
+++ gcc/optabs-tree.c 2017-10-23 17:25:48.620492005 +0100
@@ -338,7 +338,7 @@ expand_vec_cond_expr_p (tree value_type,
return true;
if (GET_MODE_SIZE (value_mode) != GET_MODE_SIZE (cmp_op_mode)
- || GET_MODE_NUNITS (value_mode) != GET_MODE_NUNITS (cmp_op_mode))
+ || may_ne (GET_MODE_NUNITS (value_mode), GET_MODE_NUNITS (cmp_op_mode)))
return false;
if (get_vcond_icode (TYPE_MODE (value_type), TYPE_MODE (cmp_op_type),
Index: gcc/optabs.c
===================================================================
--- gcc/optabs.c 2017-10-23 17:11:40.272998820 +0100
+++ gcc/optabs.c 2017-10-23 17:25:48.621491969 +0100
@@ -370,17 +370,15 @@ force_expand_binop (machine_mode mode, o
rtx
expand_vector_broadcast (machine_mode vmode, rtx op)
{
- enum insn_code icode;
+ int n;
rtvec vec;
- rtx ret;
- int i, n;
gcc_checking_assert (VECTOR_MODE_P (vmode));
if (CONSTANT_P (op))
return gen_const_vec_duplicate (vmode, op);
- icode = optab_handler (vec_duplicate_optab, vmode);
+ insn_code icode = optab_handler (vec_duplicate_optab, vmode);
if (icode != CODE_FOR_nothing)
{
struct expand_operand ops[2];
@@ -390,6 +388,9 @@ expand_vector_broadcast (machine_mode vm
return ops[0].value;
}
+ if (!GET_MODE_NUNITS (vmode).is_constant (&n))
+ return NULL;
+
/* ??? If the target doesn't have a vec_init, then we have no easy way
of performing this operation. Most of this sort of generic support
is hidden away in the vector lowering support in gimple. */
@@ -398,11 +399,10 @@ expand_vector_broadcast (machine_mode vm
if (icode == CODE_FOR_nothing)
return NULL;
- n = GET_MODE_NUNITS (vmode);
vec = rtvec_alloc (n);
- for (i = 0; i < n; ++i)
+ for (int i = 0; i < n; ++i)
RTVEC_ELT (vec, i) = op;
- ret = gen_reg_rtx (vmode);
+ rtx ret = gen_reg_rtx (vmode);
emit_insn (GEN_FCN (icode) (ret, gen_rtx_PARALLEL (vmode, vec)));
return ret;
@@ -1068,7 +1068,7 @@ expand_binop_directly (enum insn_code ic
arguments. */
tmp_mode = insn_data[(int) icode].operand[0].mode;
if (VECTOR_MODE_P (mode)
- && GET_MODE_NUNITS (tmp_mode) != 2 * GET_MODE_NUNITS (mode))
+ && may_ne (GET_MODE_NUNITS (tmp_mode), 2 * GET_MODE_NUNITS (mode)))
{
delete_insns_since (last);
return NULL_RTX;
@@ -5385,16 +5385,15 @@ vector_compare_rtx (machine_mode cmp_mod
static rtx
shift_amt_for_vec_perm_mask (machine_mode op0_mode, rtx sel)
{
- unsigned int i, first, nelt = GET_MODE_NUNITS (GET_MODE (sel));
- unsigned int bitsize = GET_MODE_UNIT_BITSIZE (GET_MODE (sel));
-
if (GET_CODE (sel) != CONST_VECTOR)
return NULL_RTX;
- first = INTVAL (CONST_VECTOR_ELT (sel, 0));
+ unsigned int nelt = CONST_VECTOR_NUNITS (sel);
+ unsigned int bitsize = GET_MODE_UNIT_BITSIZE (GET_MODE (sel));
+ unsigned int first = INTVAL (CONST_VECTOR_ELT (sel, 0));
if (first >= nelt)
return NULL_RTX;
- for (i = 1; i < nelt; i++)
+ for (unsigned int i = 1; i < nelt; i++)
{
int idx = INTVAL (CONST_VECTOR_ELT (sel, i));
unsigned int expected = i + first;
@@ -5450,7 +5449,7 @@ expand_vec_perm (machine_mode mode, rtx
{
enum insn_code icode;
machine_mode qimode;
- unsigned int i, w, e, u;
+ unsigned int i, w, u;
rtx tmp, sel_qi = NULL;
rtvec vec;
@@ -5458,7 +5457,6 @@ expand_vec_perm (machine_mode mode, rtx
target = gen_reg_rtx (mode);
w = GET_MODE_SIZE (mode);
- e = GET_MODE_NUNITS (mode);
u = GET_MODE_UNIT_SIZE (mode);
/* Set QIMODE to a different vector mode with byte elements.
@@ -5474,6 +5472,7 @@ expand_vec_perm (machine_mode mode, rtx
{
/* See if this can be handled with a vec_shr. We only do this if the
second vector is all zeroes. */
+ unsigned int e = CONST_VECTOR_NUNITS (sel);
enum insn_code shift_code = optab_handler (vec_shr_optab, mode);
enum insn_code shift_code_qi = ((qimode != VOIDmode && qimode != mode)
? optab_handler (vec_shr_optab, qimode)
@@ -5688,7 +5687,8 @@ expand_vec_cond_expr (tree vec_cond_type
gcc_assert (GET_MODE_SIZE (mode) == GET_MODE_SIZE (cmp_op_mode)
- && GET_MODE_NUNITS (mode) == GET_MODE_NUNITS (cmp_op_mode));
+ && must_eq (GET_MODE_NUNITS (mode),
+ GET_MODE_NUNITS (cmp_op_mode)));
icode = get_vcond_icode (mode, cmp_op_mode, unsignedp);
if (icode == CODE_FOR_nothing)
@@ -5787,7 +5787,6 @@ expand_mult_highpart (machine_mode mode,
machine_mode wmode;
rtx m1, m2, perm;
optab tab1, tab2;
- rtvec v;
method = can_mult_highpart_p (mode, uns_p);
switch (method)
@@ -5813,9 +5812,9 @@ expand_mult_highpart (machine_mode mode,
}
icode = optab_handler (tab1, mode);
- nunits = GET_MODE_NUNITS (mode);
wmode = insn_data[icode].operand[0].mode;
- gcc_checking_assert (2 * GET_MODE_NUNITS (wmode) == nunits);
+ gcc_checking_assert (must_eq (2 * GET_MODE_NUNITS (wmode),
+ GET_MODE_NUNITS (mode)));
gcc_checking_assert (GET_MODE_SIZE (wmode) == GET_MODE_SIZE (mode));
create_output_operand (&eops[0], gen_reg_rtx (wmode), wmode);
@@ -5830,9 +5829,13 @@ expand_mult_highpart (machine_mode mode,
expand_insn (optab_handler (tab2, mode), 3, eops);
m2 = gen_lowpart (mode, eops[0].value);
- v = rtvec_alloc (nunits);
if (method == 2)
{
+ /* ??? Might want a way of representing this with variable-width
+ vectors. */
+ if (!GET_MODE_NUNITS (mode).is_constant (&nunits))
+ return NULL_RTX;
+ rtvec v = rtvec_alloc (nunits);
for (i = 0; i < nunits; ++i)
RTVEC_ELT (v, i) = GEN_INT (!BYTES_BIG_ENDIAN + (i & ~1)
+ ((i & 1) ? nunits : 0));
Index: gcc/rtlanal.c
===================================================================
--- gcc/rtlanal.c 2017-10-23 17:25:38.243864993 +0100
+++ gcc/rtlanal.c 2017-10-23 17:25:48.622491933 +0100
@@ -3706,11 +3706,11 @@ subreg_get_info (unsigned int xregno, ma
if (HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode))
{
/* As a consequence, we must be dealing with a constant number of
- scalars, and thus a constant offset. */
+ scalars, and thus a constant offset and number of units. */
HOST_WIDE_INT coffset = offset.to_constant ();
HOST_WIDE_INT cysize = ysize.to_constant ();
nregs_xmode = HARD_REGNO_NREGS_WITH_PADDING (xregno, xmode);
- unsigned int nunits = GET_MODE_NUNITS (xmode);
+ unsigned int nunits = GET_MODE_NUNITS (xmode).to_constant ();
scalar_mode xmode_unit = GET_MODE_INNER (xmode);
gcc_assert (HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode_unit));
gcc_assert (nregs_xmode
Index: gcc/simplify-rtx.c
===================================================================
--- gcc/simplify-rtx.c 2017-10-23 17:18:47.665057096 +0100
+++ gcc/simplify-rtx.c 2017-10-23 17:25:48.622491933 +0100
@@ -1223,7 +1223,7 @@ simplify_unary_operation_1 (enum rtx_cod
/* If we know that the value is already truncated, we can
replace the TRUNCATE with a SUBREG. */
- if (GET_MODE_NUNITS (mode) == 1
+ if (must_eq (GET_MODE_NUNITS (mode), 1)
&& (TRULY_NOOP_TRUNCATION_MODES_P (mode, GET_MODE (op))
|| truncated_to_mode (mode, op)))
{
@@ -1740,9 +1740,10 @@ simplify_const_unary_operation (enum rtx
}
if (CONST_SCALAR_INT_P (op) || CONST_DOUBLE_AS_FLOAT_P (op))
return gen_const_vec_duplicate (mode, op);
- if (GET_CODE (op) == CONST_VECTOR)
+ unsigned int n_elts;
+ if (GET_CODE (op) == CONST_VECTOR
+ && GET_MODE_NUNITS (mode).is_constant (&n_elts))
{
- unsigned int n_elts = GET_MODE_NUNITS (mode);
unsigned int in_n_elts = CONST_VECTOR_NUNITS (op);
gcc_assert (in_n_elts < n_elts);
gcc_assert ((n_elts % in_n_elts) == 0);
@@ -1755,15 +1756,14 @@ simplify_const_unary_operation (enum rtx
if (VECTOR_MODE_P (mode) && GET_CODE (op) == CONST_VECTOR)
{
- int elt_size = GET_MODE_UNIT_SIZE (mode);
- unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
machine_mode opmode = GET_MODE (op);
- int op_elt_size = GET_MODE_UNIT_SIZE (opmode);
- unsigned op_n_elts = (GET_MODE_SIZE (opmode) / op_elt_size);
+ unsigned int n_elts = CONST_VECTOR_NUNITS (op);
+ gcc_assert (must_eq (GET_MODE_NUNITS (mode), n_elts));
+ gcc_assert (must_eq (GET_MODE_NUNITS (opmode), n_elts));
+
rtvec v = rtvec_alloc (n_elts);
unsigned int i;
- gcc_assert (op_n_elts == n_elts);
for (i = 0; i < n_elts; i++)
{
rtx x = simplify_unary_operation (code, GET_MODE_INNER (mode),
@@ -3614,13 +3614,14 @@ simplify_binary_operation_1 (enum rtx_co
nested VEC_SELECT expressions. When input operand is a memory
operand, this operation can be simplified to a simple scalar
load from an offseted memory address. */
- if (GET_CODE (trueop0) == VEC_SELECT)
+ int n_elts;
+ if (GET_CODE (trueop0) == VEC_SELECT
+ && (GET_MODE_NUNITS (GET_MODE (XEXP (trueop0, 0)))
+ .is_constant (&n_elts)))
{
rtx op0 = XEXP (trueop0, 0);
rtx op1 = XEXP (trueop0, 1);
- int n_elts = GET_MODE_NUNITS (GET_MODE (op0));
-
int i = INTVAL (XVECEXP (trueop1, 0, 0));
int elem;
@@ -3645,9 +3646,11 @@ simplify_binary_operation_1 (enum rtx_co
mode00 = GET_MODE (op00);
mode01 = GET_MODE (op01);
- /* Find out number of elements of each operand. */
- n_elts00 = GET_MODE_NUNITS (mode00);
- n_elts01 = GET_MODE_NUNITS (mode01);
+ /* Find out the number of elements of each operand.
+ Since the concatenated result has a constant number
+ of elements, the operands must too. */
+ n_elts00 = GET_MODE_NUNITS (mode00).to_constant ();
+ n_elts01 = GET_MODE_NUNITS (mode01).to_constant ();
gcc_assert (n_elts == n_elts00 + n_elts01);
@@ -3686,12 +3689,11 @@ simplify_binary_operation_1 (enum rtx_co
if (GET_CODE (trueop0) == CONST_VECTOR)
{
- int elt_size = GET_MODE_UNIT_SIZE (mode);
- unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
+ unsigned n_elts = XVECLEN (trueop1, 0);
rtvec v = rtvec_alloc (n_elts);
unsigned int i;
- gcc_assert (XVECLEN (trueop1, 0) == (int) n_elts);
+ gcc_assert (must_eq (n_elts, GET_MODE_NUNITS (mode)));
for (i = 0; i < n_elts; i++)
{
rtx x = XVECEXP (trueop1, 0, i);
@@ -3760,15 +3762,18 @@ simplify_binary_operation_1 (enum rtx_co
}
/* If we select one half of a vec_concat, return that. */
+ int l0, l1;
if (GET_CODE (trueop0) == VEC_CONCAT
+ && (GET_MODE_NUNITS (GET_MODE (XEXP (trueop0, 0)))
+ .is_constant (&l0))
+ && (GET_MODE_NUNITS (GET_MODE (XEXP (trueop0, 1)))
+ .is_constant (&l1))
&& CONST_INT_P (XVECEXP (trueop1, 0, 0)))
{
rtx subop0 = XEXP (trueop0, 0);
rtx subop1 = XEXP (trueop0, 1);
machine_mode mode0 = GET_MODE (subop0);
machine_mode mode1 = GET_MODE (subop1);
- int l0 = GET_MODE_NUNITS (mode0);
- int l1 = GET_MODE_NUNITS (mode1);
int i0 = INTVAL (XVECEXP (trueop1, 0, 0));
if (i0 == 0 && !side_effects_p (op1) && mode == mode0)
{
@@ -3875,7 +3880,7 @@ simplify_binary_operation_1 (enum rtx_co
{
rtx op0_subop1 = XEXP (trueop0, 1);
gcc_assert (GET_CODE (op0_subop1) == PARALLEL);
- gcc_assert (XVECLEN (trueop1, 0) == GET_MODE_NUNITS (mode));
+ gcc_assert (must_eq (XVECLEN (trueop1, 0), GET_MODE_NUNITS (mode)));
/* Apply the outer ordering vector to the inner one. (The inner
ordering vector is expressly permitted to be of a different
@@ -3919,15 +3924,16 @@ simplify_binary_operation_1 (enum rtx_co
else
gcc_assert (GET_MODE_INNER (mode) == op1_mode);
+ unsigned int n_elts, in_n_elts;
if ((GET_CODE (trueop0) == CONST_VECTOR
|| CONST_SCALAR_INT_P (trueop0)
|| CONST_DOUBLE_AS_FLOAT_P (trueop0))
&& (GET_CODE (trueop1) == CONST_VECTOR
|| CONST_SCALAR_INT_P (trueop1)
- || CONST_DOUBLE_AS_FLOAT_P (trueop1)))
+ || CONST_DOUBLE_AS_FLOAT_P (trueop1))
+ && GET_MODE_NUNITS (mode).is_constant (&n_elts)
+ && GET_MODE_NUNITS (op0_mode).is_constant (&in_n_elts))
{
- unsigned n_elts = GET_MODE_NUNITS (mode);
- unsigned in_n_elts = GET_MODE_NUNITS (op0_mode);
rtvec v = rtvec_alloc (n_elts);
unsigned int i;
for (i = 0; i < n_elts; i++)
@@ -4019,7 +4025,7 @@ simplify_const_binary_operation (enum rt
{
unsigned int n_elts = CONST_VECTOR_NUNITS (op0);
gcc_assert (n_elts == (unsigned int) CONST_VECTOR_NUNITS (op1));
- gcc_assert (n_elts == GET_MODE_NUNITS (mode));
+ gcc_assert (must_eq (n_elts, GET_MODE_NUNITS (mode)));
rtvec v = rtvec_alloc (n_elts);
unsigned int i;
@@ -4045,7 +4051,9 @@ simplify_const_binary_operation (enum rt
|| CONST_DOUBLE_AS_FLOAT_P (op1)
|| GET_CODE (op1) == CONST_FIXED))
{
- unsigned n_elts = GET_MODE_NUNITS (mode);
+ /* Both inputs have a constant number of elements, so the result
+ must too. */
+ unsigned n_elts = GET_MODE_NUNITS (mode).to_constant ();
rtvec v = rtvec_alloc (n_elts);
gcc_assert (n_elts >= 2);
@@ -4059,8 +4067,8 @@ simplify_const_binary_operation (enum rt
}
else
{
- unsigned op0_n_elts = GET_MODE_NUNITS (GET_MODE (op0));
- unsigned op1_n_elts = GET_MODE_NUNITS (GET_MODE (op1));
+ unsigned op0_n_elts = GET_MODE_NUNITS (GET_MODE (op0)).to_constant ();
+ unsigned op1_n_elts = GET_MODE_NUNITS (GET_MODE (op1)).to_constant ();
unsigned i;
gcc_assert (GET_CODE (op0) == CONST_VECTOR);
@@ -5563,6 +5571,7 @@ simplify_ternary_operation (enum rtx_cod
bool any_change = false;
rtx tem, trueop2;
scalar_int_mode int_mode, int_op0_mode;
+ unsigned int n_elts;
switch (code)
{
@@ -5748,9 +5757,9 @@ simplify_ternary_operation (enum rtx_cod
gcc_assert (GET_MODE (op1) == mode);
gcc_assert (VECTOR_MODE_P (mode));
trueop2 = avoid_constant_pool_reference (op2);
- if (CONST_INT_P (trueop2))
+ if (CONST_INT_P (trueop2)
+ && GET_MODE_NUNITS (mode).is_constant (&n_elts))
{
- unsigned n_elts = GET_MODE_NUNITS (mode);
unsigned HOST_WIDE_INT sel = UINTVAL (trueop2);
unsigned HOST_WIDE_INT mask;
if (n_elts == HOST_BITS_PER_WIDE_INT)
@@ -5814,7 +5823,7 @@ simplify_ternary_operation (enum rtx_cod
if (GET_CODE (op0) == VEC_DUPLICATE
&& GET_CODE (XEXP (op0, 0)) == VEC_SELECT
&& GET_CODE (XEXP (XEXP (op0, 0), 1)) == PARALLEL
- && mode_nunits[GET_MODE (XEXP (op0, 0))] == 1)
+ && must_eq (GET_MODE_NUNITS (GET_MODE (XEXP (op0, 0))), 1))
{
tem = XVECEXP ((XEXP (XEXP (op0, 0), 1)), 0, 0);
if (CONST_INT_P (tem) && CONST_INT_P (op2))
@@ -6574,7 +6583,7 @@ test_vector_ops_duplicate (machine_mode
{
scalar_mode inner_mode = GET_MODE_INNER (mode);
rtx duplicate = gen_rtx_VEC_DUPLICATE (mode, scalar_reg);
- unsigned int nunits = GET_MODE_NUNITS (mode);
+ poly_uint64 nunits = GET_MODE_NUNITS (mode);
if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
{
/* Test some simple unary cases with VEC_DUPLICATE arguments. */
@@ -6611,11 +6620,15 @@ test_vector_ops_duplicate (machine_mode
duplicate, zero_par));
/* And again with the final element. */
- rtx last_index = gen_int_mode (GET_MODE_NUNITS (mode) - 1, word_mode);
- rtx last_par = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, last_index));
- ASSERT_RTX_PTR_EQ (scalar_reg,
- simplify_binary_operation (VEC_SELECT, inner_mode,
- duplicate, last_par));
+ unsigned HOST_WIDE_INT const_nunits;
+ if (nunits.is_constant (&const_nunits))
+ {
+ rtx last_index = gen_int_mode (const_nunits - 1, word_mode);
+ rtx last_par = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, last_index));
+ ASSERT_RTX_PTR_EQ (scalar_reg,
+ simplify_binary_operation (VEC_SELECT, inner_mode,
+ duplicate, last_par));
+ }
/* Test a scalar subreg of a VEC_DUPLICATE. */
poly_uint64 offset = subreg_lowpart_offset (inner_mode, mode);
@@ -6624,7 +6637,7 @@ test_vector_ops_duplicate (machine_mode
mode, offset));
machine_mode narrower_mode;
- if (nunits > 2
+ if (may_gt (nunits, 2U)
&& mode_for_vector (inner_mode, 2).exists (&narrower_mode)
&& VECTOR_MODE_P (narrower_mode))
{
@@ -6712,7 +6725,7 @@ test_vector_ops ()
rtx scalar_reg = make_test_reg (GET_MODE_INNER (mode));
test_vector_ops_duplicate (mode, scalar_reg);
if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
- && GET_MODE_NUNITS (mode) > 2)
+ && may_gt (GET_MODE_NUNITS (mode), 2))
test_vector_ops_series (mode, scalar_reg);
}
}
Index: gcc/tree-vect-data-refs.c
===================================================================
--- gcc/tree-vect-data-refs.c 2017-10-23 17:22:44.864968082 +0100
+++ gcc/tree-vect-data-refs.c 2017-10-23 17:25:48.623491897 +0100
@@ -4568,9 +4568,10 @@ vect_grouped_store_supported (tree vecty
}
/* Check that the permutation is supported. */
- if (VECTOR_MODE_P (mode))
+ unsigned int nelt;
+ if (VECTOR_MODE_P (mode) && GET_MODE_NUNITS (mode).is_constant (&nelt))
{
- unsigned int i, nelt = GET_MODE_NUNITS (mode);
+ unsigned int i;
auto_vec_perm_indices sel (nelt);
sel.quick_grow (nelt);
@@ -5156,9 +5157,10 @@ vect_grouped_load_supported (tree vectyp
}
/* Check that the permutation is supported. */
- if (VECTOR_MODE_P (mode))
+ unsigned int nelt;
+ if (VECTOR_MODE_P (mode) && GET_MODE_NUNITS (mode).is_constant (&nelt))
{
- unsigned int i, j, nelt = GET_MODE_NUNITS (mode);
+ unsigned int i, j;
auto_vec_perm_indices sel (nelt);
sel.quick_grow (nelt);
Index: gcc/tree-vect-generic.c
===================================================================
--- gcc/tree-vect-generic.c 2017-10-23 17:22:45.856865193 +0100
+++ gcc/tree-vect-generic.c 2017-10-23 17:25:48.623491897 +0100
@@ -1159,7 +1159,7 @@ type_for_widest_vector_mode (tree type,
{
machine_mode inner_mode = TYPE_MODE (type);
machine_mode best_mode = VOIDmode, mode;
- int best_nunits = 0;
+ poly_int64 best_nunits = 0;
if (SCALAR_FLOAT_MODE_P (inner_mode))
mode = MIN_MODE_VECTOR_FLOAT;
@@ -1176,7 +1176,7 @@ type_for_widest_vector_mode (tree type,
FOR_EACH_MODE_FROM (mode, mode)
if (GET_MODE_INNER (mode) == inner_mode
- && GET_MODE_NUNITS (mode) > best_nunits
+ && may_gt (GET_MODE_NUNITS (mode), best_nunits)
&& optab_handler (op, mode) != CODE_FOR_nothing)
best_mode = mode, best_nunits = GET_MODE_NUNITS (mode);
Index: gcc/tree-vect-loop.c
===================================================================
--- gcc/tree-vect-loop.c 2017-10-23 17:22:37.879692661 +0100
+++ gcc/tree-vect-loop.c 2017-10-23 17:25:48.624491861 +0100
@@ -3750,10 +3750,13 @@ have_whole_vector_shift (machine_mode mo
if (direct_optab_handler (vec_perm_const_optab, mode) == CODE_FOR_nothing)
return false;
- unsigned int i, nelt = GET_MODE_NUNITS (mode);
- auto_vec_perm_indices sel (nelt);
+ /* Variable-length vectors should be handled via the optab. */
+ unsigned int nelt;
+ if (!GET_MODE_NUNITS (mode).is_constant (&nelt))
+ return false;
- for (i = nelt/2; i >= 1; i/=2)
+ auto_vec_perm_indices sel (nelt);
+ for (unsigned int i = nelt / 2; i >= 1; i /= 2)
{
sel.truncate (0);
calc_vec_perm_mask_for_shift (i, nelt, &sel);
Index: gcc/ada/gcc-interface/misc.c
===================================================================
--- gcc/ada/gcc-interface/misc.c 2017-10-23 11:41:24.995420946 +0100
+++ gcc/ada/gcc-interface/misc.c 2017-10-23 17:25:48.617492113 +0100
@@ -1298,9 +1298,10 @@ enumerate_modes (void (*f) (const char *
}
/* If no predefined C types were found, register the mode itself. */
- if (!skip_p)
+ int nunits;
+ if (!skip_p && GET_MODE_NUNITS (i).is_constant (&nunits))
f (GET_MODE_NAME (i), digs, complex_p,
- vector_p ? GET_MODE_NUNITS (i) : 0, float_rep,
+ vector_p ? nunits : 0, float_rep,
GET_MODE_PRECISION (i), GET_MODE_BITSIZE (i),
GET_MODE_ALIGNMENT (i));
}
next prev parent reply other threads:[~2017-10-23 17:41 UTC|newest]
Thread overview: 302+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-23 16:57 [000/nnn] poly_int: representation of runtime offsets and sizes Richard Sandiford
2017-10-23 16:58 ` [001/nnn] poly_int: add poly-int.h Richard Sandiford
2017-10-25 16:17 ` Martin Sebor
2017-11-08 9:44 ` Richard Sandiford
2017-11-08 16:51 ` Martin Sebor
2017-11-08 16:56 ` Richard Sandiford
2017-11-08 17:33 ` Martin Sebor
2017-11-08 17:34 ` Martin Sebor
2017-11-08 18:34 ` Richard Sandiford
2017-11-09 9:10 ` Martin Sebor
2017-11-09 11:14 ` Richard Sandiford
2017-11-09 17:42 ` Martin Sebor
2017-11-13 17:59 ` Jeff Law
2017-11-13 23:57 ` Richard Sandiford
2017-11-14 1:21 ` Martin Sebor
2017-11-14 9:46 ` Richard Sandiford
2017-11-17 3:31 ` Jeff Law
2017-11-08 10:03 ` Richard Sandiford
2017-11-14 0:42 ` Richard Sandiford
2017-12-06 20:11 ` Jeff Law
2017-12-07 14:46 ` Richard Biener
2017-12-07 15:08 ` Jeff Law
2017-12-07 22:39 ` Richard Sandiford
2017-12-07 22:48 ` Jeff Law
2017-12-15 3:40 ` Martin Sebor
2017-12-15 9:08 ` Richard Biener
2017-12-15 15:19 ` Jeff Law
2017-10-23 16:59 ` [002/nnn] poly_int: IN_TARGET_CODE Richard Sandiford
2017-11-17 3:35 ` Jeff Law
2017-12-15 1:08 ` Richard Sandiford
2017-12-15 15:22 ` Jeff Law
2017-10-23 17:00 ` [004/nnn] poly_int: mode query functions Richard Sandiford
2017-11-17 3:37 ` Jeff Law
2017-10-23 17:00 ` [003/nnn] poly_int: MACRO_MODE Richard Sandiford
2017-11-17 3:36 ` Jeff Law
2017-10-23 17:01 ` [005/nnn] poly_int: rtx constants Richard Sandiford
2017-11-17 4:17 ` Jeff Law
2017-12-15 1:25 ` Richard Sandiford
2017-12-19 4:52 ` Jeff Law
2017-10-23 17:02 ` [006/nnn] poly_int: tree constants Richard Sandiford
2017-10-25 17:14 ` Martin Sebor
2017-10-25 21:35 ` Richard Sandiford
2017-10-26 5:52 ` Martin Sebor
2017-10-26 8:40 ` Richard Sandiford
2017-10-26 16:45 ` Martin Sebor
2017-10-26 18:05 ` Richard Sandiford
2017-10-26 23:53 ` Martin Sebor
2017-10-27 8:33 ` Richard Sandiford
2017-10-29 16:56 ` Martin Sebor
2017-10-30 6:36 ` Trevor Saunders
2017-10-31 20:25 ` Martin Sebor
2017-10-26 18:11 ` Pedro Alves
2017-10-26 19:12 ` Martin Sebor
2017-10-26 19:19 ` Pedro Alves
2017-10-26 23:41 ` Martin Sebor
2017-10-30 10:26 ` Pedro Alves
2017-10-31 16:12 ` Martin Sebor
2017-11-17 4:51 ` Jeff Law
2017-11-18 15:48 ` Richard Sandiford
2017-10-23 17:02 ` [007/nnn] poly_int: dump routines Richard Sandiford
2017-11-17 3:38 ` Jeff Law
2017-10-23 17:03 ` [008/nnn] poly_int: create_integer_operand Richard Sandiford
2017-11-17 3:40 ` Jeff Law
2017-10-23 17:04 ` [009/nnn] poly_int: TRULY_NOOP_TRUNCATION Richard Sandiford
2017-11-17 3:40 ` Jeff Law
2017-10-23 17:04 ` [010/nnn] poly_int: REG_OFFSET Richard Sandiford
2017-11-17 3:41 ` Jeff Law
2017-10-23 17:05 ` [013/nnn] poly_int: same_addr_size_stores_p Richard Sandiford
2017-11-17 4:11 ` Jeff Law
2017-10-23 17:05 ` [012/nnn] poly_int: fold_ctor_reference Richard Sandiford
2017-11-17 3:59 ` Jeff Law
2017-10-23 17:05 ` [011/nnn] poly_int: DWARF locations Richard Sandiford
2017-11-17 17:40 ` Jeff Law
2017-10-23 17:06 ` [014/nnn] poly_int: indirect_refs_may_alias_p Richard Sandiford
2017-11-17 18:11 ` Jeff Law
2017-11-20 13:31 ` Richard Sandiford
2017-11-21 0:49 ` Jeff Law
2017-10-23 17:06 ` [015/nnn] poly_int: ao_ref and vn_reference_op_t Richard Sandiford
2017-11-18 4:25 ` Jeff Law
2017-10-23 17:07 ` [016/nnn] poly_int: dse.c Richard Sandiford
2017-11-18 4:30 ` Jeff Law
2017-10-23 17:07 ` [017/nnn] poly_int: rtx_addr_can_trap_p_1 Richard Sandiford
2017-11-18 4:46 ` Jeff Law
2017-10-23 17:08 ` [018/nnn] poly_int: MEM_OFFSET and MEM_SIZE Richard Sandiford
2017-12-06 18:27 ` Jeff Law
2017-10-23 17:08 ` [020/nnn] poly_int: store_bit_field bitrange Richard Sandiford
2017-12-05 23:43 ` Jeff Law
2017-10-23 17:08 ` [019/nnn] poly_int: lra frame offsets Richard Sandiford
2017-12-06 0:16 ` Jeff Law
2017-10-23 17:09 ` [022/nnn] poly_int: C++ bitfield regions Richard Sandiford
2017-12-05 23:39 ` Jeff Law
2017-10-23 17:09 ` [023/nnn] poly_int: store_field & co Richard Sandiford
2017-12-05 23:49 ` Jeff Law
2017-10-23 17:09 ` [021/nnn] poly_int: extract_bit_field bitrange Richard Sandiford
2017-12-05 23:46 ` Jeff Law
2017-10-23 17:10 ` [024/nnn] poly_int: ira subreg liveness tracking Richard Sandiford
2017-11-28 21:10 ` Jeff Law
2017-12-05 21:54 ` Richard Sandiford
2017-10-23 17:10 ` [025/nnn] poly_int: SUBREG_BYTE Richard Sandiford
2017-12-06 18:50 ` Jeff Law
2017-10-23 17:11 ` [027/nnn] poly_int: DWARF CFA offsets Richard Sandiford
2017-12-06 0:40 ` Jeff Law
2017-10-23 17:11 ` [026/nnn] poly_int: operand_subword Richard Sandiford
2017-11-28 17:51 ` Jeff Law
2017-10-23 17:12 ` [028/nnn] poly_int: ipa_parm_adjustment Richard Sandiford
2017-11-28 17:47 ` Jeff Law
2017-10-23 17:12 ` [030/nnn] poly_int: get_addr_unit_base_and_extent Richard Sandiford
2017-12-06 0:26 ` Jeff Law
2017-10-23 17:12 ` [029/nnn] poly_int: get_ref_base_and_extent Richard Sandiford
2017-12-06 20:03 ` Jeff Law
2017-10-23 17:13 ` [031/nnn] poly_int: aff_tree Richard Sandiford
2017-12-06 0:04 ` Jeff Law
2017-10-23 17:13 ` [032/nnn] poly_int: symbolic_number Richard Sandiford
2017-11-28 17:45 ` Jeff Law
2017-10-23 17:13 ` [033/nnn] poly_int: pointer_may_wrap_p Richard Sandiford
2017-11-28 17:44 ` Jeff Law
2017-10-23 17:14 ` [036/nnn] poly_int: get_object_alignment_2 Richard Sandiford
2017-11-28 17:37 ` Jeff Law
2017-10-23 17:14 ` [034/nnn] poly_int: get_inner_reference_aff Richard Sandiford
2017-11-28 17:56 ` Jeff Law
2017-10-23 17:14 ` [035/nnn] poly_int: expand_debug_expr Richard Sandiford
2017-12-05 17:08 ` Jeff Law
2017-10-23 17:16 ` [037/nnn] poly_int: get_bit_range Richard Sandiford
2017-12-05 23:19 ` Jeff Law
2017-10-23 17:17 ` [039/nnn] poly_int: pass_store_merging::execute Richard Sandiford
2017-11-28 18:00 ` Jeff Law
2017-12-20 12:59 ` Richard Sandiford
2017-10-23 17:17 ` [038/nnn] poly_int: fold_comparison Richard Sandiford
2017-11-28 21:47 ` Jeff Law
2017-10-23 17:18 ` [042/nnn] poly_int: reload1.c Richard Sandiford
2017-12-05 17:23 ` Jeff Law
2017-10-23 17:18 ` [040/nnn] poly_int: get_inner_reference & co Richard Sandiford
2017-12-06 17:26 ` Jeff Law
2018-12-21 11:17 ` Thomas Schwinge
2018-12-21 11:40 ` Jakub Jelinek
2018-12-28 14:34 ` Thomas Schwinge
2017-10-23 17:18 ` [041/nnn] poly_int: reload.c Richard Sandiford
2017-12-05 17:10 ` Jeff Law
2017-10-23 17:19 ` [044/nnn] poly_int: push_block/emit_push_insn Richard Sandiford
2017-11-28 22:18 ` Jeff Law
2017-10-23 17:19 ` [043/nnn] poly_int: frame allocations Richard Sandiford
2017-12-06 3:15 ` Jeff Law
2017-10-23 17:19 ` [045/nnn] poly_int: REG_ARGS_SIZE Richard Sandiford
2017-12-06 0:10 ` Jeff Law
2017-12-22 21:56 ` Andreas Schwab
2017-12-23 9:36 ` Richard Sandiford
2017-12-24 12:49 ` Andreas Schwab
2017-12-28 20:37 ` RFA: Fix REG_ARGS_SIZE handling when pushing TLS addresses Richard Sandiford
2018-01-02 19:07 ` Jeff Law
2017-10-23 17:20 ` [047/nnn] poly_int: argument sizes Richard Sandiford
2017-12-06 20:57 ` Jeff Law
2017-12-20 11:37 ` Richard Sandiford
2017-10-23 17:20 ` [046/nnn] poly_int: instantiate_virtual_regs Richard Sandiford
2017-11-28 18:00 ` Jeff Law
2017-10-23 17:21 ` [049/nnn] poly_int: emit_inc Richard Sandiford
2017-11-28 17:30 ` Jeff Law
2017-10-23 17:21 ` [048/nnn] poly_int: cfgexpand stack variables Richard Sandiford
2017-12-05 23:22 ` Jeff Law
2017-10-23 17:21 ` [050/nnn] poly_int: reload<->ira interface Richard Sandiford
2017-11-28 16:55 ` Jeff Law
2017-10-23 17:22 ` [051/nnn] poly_int: emit_group_load/store Richard Sandiford
2017-12-05 23:26 ` Jeff Law
2017-10-23 17:22 ` [052/nnn] poly_int: bit_field_size/offset Richard Sandiford
2017-12-05 17:25 ` Jeff Law
2017-10-23 17:22 ` [053/nnn] poly_int: decode_addr_const Richard Sandiford
2017-11-28 16:53 ` Jeff Law
2017-10-23 17:23 ` [054/nnn] poly_int: adjust_ptr_info_misalignment Richard Sandiford
2017-11-28 16:53 ` Jeff Law
2017-10-23 17:23 ` [055/nnn] poly_int: find_bswap_or_nop_load Richard Sandiford
2017-11-28 16:52 ` Jeff Law
2017-10-23 17:24 ` [056/nnn] poly_int: MEM_REF offsets Richard Sandiford
2017-12-06 0:46 ` Jeff Law
2017-10-23 17:24 ` [057/nnn] poly_int: build_ref_for_offset Richard Sandiford
2017-11-28 16:51 ` Jeff Law
2017-10-23 17:24 ` [058/nnn] poly_int: get_binfo_at_offset Richard Sandiford
2017-11-28 16:50 ` Jeff Law
2017-10-23 17:25 ` [059/nnn] poly_int: tree-ssa-loop-ivopts.c:iv_use Richard Sandiford
2017-12-05 17:26 ` Jeff Law
2017-10-23 17:25 ` [060/nnn] poly_int: loop versioning threshold Richard Sandiford
2017-12-05 17:31 ` Jeff Law
2017-10-23 17:25 ` [061/nnn] poly_int: compute_data_ref_alignment Richard Sandiford
2017-11-28 16:49 ` Jeff Law
2017-10-23 17:26 ` [062/nnn] poly_int: prune_runtime_alias_test_list Richard Sandiford
2017-12-05 17:33 ` Jeff Law
2017-10-23 17:26 ` [063/nnn] poly_int: vectoriser vf and uf Richard Sandiford
2017-12-06 2:46 ` Jeff Law
2018-01-03 21:23 ` [PATCH] Fix gcc.dg/vect-opt-info-1.c testcase Jakub Jelinek
2018-01-03 21:30 ` Richard Sandiford
2018-01-04 17:32 ` Jeff Law
2017-10-23 17:27 ` [064/nnn] poly_int: SLP max_units Richard Sandiford
2017-12-05 17:41 ` Jeff Law
2017-10-23 17:27 ` [066/nnn] poly_int: omp_max_vf Richard Sandiford
2017-12-05 17:40 ` Jeff Law
2017-10-23 17:27 ` [065/nnn] poly_int: vect_nunits_for_cost Richard Sandiford
2017-12-05 17:35 ` Jeff Law
2017-10-23 17:28 ` [068/nnn] poly_int: current_vector_size and TARGET_AUTOVECTORIZE_VECTOR_SIZES Richard Sandiford
2017-12-06 1:52 ` Jeff Law
2017-10-23 17:28 ` [067/nnn] poly_int: get_mask_mode Richard Sandiford
2017-11-28 16:48 ` Jeff Law
2017-10-23 17:29 ` [069/nnn] poly_int: vector_alignment_reachable_p Richard Sandiford
2017-11-28 16:48 ` Jeff Law
2017-10-23 17:29 ` [071/nnn] poly_int: vectorizable_induction Richard Sandiford
2017-12-05 17:44 ` Jeff Law
2017-10-23 17:29 ` [070/nnn] poly_int: vectorizable_reduction Richard Sandiford
2017-11-22 18:11 ` Richard Sandiford
2017-12-06 0:33 ` Jeff Law
2017-10-23 17:30 ` [074/nnn] poly_int: vectorizable_call Richard Sandiford
2017-11-28 16:46 ` Jeff Law
2017-10-23 17:30 ` [072/nnn] poly_int: vectorizable_live_operation Richard Sandiford
2017-11-28 16:47 ` Jeff Law
2017-10-23 17:30 ` [073/nnn] poly_int: vectorizable_load/store Richard Sandiford
2017-12-06 0:51 ` Jeff Law
2017-10-23 17:31 ` [075/nnn] poly_int: vectorizable_simd_clone_call Richard Sandiford
2017-11-28 16:45 ` Jeff Law
2017-10-23 17:31 ` [076/nnn] poly_int: vectorizable_conversion Richard Sandiford
2017-11-28 16:44 ` Jeff Law
2017-11-28 18:15 ` Richard Sandiford
2017-12-05 17:49 ` Jeff Law
2017-10-23 17:31 ` [077/nnn] poly_int: vect_get_constant_vectors Richard Sandiford
2017-11-28 16:43 ` Jeff Law
2017-10-23 17:32 ` [079/nnn] poly_int: vect_no_alias_p Richard Sandiford
2017-12-05 17:46 ` Jeff Law
2017-10-23 17:32 ` [080/nnn] poly_int: tree-vect-generic.c Richard Sandiford
2017-12-05 17:48 ` Jeff Law
2017-10-23 17:32 ` [078/nnn] poly_int: two-operation SLP Richard Sandiford
2017-11-28 16:41 ` Jeff Law
2017-10-23 17:33 ` [082/nnn] poly_int: omp-simd-clone.c Richard Sandiford
2017-11-28 16:36 ` Jeff Law
2017-10-23 17:33 ` [081/nnn] poly_int: brig vector elements Richard Sandiford
2017-10-24 7:10 ` Pekka Jääskeläinen
2017-10-23 17:34 ` [083/nnn] poly_int: fold_indirect_ref_1 Richard Sandiford
2017-11-28 16:34 ` Jeff Law
2017-10-23 17:34 ` [085/nnn] poly_int: expand_vector_ubsan_overflow Richard Sandiford
2017-11-28 16:33 ` Jeff Law
2017-10-23 17:34 ` [084/nnn] poly_int: folding BIT_FIELD_REFs on vectors Richard Sandiford
2017-11-28 16:33 ` Jeff Law
2017-10-23 17:35 ` [087/nnn] poly_int: subreg_get_info Richard Sandiford
2017-11-28 16:29 ` Jeff Law
2017-10-23 17:35 ` [088/nnn] poly_int: expand_expr_real_2 Richard Sandiford
2017-11-28 8:49 ` Jeff Law
2017-10-23 17:35 ` [086/nnn] poly_int: REGMODE_NATURAL_SIZE Richard Sandiford
2017-12-05 23:33 ` Jeff Law
2017-10-23 17:36 ` [089/nnn] poly_int: expand_expr_real_1 Richard Sandiford
2017-11-28 8:41 ` Jeff Law
2017-10-23 17:36 ` [090/nnn] poly_int: set_inc_state Richard Sandiford
2017-11-28 8:35 ` Jeff Law
2017-10-23 17:37 ` [092/nnn] poly_int: PUSH_ROUNDING Richard Sandiford
2017-11-28 16:21 ` Jeff Law
2017-11-28 18:01 ` Richard Sandiford
2017-11-28 18:10 ` PUSH_ROUNDING Jeff Law
2017-10-23 17:37 ` [091/nnn] poly_int: emit_single_push_insn_1 Richard Sandiford
2017-11-28 8:33 ` Jeff Law
2017-10-23 17:37 ` [093/nnn] poly_int: adjust_mems Richard Sandiford
2017-11-28 8:32 ` Jeff Law
2017-10-23 17:38 ` [094/nnn] poly_int: expand_ifn_atomic_compare_exchange_into_call Richard Sandiford
2017-11-28 8:31 ` Jeff Law
2017-10-23 17:39 ` [096/nnn] poly_int: reloading complex subregs Richard Sandiford
2017-11-28 8:09 ` Jeff Law
2017-10-23 17:39 ` [095/nnn] poly_int: process_alt_operands Richard Sandiford
2017-11-28 8:14 ` Jeff Law
2017-10-23 17:40 ` [098/nnn] poly_int: load_register_parameters Richard Sandiford
2017-11-28 8:08 ` Jeff Law
2017-10-23 17:40 ` [097/nnn] poly_int: alter_reg Richard Sandiford
2017-11-28 8:08 ` Jeff Law
2017-10-23 17:40 ` [099/nnn] poly_int: struct_value_size Richard Sandiford
2017-11-21 8:14 ` Jeff Law
2017-10-23 17:41 ` [100/nnn] poly_int: memrefs_conflict_p Richard Sandiford
2017-12-05 23:29 ` Jeff Law
2017-10-23 17:41 ` Richard Sandiford [this message]
2017-12-06 2:05 ` [101/nnn] poly_int: GET_MODE_NUNITS Jeff Law
2017-10-23 17:42 ` [103/nnn] poly_int: TYPE_VECTOR_SUBPARTS Richard Sandiford
2017-10-24 9:06 ` Richard Biener
2017-10-24 9:40 ` Richard Sandiford
2017-10-24 10:01 ` Richard Biener
2017-10-24 11:20 ` Richard Sandiford
2017-10-24 11:30 ` Richard Biener
2017-10-24 16:24 ` Richard Sandiford
2017-12-06 2:31 ` Jeff Law
2017-10-23 17:42 ` [102/nnn] poly_int: vect_permute_load/store_chain Richard Sandiford
2017-11-21 8:01 ` Jeff Law
2017-10-23 17:43 ` [105/nnn] poly_int: expand_assignment Richard Sandiford
2017-11-21 7:50 ` Jeff Law
2017-10-23 17:43 ` [106/nnn] poly_int: GET_MODE_BITSIZE Richard Sandiford
2017-11-21 7:49 ` Jeff Law
2017-10-23 17:43 ` [104/nnn] poly_int: GET_MODE_PRECISION Richard Sandiford
2017-11-28 8:07 ` Jeff Law
2017-10-23 17:48 ` [107/nnn] poly_int: GET_MODE_SIZE Richard Sandiford
2017-11-21 7:48 ` Jeff Law
2017-10-24 9:25 ` [000/nnn] poly_int: representation of runtime offsets and sizes Eric Botcazou
2017-10-24 9:58 ` Richard Sandiford
2017-10-24 10:53 ` Eric Botcazou
2017-10-24 11:25 ` Richard Sandiford
2017-10-24 12:24 ` Richard Biener
2017-10-24 13:07 ` Richard Sandiford
2017-10-24 13:18 ` Richard Biener
2017-10-24 13:30 ` Richard Sandiford
2017-10-25 10:27 ` Richard Biener
2017-10-25 10:45 ` Jakub Jelinek
2017-10-25 11:39 ` Richard Sandiford
2017-10-25 13:09 ` Richard Biener
2017-11-08 9:51 ` Richard Sandiford
2017-11-08 11:57 ` Richard Biener
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87o9oxdao8.fsf@linaro.org \
--to=richard.sandiford@linaro.org \
--cc=gcc-patches@gcc.gnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).