[committed] Fix loop optimiser segfaults for MIPS16

[Richard Sandiford <richard@codesourcery.com>]

This patch fixes several 64-bit MIPS16 testsuite failures.
The tree-level loop optimisers (quite reasonably) use the backend
addressing code to estimate the cost of an operation, and in some
cases, this would cause us to need the MIPS16 GP pseudo register.
We currently insert the initialisation of that register at the same time
as we create the register, but in this case, that's too early: we don't
have an instruction stream yet.  The patch therefore postpones the
initialisation until we're called from expand.  (The check is similar
to the handling of the ARM PIC register.)

We don't reset reg_rtx_no before expand, so it's currently OK -- and
more efficient -- to use the same pseudo register both before and during
expand.  The patch would have to be changed if reg_rtx_no is ever reset
between times.

Tested on mipsisa64-elfoabi with a version of Adam's no_new_pseudos
workaround applied.  Committed to trunk.

Richard


gcc/
	* config/mips/mips.c (machine_function): Add
	initialized_mips16_gp_pseudo_p.
	(mips16_gp_pseudo_reg): Do not emit the initialization of
	mips16_gp_pseudo_rtx when being called from the gimple cost-
	calculation routines; emit it on the first use outside those
	routines.

Index: gcc/config/mips/mips.c
===================================================================
--- gcc/config/mips/mips.c	2007-06-27 19:56:12.000000000 -0700
+++ gcc/config/mips/mips.c	2007-06-27 20:05:57.000000000 -0700
@@ -476,6 +476,10 @@ struct machine_function GTY(()) {
 
   /* True if the function is known to have an instruction that needs $gp.  */
   bool has_gp_insn_p;
+
+  /* True if we have emitted an instruction to initialize
+     mips16_gp_pseudo_rtx.  */
+  bool initialized_mips16_gp_pseudo_p;
 };
 
 /* Information about a single argument.  */
@@ -8616,11 +8619,15 @@ mips_vector_mode_supported_p (enum machi
 mips16_gp_pseudo_reg (void)
 {
   if (cfun->machine->mips16_gp_pseudo_rtx == NULL_RTX)
+    cfun->machine->mips16_gp_pseudo_rtx = gen_reg_rtx (Pmode);
+
+  /* Don't initialize the pseudo register if we are being called from
+     the tree optimizers' cost-calculation routines.  */
+  if (!cfun->machine->initialized_mips16_gp_pseudo_p
+      && current_ir_type () != IR_GIMPLE)
     {
       rtx insn, scan;
 
-      cfun->machine->mips16_gp_pseudo_rtx = gen_reg_rtx (Pmode);
-
       /* We want to initialize this to a value which gcc will believe
          is constant.  */
       insn = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx);
@@ -8636,6 +8643,8 @@ mips16_gp_pseudo_reg (void)
 	scan = get_insns ();
       insn = emit_insn_after (insn, scan);
       pop_topmost_sequence ();
+
+      cfun->machine->initialized_mips16_gp_pseudo_p = true;
     }
 
   return cfun->machine->mips16_gp_pseudo_rtx;