From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 67267 invoked by alias); 9 Dec 2016 13:08:15 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 67247 invoked by uid 89); 9 Dec 2016 13:08:13 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-4.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 09 Dec 2016 13:08:05 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 251FA707; Fri, 9 Dec 2016 05:08:04 -0800 (PST) Received: from localhost (e105548-lin.manchester.arm.com [10.45.32.67]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C36873F477 for ; Fri, 9 Dec 2016 05:08:03 -0800 (PST) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Subject: [23/67] Replace != VOIDmode checks with is_a References: <87h96dp8u6.fsf@e105548-lin.cambridge.arm.com> Date: Fri, 09 Dec 2016 13:08:00 -0000 In-Reply-To: <87h96dp8u6.fsf@e105548-lin.cambridge.arm.com> (Richard Sandiford's message of "Fri, 09 Dec 2016 12:48:01 +0000") Message-ID: <87pol1l07h.fsf@e105548-lin.cambridge.arm.com> User-Agent: Gnus/5.130012 (Ma Gnus v0.12) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2016-12/txt/msg00794.txt.bz2 This patch replaces some checks against VOIDmode with checks of is_a , in cases where scalar integer modes were the only useful alternatives left. gcc/ 2016-11-24 Richard Sandiford Alan Hayward David Sherwood * cfgexpand.c (expand_debug_expr): Use is_a instead of != VOIDmode. * combine.c (if_then_else_cond): Likewise. * dwarf2out.c (mem_loc_descriptor): Likewise. * rtlanal.c (canonicalize_condition): Likewise. * simplify-rtx.c (simplify_relational_operation_1): Likewise. diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c index f94be27..1427a97 100644 --- a/gcc/cfgexpand.c +++ b/gcc/cfgexpand.c @@ -4128,7 +4128,7 @@ expand_debug_expr (tree exp) machine_mode inner_mode = VOIDmode; int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp)); addr_space_t as; - scalar_int_mode op1_mode; + scalar_int_mode op0_mode, op1_mode; switch (TREE_CODE_CLASS (TREE_CODE (exp))) { @@ -4570,23 +4570,23 @@ expand_debug_expr (tree exp) size_t, we need to check for mis-matched modes and correct the addend. */ if (op0 && op1 - && GET_MODE (op0) != VOIDmode && GET_MODE (op1) != VOIDmode - && GET_MODE (op0) != GET_MODE (op1)) + && is_a (GET_MODE (op0), &op0_mode) + && is_a (GET_MODE (op1), &op1_mode) + && op0_mode != op1_mode) { - if (GET_MODE_BITSIZE (GET_MODE (op0)) < GET_MODE_BITSIZE (GET_MODE (op1)) - /* If OP0 is a partial mode, then we must truncate, even if it has - the same bitsize as OP1 as GCC's representation of partial modes - is opaque. */ - || (GET_MODE_CLASS (GET_MODE (op0)) == MODE_PARTIAL_INT - && GET_MODE_BITSIZE (GET_MODE (op0)) == GET_MODE_BITSIZE (GET_MODE (op1)))) - op1 = simplify_gen_unary (TRUNCATE, GET_MODE (op0), op1, - GET_MODE (op1)); + if (GET_MODE_BITSIZE (op0_mode) < GET_MODE_BITSIZE (op1_mode) + /* If OP0 is a partial mode, then we must truncate, even + if it has the same bitsize as OP1 as GCC's + representation of partial modes is opaque. */ + || (GET_MODE_CLASS (op0_mode) == MODE_PARTIAL_INT + && (GET_MODE_BITSIZE (op0_mode) + == GET_MODE_BITSIZE (op1_mode)))) + op1 = simplify_gen_unary (TRUNCATE, op0_mode, op1, op1_mode); else /* We always sign-extend, regardless of the signedness of the operand, because the operand is always unsigned here even if the original C expression is signed. */ - op1 = simplify_gen_unary (SIGN_EXTEND, GET_MODE (op0), op1, - GET_MODE (op1)); + op1 = simplify_gen_unary (SIGN_EXTEND, op0_mode, op1, op1_mode); } /* Fall through. */ case PLUS_EXPR: diff --git a/gcc/combine.c b/gcc/combine.c index 2e2acea..8883194 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -9014,6 +9014,7 @@ if_then_else_cond (rtx x, rtx *ptrue, rtx *pfalse) enum rtx_code code = GET_CODE (x); rtx cond0, cond1, true0, true1, false0, false1; unsigned HOST_WIDE_INT nz; + scalar_int_mode int_mode; /* If we are comparing a value against zero, we are done. */ if ((code == NE || code == EQ) @@ -9190,8 +9191,9 @@ if_then_else_cond (rtx x, rtx *ptrue, rtx *pfalse) /* If X is known to be either 0 or -1, those are the true and false values when testing X. */ else if (x == constm1_rtx || x == const0_rtx - || (mode != VOIDmode && mode != BLKmode - && num_sign_bit_copies (x, mode) == GET_MODE_PRECISION (mode))) + || (is_a (mode, &int_mode) + && (num_sign_bit_copies (x, int_mode) + == GET_MODE_PRECISION (int_mode)))) { *ptrue = constm1_rtx, *pfalse = const0_rtx; return x; diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c index 19e6d24..7bf210d 100644 --- a/gcc/dwarf2out.c +++ b/gcc/dwarf2out.c @@ -14491,7 +14491,7 @@ mem_loc_descriptor (rtx rtl, machine_mode mode, if (mode != GET_MODE (rtl) && GET_MODE (rtl) != VOIDmode) return NULL; - scalar_int_mode int_mode, inner_mode; + scalar_int_mode int_mode, inner_mode, op1_mode; switch (GET_CODE (rtl)) { case POST_INC: @@ -14929,9 +14929,8 @@ mem_loc_descriptor (rtx rtl, machine_mode mode, VAR_INIT_STATUS_INITIALIZED); { rtx rtlop1 = XEXP (rtl, 1); - if (GET_MODE (rtlop1) != VOIDmode - && GET_MODE_BITSIZE (GET_MODE (rtlop1)) - < GET_MODE_BITSIZE (int_mode)) + if (is_a (GET_MODE (rtlop1), &op1_mode) + && GET_MODE_BITSIZE (op1_mode) < GET_MODE_BITSIZE (int_mode)) rtlop1 = gen_rtx_ZERO_EXTEND (int_mode, rtlop1); op1 = mem_loc_descriptor (rtlop1, int_mode, mem_mode, VAR_INIT_STATUS_INITIALIZED); @@ -15762,7 +15761,8 @@ loc_descriptor (rtx rtl, machine_mode mode, break; /* FALLTHROUGH */ case LABEL_REF: - if (mode != VOIDmode && GET_MODE_SIZE (mode) == DWARF2_ADDR_SIZE + if (is_a (mode, &int_mode) + && GET_MODE_SIZE (int_mode) == DWARF2_ADDR_SIZE && (dwarf_version >= 4 || !dwarf_strict)) { loc_result = new_addr_loc_descr (rtl, dtprel_false); diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c index 92b7580..129f69f 100644 --- a/gcc/rtlanal.c +++ b/gcc/rtlanal.c @@ -5501,40 +5501,39 @@ canonicalize_condition (rtx_insn *insn, rtx cond, int reverse, if we can do computations in the relevant mode and we do not overflow. */ - if (GET_MODE_CLASS (GET_MODE (op0)) != MODE_CC - && CONST_INT_P (op1) - && GET_MODE (op0) != VOIDmode - && GET_MODE_PRECISION (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT) + scalar_int_mode op0_mode; + if (CONST_INT_P (op1) + && is_a (GET_MODE (op0), &op0_mode) + && GET_MODE_PRECISION (op0_mode) <= HOST_BITS_PER_WIDE_INT) { HOST_WIDE_INT const_val = INTVAL (op1); unsigned HOST_WIDE_INT uconst_val = const_val; unsigned HOST_WIDE_INT max_val - = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0)); + = (unsigned HOST_WIDE_INT) GET_MODE_MASK (op0_mode); switch (code) { case LE: if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1) - code = LT, op1 = gen_int_mode (const_val + 1, GET_MODE (op0)); + code = LT, op1 = gen_int_mode (const_val + 1, op0_mode); break; /* When cross-compiling, const_val might be sign-extended from BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */ case GE: if ((const_val & max_val) - != (HOST_WIDE_INT_1U - << (GET_MODE_PRECISION (GET_MODE (op0)) - 1))) - code = GT, op1 = gen_int_mode (const_val - 1, GET_MODE (op0)); + != (HOST_WIDE_INT_1U << (GET_MODE_PRECISION (op0_mode) - 1))) + code = GT, op1 = gen_int_mode (const_val - 1, op0_mode); break; case LEU: if (uconst_val < max_val) - code = LTU, op1 = gen_int_mode (uconst_val + 1, GET_MODE (op0)); + code = LTU, op1 = gen_int_mode (uconst_val + 1, op0_mode); break; case GEU: if (uconst_val != 0) - code = GTU, op1 = gen_int_mode (uconst_val - 1, GET_MODE (op0)); + code = GTU, op1 = gen_int_mode (uconst_val - 1, op0_mode); break; default: diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index e5e7a71..9f44da9 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -4812,19 +4812,19 @@ simplify_relational_operation_1 (enum rtx_code code, machine_mode mode, /* (ne:SI (zero_extract:SI FOO (const_int 1) BAR) (const_int 0))) is the same as (zero_extract:SI FOO (const_int 1) BAR). */ - scalar_int_mode int_mode; + scalar_int_mode int_mode, int_cmp_mode; if (code == NE && op1 == const0_rtx && is_int_mode (mode, &int_mode) - && cmp_mode != VOIDmode + && is_a (cmp_mode, &int_cmp_mode) /* ??? Work-around BImode bugs in the ia64 backend. */ && int_mode != BImode - && cmp_mode != BImode - && nonzero_bits (op0, cmp_mode) == 1 + && int_cmp_mode != BImode + && nonzero_bits (op0, int_cmp_mode) == 1 && STORE_FLAG_VALUE == 1) - return GET_MODE_SIZE (int_mode) > GET_MODE_SIZE (cmp_mode) - ? simplify_gen_unary (ZERO_EXTEND, int_mode, op0, cmp_mode) - : lowpart_subreg (int_mode, op0, cmp_mode); + return GET_MODE_SIZE (int_mode) > GET_MODE_SIZE (int_cmp_mode) + ? simplify_gen_unary (ZERO_EXTEND, int_mode, op0, int_cmp_mode) + : lowpart_subreg (int_mode, op0, int_cmp_mode); /* (eq/ne (xor x y) 0) simplifies to (eq/ne x y). */ if ((code == EQ || code == NE)