From: Thomas Schwinge <thomas@codesourcery.com>
To: Andrew Stubbs <ams@codesourcery.com>, <gcc-patches@gcc.gnu.org>,
Jakub Jelinek <jakub@redhat.com>
Subject: Re: [PATCH v3 04/10] GCN machine description
Date: Wed, 29 Apr 2020 10:30:51 +0200 [thread overview]
Message-ID: <87r1w6bsn8.fsf@euler.schwinge.homeip.net> (raw)
In-Reply-To: <ab4dbbb24c00edac768d0849d1151af80051e02c.1544611347.git.ams@codesourcery.com>
[-- Attachment #1: Type: text/plain, Size: 2732 bytes --]
Hi!
On 2018-12-12T11:52:23+0000, Andrew Stubbs <ams@codesourcery.com> wrote:
> This patch contains the machine description portion of the GCN
> back-end.
> --- /dev/null
> +++ b/gcc/config/gcn/gcn.md
> +(define_insn_and_split "*mov<mode>_insn"
> + [(set (match_operand:DIDF 0 "nonimmediate_operand"
> + "=SD,SD,SD,RS,Sm,v, v,Sg, v, v,RF,RLRG, v, v,RM")
> + (match_operand:DIDF 1 "general_operand"
> + "SSA, C,DB,Sm,RS,v,DB, v,Sv,RF, v, v,RLRG,RM, v"))]
> + "GET_CODE(operands[1]) != SYMBOL_REF"
> + "@
> + s_mov_b64\t%0, %1
> + s_mov_b64\t%0, %1
> + #
> + s_store_dwordx2\t%1, %A0\;s_waitcnt\tlgkmcnt(0)
> + s_load_dwordx2\t%0, %A1\;s_waitcnt\tlgkmcnt(0)
> + #
> + #
> + #
> + #
> + flat_load_dwordx2\t%0, %A1%O1%g1\;s_waitcnt\t0
> + flat_store_dwordx2\t%A0, %1%O0%g0\;s_waitcnt\t0
> + ds_write_b64\t%A0, %1%O0\;s_waitcnt\tlgkmcnt(0)
> + ds_read_b64\t%0, %A1%O1\;s_waitcnt\tlgkmcnt(0)
> + global_load_dwordx2\t%0, %A1%O1%g1\;s_waitcnt\tvmcnt(0)
> + global_store_dwordx2\t%A0, %1%O0%g0\;s_waitcnt\tvmcnt(0)"
> + "(reload_completed && !MEM_P (operands[0]) && !MEM_P (operands[1])
> + && !gcn_sgpr_move_p (operands[0], operands[1]))
> + || (GET_CODE (operands[1]) == CONST_INT && !gcn_constant64_p (operands[1]))"
> + [(set (match_dup 0) (match_dup 1))
> + (set (match_dup 2) (match_dup 3))]
> + {
> + rtx inlo = gen_lowpart (SImode, operands[1]);
> + rtx inhi = gen_highpart_mode (SImode, <MODE>mode, operands[1]);
> + rtx outlo = gen_lowpart (SImode, operands[0]);
> + rtx outhi = gen_highpart_mode (SImode, <MODE>mode, operands[0]);
> +
> + /* Ensure that overlapping registers aren't corrupted. */
> + if (REGNO (outlo) == REGNO (inhi))
As discussed in PR94248 "[amdgcn] Doesn't build with RTL checking", I've
tested Jakub's patch, and now pushed to master branch in commit
ccf93cd0b21e9c0ff0a1d4ace59899fca25ac157 "[gcn] Fix build with RTL
checking [PR94248]".
> + {
> + operands[0] = outhi;
> + operands[1] = inhi;
> + operands[2] = outlo;
> + operands[3] = inlo;
> + }
> + else
> + {
> + operands[0] = outlo;
> + operands[1] = inlo;
> + operands[2] = outhi;
> + operands[3] = inhi;
> + }
> + }
> + [(set_attr "type" "sop1,sop1,mult,smem,smem,vmult,vmult,vmult,vmult,flat,
> + flat,ds,ds,flat,flat")
> + (set_attr "length" "4,8,*,12,12,*,*,*,*,12,12,12,12,12,12")])
Grüße
Thomas
-----------------
Mentor Graphics (Deutschland) GmbH, Arnulfstraße 201, 80634 München / Germany
Registergericht München HRB 106955, Geschäftsführer: Thomas Heurung, Alexander Walter
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From ccf93cd0b21e9c0ff0a1d4ace59899fca25ac157 Mon Sep 17 00:00:00 2001
From: Jakub Jelinek <jakub@redhat.com>
Date: Sat, 21 Mar 2020 14:39:56 +0000
Subject: [PATCH] [gcn] Fix build with RTL checking [PR94248]
Building (for offloading) a '--target=amdgcn-amdhsa' GCC with
'--enable-checking=yes,extra,rtl' fails:
during RTL pass: split2
[...]/source-gcc/libgcc/libgcc2.c: In function '__absvdi2':
[...]/source-gcc/libgcc/libgcc2.c:271:1: internal compiler error: RTL check: expected code 'reg', have 'const_int' in rhs_regno, at rtl.h:1923
271 | }
| ^
0x565847 ???
[...]/source-gcc/gcc/rtl.c:881
0x59a8a4 ???
[...]/source-gcc/gcc/rtl.h:1923
0x12e3a5c ???
[...]/source-gcc/gcc/config/gcn/gcn.md:631
[...]
Makefile:501: recipe for target '_absvdi2.o' failed
make[4]: *** [_absvdi2.o] Error 1
make[4]: Leaving directory '[...]/build-gcc-offload-amdgcn-amdhsa/amdgcn-amdhsa/gfx900/libgcc'
gcc/
PR target/94248
* config/gcn/gcn.md (*mov<mode>_insn): Use
'reg_overlap_mentioned_p' to check for overlap.
Tested-by: Thomas Schwinge <thomas@codesourcery.com>
---
gcc/ChangeLog | 4 ++++
gcc/config/gcn/gcn.md | 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5541d9c62d9f..3321e8839707 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,9 @@
2020-04-29 Jakub Jelinek <jakub@redhat.com>
+ PR target/94248
+ * config/gcn/gcn.md (*mov<mode>_insn): Use
+ 'reg_overlap_mentioned_p' to check for overlap.
+
PR target/94706
* config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
instead of cxx17_empty_base_field_p.
diff --git a/gcc/config/gcn/gcn.md b/gcc/config/gcn/gcn.md
index 8f5937781b2b..8cfb3a85d256 100644
--- a/gcc/config/gcn/gcn.md
+++ b/gcc/config/gcn/gcn.md
@@ -629,7 +629,7 @@
rtx outhi = gen_highpart_mode (SImode, <MODE>mode, operands[0]);
/* Ensure that overlapping registers aren't corrupted. */
- if (REGNO (outlo) == REGNO (inhi))
+ if (reg_overlap_mentioned_p (outlo, inhi))
{
operands[0] = outhi;
operands[1] = inhi;
--
2.26.2
next prev parent reply other threads:[~2020-04-29 8:31 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-12 11:52 [PATCH v3 00/10] AMD GCN Port v3 Andrew Stubbs
2018-12-12 11:52 ` [PATCH v3 03/10] GCN libgcc Andrew Stubbs
2018-12-12 11:52 ` [PATCH v3 02/10] GCN libgfortran Andrew Stubbs
2018-12-12 11:52 ` [PATCH 01/10] Fix LRA bug Andrew Stubbs
2018-12-13 23:49 ` Jeff Law
2018-12-14 10:04 ` Andrew Stubbs
2018-12-14 11:52 ` Andrew Stubbs
2018-12-12 11:53 ` [PATCH v3 05/10] GCN back-end code Andrew Stubbs
2024-01-31 17:12 ` GCN: Remove 'SGPR_OR_VGPR_REGNO_P' definition (was: [PATCH v3 05/10] GCN back-end code) Thomas Schwinge
2024-01-31 17:22 ` GCN: Remove 'SGPR_OR_VGPR_REGNO_P' definition Andrew Stubbs
2024-02-01 13:49 ` GCN: Don't hard-code number of SGPR/VGPR/AVGPR registers (was: [PATCH v3 05/10] GCN back-end code) Thomas Schwinge
2024-02-01 14:45 ` GCN: Don't hard-code number of SGPR/VGPR/AVGPR registers Andrew Stubbs
2018-12-12 11:53 ` [PATCH v3 04/10] GCN machine description Andrew Stubbs
2020-04-29 8:30 ` Thomas Schwinge [this message]
2024-01-31 17:21 ` GCN: Remove 'FIRST_{SGPR,VGPR,AVGPR}_REG', 'LAST_{SGPR,VGPR,AVGPR}_REG' from machine description (was: [PATCH v3 04/10] GCN machine description) Thomas Schwinge
2024-01-31 17:41 ` GCN: Remove 'FIRST_{SGPR,VGPR,AVGPR}_REG', 'LAST_{SGPR,VGPR,AVGPR}_REG' from machine description Andrew Stubbs
2018-12-12 11:53 ` [PATCH v3 07/10] Add dg-require-effective-target exceptions Andrew Stubbs
2018-12-12 11:53 ` [PATCH v3 10/10] Port testsuite to GCN Andrew Stubbs
2018-12-17 12:17 ` Andrew Stubbs
2018-12-12 11:53 ` [PATCH v3 06/10] GCN back-end config Andrew Stubbs
2020-03-09 15:24 ` [Patch] ./configure.ac – build libgomp by default for amdgcn*-*-* Tobias Burnus
2020-03-09 15:56 ` Jakub Jelinek
2020-04-29 8:23 ` [gcn] Don't default to building target-libstdc++-v3 [PR92713] (was: [PATCH v3 06/10] GCN back-end config) Thomas Schwinge
2018-12-12 11:53 ` [PATCH v3 08/10] Testsuite: GCN is always PIE Andrew Stubbs
2018-12-12 11:53 ` [PATCH v3 09/10] Ignore LLVM's blank lines Andrew Stubbs
2018-12-12 12:07 ` Rainer Orth
2018-12-17 12:09 ` Andrew Stubbs
2018-12-13 1:32 ` Segher Boessenkool
2019-01-28 21:35 ` H.J. Lu
2019-01-07 10:48 ` [PATCH v3 00/10] AMD GCN Port v3 Andrew Stubbs
2019-01-07 11:59 ` Richard Biener
2019-01-11 23:20 ` Jeff Law
2019-01-14 13:55 ` Andrew Stubbs
2019-01-17 12:51 ` Andrew Stubbs
2019-01-17 12:55 ` Richard Biener
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