From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 9173 invoked by alias); 20 May 2016 14:11:46 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 9162 invoked by uid 89); 20 May 2016 14:11:45 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=BAYES_00,KAM_LAZY_DOMAIN_SECURITY autolearn=no version=3.3.2 spammy=Andi, act X-HELO: mga04.intel.com Received: from mga04.intel.com (HELO mga04.intel.com) (192.55.52.120) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 20 May 2016 14:11:35 +0000 Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga104.fm.intel.com with ESMTP; 20 May 2016 07:09:02 -0700 X-ExtLoop1: 1 Received: from tassilo.jf.intel.com (HELO tassilo.localdomain) ([10.7.201.35]) by FMSMGA003.fm.intel.com with ESMTP; 20 May 2016 07:09:02 -0700 Received: by tassilo.localdomain (Postfix, from userid 1000) id 67D1330392A; Fri, 20 May 2016 07:09:02 -0700 (PDT) From: Andi Kleen To: Richard Biener Cc: gcc-patches@gcc.gnu.org Subject: Re: [PATCH][RFC] Introduce BIT_FIELD_INSERT References: Date: Fri, 20 May 2016 14:11:00 -0000 In-Reply-To: (Richard Biener's message of "Fri, 13 May 2016 12:51:11 +0200 (CEST)") Message-ID: <87r3cwes8x.fsf@tassilo.jf.intel.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2016-05/txt/msg01652.txt.bz2 Richard Biener writes: > The following patch adds BIT_FIELD_INSERT, an operation to > facilitate doing bitfield inserts on registers (as opposed > to currently where we'd have a BIT_FIELD_REF store). I wonder if these patches would make it easier to use the Haswell bit manipulations instructions on x86 (which act on registers). I found that gcc makes significantly less use of them than LLVM, sometimes leading to much bigger code. -Andi