* MIPS PATCH: kill mips16_hard_float
@ 2007-08-09 16:35 Sandra Loosemore
2007-08-09 16:51 ` Richard Sandiford
0 siblings, 1 reply; 2+ messages in thread
From: Sandra Loosemore @ 2007-08-09 16:35 UTC (permalink / raw)
To: Richard Sandiford; +Cc: GCC Patches
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I've pulled this part out of the big back-end reinitialization/mips16 function
attributes patch, since it's really a separate cleanup. I'm retesting it in
isolation now; assuming that looks good, is this OK to commit?
-Sandra
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2007-08-09 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* config/mips/mips.opt (mhard-float, msoft-float): Make these
control TARGET_HARD_FLOAT_ABI and TARGET_SOFT_FLOAT_ABI, rather
than TARGET_HARD_FLOAT and TARGET_SOFT_FLOAT.
* config/mips/mips.h (mips16_hard_float): Delete.
(TARGET_HARD_FLOAT_ABI, TARGET_SOFT_FLOAT_ABI): Delete these
definitions, and replace with....
(TARGET_HARD_FLOAT, TARGET_SOFT_FLOAT): Define.
* config/mips/mips.c (mips16_hard_float): Delete. Replace
all references with (TARGET_MIPS16 && TARGET_HARD_FLOAT_ABI).
(MIPS_MARCH_CONTROLS_SOFT_FLOAT): Update comments.
(override_options): Replace MASK_SOFT_FLOAT references with
MASK_SOFT_FLOAT_ABI. Delete twiddling with MASK_SOFT_FLOAT
and mips16_hard_float when TARGET_MIPS16.
[-- Attachment #3: 27-mips16-hard-float.patch --]
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Index: gcc/config/mips/mips.opt
===================================================================
*** gcc/config/mips/mips.opt (revision 127317)
--- gcc/config/mips/mips.opt (working copy)
*************** Target Report RejectNegative Mask(64BIT)
*** 145,152 ****
Use 64-bit general registers
mhard-float
! Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
! Allow the use of hardware floating-point instructions
mips
Target RejectNegative Joined
--- 145,152 ----
Use 64-bit general registers
mhard-float
! Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
! Allow the use of hardware floating-point ABI and instructions
mips
Target RejectNegative Joined
*************** Target Report RejectNegative Mask(SMARTM
*** 217,223 ****
Use SmartMIPS instructions
msoft-float
! Target Report RejectNegative Mask(SOFT_FLOAT)
Prevent the use of all hardware floating-point instructions
msplit-addresses
--- 217,223 ----
Use SmartMIPS instructions
msoft-float
! Target Report RejectNegative Mask(SOFT_FLOAT_ABI)
Prevent the use of all hardware floating-point instructions
msplit-addresses
Index: gcc/config/mips/mips.h
===================================================================
*** gcc/config/mips/mips.h (revision 127318)
--- gcc/config/mips/mips.h (working copy)
*************** extern enum processor_type mips_arch;
*** 140,146 ****
extern enum processor_type mips_tune; /* which cpu to schedule for */
extern int mips_isa; /* architectural level */
extern int mips_abi; /* which ABI to use */
- extern int mips16_hard_float; /* mips16 without -msoft-float */
extern const struct mips_cpu_info mips_cpu_info_table[];
extern const struct mips_cpu_info *mips_arch_info;
extern const struct mips_cpu_info *mips_tune_info;
--- 140,145 ----
*************** extern enum mips_code_readable_setting m
*** 316,326 ****
#define TARGET_OLDABI (mips_abi == ABI_32 || mips_abi == ABI_O64)
#define TARGET_NEWABI (mips_abi == ABI_N32 || mips_abi == ABI_64)
! /* Similar to TARGET_HARD_FLOAT and TARGET_SOFT_FLOAT, but reflect the ABI
! in use rather than whether the FPU is directly accessible. */
! #define TARGET_HARD_FLOAT_ABI (TARGET_HARD_FLOAT || mips16_hard_float)
! #define TARGET_SOFT_FLOAT_ABI (!TARGET_HARD_FLOAT_ABI)
!
/* IRIX specific stuff. */
#define TARGET_IRIX 0
#define TARGET_IRIX6 0
--- 315,327 ----
#define TARGET_OLDABI (mips_abi == ABI_32 || mips_abi == ABI_O64)
#define TARGET_NEWABI (mips_abi == ABI_N32 || mips_abi == ABI_64)
! /* TARGET_HARD_FLOAT and TARGET_SOFT_FLOAT reflect whether the FPU is
! directly accessible, while the command-line options select
! TARGET_HARD_FLOAT_ABI and TARGET_SOFT_FLOAT_ABI to reflect the ABI
! in use. */
! #define TARGET_HARD_FLOAT (TARGET_HARD_FLOAT_ABI && !TARGET_MIPS16)
! #define TARGET_SOFT_FLOAT (TARGET_SOFT_FLOAT_ABI || TARGET_MIPS16)
!
/* IRIX specific stuff. */
#define TARGET_IRIX 0
#define TARGET_IRIX6 0
Index: gcc/config/mips/mips.c
===================================================================
*** gcc/config/mips/mips.c (revision 127317)
--- gcc/config/mips/mips.c (working copy)
*************** const struct mips_rtx_cost_data *mips_co
*** 619,630 ****
/* The -mtext-loads setting. */
enum mips_code_readable_setting mips_code_readable = CODE_READABLE_YES;
- /* Whether we are generating mips16 hard float code. In mips16 mode
- we always set TARGET_SOFT_FLOAT; this variable is nonzero if
- -msoft-float was not specified by the user, which means that we
- should arrange to call mips32 hard floating point code. */
- int mips16_hard_float;
-
/* The architecture selected by -mipsN. */
static const struct mips_cpu_info *mips_isa_info;
--- 619,624 ----
*************** static const unsigned char mips16e_save_
*** 1203,1209 ****
31, 30, 23, 22, 21, 20, 19, 18, 17, 16, 7, 6, 5, 4
};
\f
! /* Nonzero if -march should decide the default value of MASK_SOFT_FLOAT. */
#ifndef MIPS_MARCH_CONTROLS_SOFT_FLOAT
#define MIPS_MARCH_CONTROLS_SOFT_FLOAT 0
#endif
--- 1197,1204 ----
31, 30, 23, 22, 21, 20, 19, 18, 17, 16, 7, 6, 5, 4
};
\f
! /* Nonzero if -march should decide the default value of
! MASK_SOFT_FLOAT_ABI. */
#ifndef MIPS_MARCH_CONTROLS_SOFT_FLOAT
#define MIPS_MARCH_CONTROLS_SOFT_FLOAT 0
#endif
*************** mips_expand_call (rtx result, rtx addr,
*** 3729,3735 ****
mips_load_call_address (addr, orig_addr, sibcall_p);
}
! if (mips16_hard_float
&& build_mips16_call_stub (result, addr, args_size,
aux == 0 ? 0 : (int) GET_MODE (aux)))
return;
--- 3724,3731 ----
mips_load_call_address (addr, orig_addr, sibcall_p);
}
! if (TARGET_MIPS16
! && TARGET_HARD_FLOAT_ABI
&& build_mips16_call_stub (result, addr, args_size,
aux == 0 ? 0 : (int) GET_MODE (aux)))
return;
*************** override_options (void)
*** 5181,5201 ****
}
if (MIPS_MARCH_CONTROLS_SOFT_FLOAT
! && (target_flags_explicit & MASK_SOFT_FLOAT) == 0)
{
/* For some configurations, it is useful to have -march control
! the default setting of MASK_SOFT_FLOAT. */
switch ((int) mips_arch)
{
case PROCESSOR_R4100:
case PROCESSOR_R4111:
case PROCESSOR_R4120:
case PROCESSOR_R4130:
! target_flags |= MASK_SOFT_FLOAT;
break;
default:
! target_flags &= ~MASK_SOFT_FLOAT;
break;
}
}
--- 5177,5197 ----
}
if (MIPS_MARCH_CONTROLS_SOFT_FLOAT
! && (target_flags_explicit & MASK_SOFT_FLOAT_ABI) == 0)
{
/* For some configurations, it is useful to have -march control
! the default setting of MASK_SOFT_FLOAT_ABI. */
switch ((int) mips_arch)
{
case PROCESSOR_R4100:
case PROCESSOR_R4111:
case PROCESSOR_R4120:
case PROCESSOR_R4130:
! target_flags |= MASK_SOFT_FLOAT_ABI;
break;
default:
! target_flags &= ~MASK_SOFT_FLOAT_ABI;
break;
}
}
*************** override_options (void)
*** 5278,5293 ****
if (optimize > 2 && (target_flags_explicit & MASK_VR4130_ALIGN) == 0)
target_flags |= MASK_VR4130_ALIGN;
- /* When compiling for the mips16, we cannot use floating point. We
- record the original hard float value in mips16_hard_float. */
if (TARGET_MIPS16)
{
- if (TARGET_SOFT_FLOAT)
- mips16_hard_float = 0;
- else
- mips16_hard_float = 1;
- target_flags |= MASK_SOFT_FLOAT;
-
/* Don't run the scheduler before reload, since it tends to
increase register pressure. */
flag_schedule_insns = 0;
--- 5274,5281 ----
*************** static bool
*** 6717,6723 ****
mips16_cfun_returns_in_fpr_p (void)
{
tree return_type = DECL_RESULT (current_function_decl);
! return (mips16_hard_float
&& !aggregate_value_p (return_type, current_function_decl)
&& mips_return_mode_in_fpr_p (DECL_MODE (return_type)));
}
--- 6705,6712 ----
mips16_cfun_returns_in_fpr_p (void)
{
tree return_type = DECL_RESULT (current_function_decl);
! return (TARGET_MIPS16
! && TARGET_HARD_FLOAT_ABI
&& !aggregate_value_p (return_type, current_function_decl)
&& mips_return_mode_in_fpr_p (DECL_MODE (return_type)));
}
*************** mips_output_function_prologue (FILE *fil
*** 7205,7211 ****
floating point arguments. The linker will arrange for any 32-bit
functions to call this stub, which will then jump to the 16-bit
function proper. */
! if (mips16_hard_float
&& current_function_args_info.fp_code != 0)
build_mips16_function_stub (file);
--- 7194,7201 ----
floating point arguments. The linker will arrange for any 32-bit
functions to call this stub, which will then jump to the 16-bit
function proper. */
! if (TARGET_MIPS16
! && TARGET_HARD_FLOAT_ABI
&& current_function_args_info.fp_code != 0)
build_mips16_function_stub (file);
*************** build_mips16_call_stub (rtx retval, rtx
*** 9141,9147 ****
/* We don't need to do anything if we aren't in mips16 mode, or if
we were invoked with the -msoft-float option. */
! if (!mips16_hard_float)
return 0;
/* Figure out whether the value might come back in a floating point
--- 9131,9137 ----
/* We don't need to do anything if we aren't in mips16 mode, or if
we were invoked with the -msoft-float option. */
! if (!TARGET_MIPS16 || TARGET_SOFT_FLOAT_ABI)
return 0;
/* Figure out whether the value might come back in a floating point
*************** mips_init_libfuncs (void)
*** 10211,10217 ****
set_optab_libfunc (smod_optab, SImode, "__vr4120_modsi3");
}
! if (mips16_hard_float)
{
set_optab_libfunc (add_optab, SFmode, "__mips16_addsf3");
set_optab_libfunc (sub_optab, SFmode, "__mips16_subsf3");
--- 10201,10207 ----
set_optab_libfunc (smod_optab, SImode, "__vr4120_modsi3");
}
! if (TARGET_MIPS16 && TARGET_HARD_FLOAT_ABI)
{
set_optab_libfunc (add_optab, SFmode, "__mips16_addsf3");
set_optab_libfunc (sub_optab, SFmode, "__mips16_subsf3");
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: MIPS PATCH: kill mips16_hard_float
2007-08-09 16:35 MIPS PATCH: kill mips16_hard_float Sandra Loosemore
@ 2007-08-09 16:51 ` Richard Sandiford
0 siblings, 0 replies; 2+ messages in thread
From: Richard Sandiford @ 2007-08-09 16:51 UTC (permalink / raw)
To: Sandra Loosemore; +Cc: GCC Patches
Sandra Loosemore <sandra@codesourcery.com> writes:
> I've pulled this part out of the big back-end reinitialization/mips16
> function attributes patch, since it's really a separate cleanup. I'm
> retesting it in isolation now; assuming that looks good, is this OK to
> commit?
Yes, thanks.
Richard
^ permalink raw reply [flat|nested] 2+ messages in thread
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