From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 121856 invoked by alias); 23 Oct 2017 17:07:12 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 121842 invoked by uid 89); 23 Oct 2017 17:07:11 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-11.6 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_2,GIT_PATCH_3,KAM_STOCKGEN,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-wr0-f170.google.com Received: from mail-wr0-f170.google.com (HELO mail-wr0-f170.google.com) (209.85.128.170) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 23 Oct 2017 17:07:10 +0000 Received: by mail-wr0-f170.google.com with SMTP id y9so5905937wrb.2 for ; Mon, 23 Oct 2017 10:07:09 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:mail-followup-to:subject:references:date :in-reply-to:message-id:user-agent:mime-version; bh=N4n7M5jv54XPAOaaL3GcoBkVj2ucmoVJ9LOIvi1NBcs=; b=Lf/G3PelFEekykde17/1xCT5g71B3BfTBs+HKyW8nTnIV5E0zuciSyRCeT9fFIa0Hi wxpY7kzCvl33oiH3VXCA30IIAvS9Ox4m+no+k9JJMQGCA3c0zkj7CGB/U+4cv3PwJ/P5 LFFzA1Pd601ea0EgDqsVAnf7qm4TdFlnhfyYzvP2NM04ZWlS7HtLTg5zpjlGtuiEPttD UmLjF+0lzadx3fZTKCcjpv0C33ZP1/OpJkv7h9nYq1nNVNZQ6xWnq1dAdDw1axbwz/CF TFPyIIEGVQ2slWcXGN18qtdfCN+646xk8gYj9w+/+KOhk87B5kiIfrj8ie2oOlpyM8zm bCCA== X-Gm-Message-State: AMCzsaXkedS2L29UHlv+zidUXTluutOrrlUiRMwiJtTkXuUddrns8A4N duRePRyr55p/1PysDkC3tArG3ziZlYs= X-Google-Smtp-Source: ABhQp+QQd1edx50olBb3DBamCzP/0+GjieX95cHQrT+MCm7Oli/GgQO6DvbA8OiiXxJ5J4lXxtMSvQ== X-Received: by 10.223.144.76 with SMTP id h70mr12583766wrh.228.1508778427823; Mon, 23 Oct 2017 10:07:07 -0700 (PDT) Received: from localhost ([2.26.27.199]) by smtp.gmail.com with ESMTPSA id x185sm3157954wmx.35.2017.10.23.10.07.06 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 23 Oct 2017 10:07:07 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@linaro.org Subject: [017/nnn] poly_int: rtx_addr_can_trap_p_1 References: <871sltvm7r.fsf@linaro.org> Date: Mon, 23 Oct 2017 17:07:00 -0000 In-Reply-To: <871sltvm7r.fsf@linaro.org> (Richard Sandiford's message of "Mon, 23 Oct 2017 17:54:32 +0100") Message-ID: <87tvyprdxh.fsf@linaro.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2017-10/txt/msg01518.txt.bz2 This patch changes the offset and size arguments of rtx_addr_can_trap_p_1 from HOST_WIDE_INT to poly_int64. It also uses a size of -1 rather than 0 to represent an unknown size and BLKmode rather than VOIDmode to represent an unknown mode. 2017-10-23 Richard Sandiford Alan Hayward David Sherwood gcc/ * rtlanal.c (rtx_addr_can_trap_p_1): Take the offset and size as poly_int64s rather than HOST_WIDE_INTs. Use a size of -1 rather than 0 to represent an unknown size. Assert that the size is known when the mode isn't BLKmode. (may_trap_p_1): Use -1 for unknown sizes. (rtx_addr_can_trap_p): Likewise. Pass BLKmode rather than VOIDmode. Index: gcc/rtlanal.c =================================================================== --- gcc/rtlanal.c 2017-10-23 17:00:54.444001238 +0100 +++ gcc/rtlanal.c 2017-10-23 17:01:55.453690255 +0100 @@ -457,16 +457,17 @@ get_initial_register_offset (int from, i references on strict alignment machines. */ static int -rtx_addr_can_trap_p_1 (const_rtx x, HOST_WIDE_INT offset, HOST_WIDE_INT size, +rtx_addr_can_trap_p_1 (const_rtx x, poly_int64 offset, poly_int64 size, machine_mode mode, bool unaligned_mems) { enum rtx_code code = GET_CODE (x); + gcc_checking_assert (mode == BLKmode || known_size_p (size)); /* The offset must be a multiple of the mode size if we are considering unaligned memory references on strict alignment machines. */ - if (STRICT_ALIGNMENT && unaligned_mems && GET_MODE_SIZE (mode) != 0) + if (STRICT_ALIGNMENT && unaligned_mems && mode != BLKmode) { - HOST_WIDE_INT actual_offset = offset; + poly_int64 actual_offset = offset; #ifdef SPARC_STACK_BOUNDARY_HACK /* ??? The SPARC port may claim a STACK_BOUNDARY higher than @@ -477,7 +478,7 @@ rtx_addr_can_trap_p_1 (const_rtx x, HOST actual_offset -= STACK_POINTER_OFFSET; #endif - if (actual_offset % GET_MODE_SIZE (mode) != 0) + if (!multiple_p (actual_offset, GET_MODE_SIZE (mode))) return 1; } @@ -489,14 +490,14 @@ rtx_addr_can_trap_p_1 (const_rtx x, HOST if (!CONSTANT_POOL_ADDRESS_P (x) && !SYMBOL_REF_FUNCTION_P (x)) { tree decl; - HOST_WIDE_INT decl_size; + poly_int64 decl_size; - if (offset < 0) + if (may_lt (offset, 0)) + return 1; + if (known_zero (offset)) + return 0; + if (!known_size_p (size)) return 1; - if (size == 0) - size = GET_MODE_SIZE (mode); - if (size == 0) - return offset != 0; /* If the size of the access or of the symbol is unknown, assume the worst. */ @@ -507,9 +508,10 @@ rtx_addr_can_trap_p_1 (const_rtx x, HOST if (!decl) decl_size = -1; else if (DECL_P (decl) && DECL_SIZE_UNIT (decl)) - decl_size = (tree_fits_shwi_p (DECL_SIZE_UNIT (decl)) - ? tree_to_shwi (DECL_SIZE_UNIT (decl)) - : -1); + { + if (!poly_int_tree_p (DECL_SIZE_UNIT (decl), &decl_size)) + decl_size = -1; + } else if (TREE_CODE (decl) == STRING_CST) decl_size = TREE_STRING_LENGTH (decl); else if (TYPE_SIZE_UNIT (TREE_TYPE (decl))) @@ -517,7 +519,7 @@ rtx_addr_can_trap_p_1 (const_rtx x, HOST else decl_size = -1; - return (decl_size <= 0 ? offset != 0 : offset + size > decl_size); + return !known_subrange_p (offset, size, 0, decl_size); } return 0; @@ -534,17 +536,14 @@ rtx_addr_can_trap_p_1 (const_rtx x, HOST || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])) { #ifdef RED_ZONE_SIZE - HOST_WIDE_INT red_zone_size = RED_ZONE_SIZE; + poly_int64 red_zone_size = RED_ZONE_SIZE; #else - HOST_WIDE_INT red_zone_size = 0; + poly_int64 red_zone_size = 0; #endif - HOST_WIDE_INT stack_boundary = PREFERRED_STACK_BOUNDARY - / BITS_PER_UNIT; - HOST_WIDE_INT low_bound, high_bound; - - if (size == 0) - size = GET_MODE_SIZE (mode); - if (size == 0) + poly_int64 stack_boundary = PREFERRED_STACK_BOUNDARY / BITS_PER_UNIT; + poly_int64 low_bound, high_bound; + + if (!known_size_p (size)) return 1; if (x == frame_pointer_rtx) @@ -562,10 +561,10 @@ rtx_addr_can_trap_p_1 (const_rtx x, HOST } else if (x == hard_frame_pointer_rtx) { - HOST_WIDE_INT sp_offset + poly_int64 sp_offset = get_initial_register_offset (STACK_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM); - HOST_WIDE_INT ap_offset + poly_int64 ap_offset = get_initial_register_offset (ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM); @@ -589,7 +588,7 @@ rtx_addr_can_trap_p_1 (const_rtx x, HOST } else if (x == stack_pointer_rtx) { - HOST_WIDE_INT ap_offset + poly_int64 ap_offset = get_initial_register_offset (ARG_POINTER_REGNUM, STACK_POINTER_REGNUM); @@ -629,7 +628,8 @@ rtx_addr_can_trap_p_1 (const_rtx x, HOST #endif } - if (offset >= low_bound && offset <= high_bound - size) + if (must_ge (offset, low_bound) + && must_le (offset, high_bound - size)) return 0; return 1; } @@ -649,7 +649,7 @@ rtx_addr_can_trap_p_1 (const_rtx x, HOST if (XEXP (x, 0) == pic_offset_table_rtx && GET_CODE (XEXP (x, 1)) == CONST && GET_CODE (XEXP (XEXP (x, 1), 0)) == UNSPEC - && offset == 0) + && known_zero (offset)) return 0; /* - or it is an address that can't trap plus a constant integer. */ @@ -686,7 +686,7 @@ rtx_addr_can_trap_p_1 (const_rtx x, HOST int rtx_addr_can_trap_p (const_rtx x) { - return rtx_addr_can_trap_p_1 (x, 0, 0, VOIDmode, false); + return rtx_addr_can_trap_p_1 (x, 0, -1, BLKmode, false); } /* Return true if X contains a MEM subrtx. */ @@ -2796,7 +2796,7 @@ may_trap_p_1 (const_rtx x, unsigned flag code_changed || !MEM_NOTRAP_P (x)) { - HOST_WIDE_INT size = MEM_SIZE_KNOWN_P (x) ? MEM_SIZE (x) : 0; + HOST_WIDE_INT size = MEM_SIZE_KNOWN_P (x) ? MEM_SIZE (x) : -1; return rtx_addr_can_trap_p_1 (XEXP (x, 0), 0, size, GET_MODE (x), code_changed); }