Re: [PATCH] dwarf: Multi-register CFI address support

[Tom Tromey <tom@tromey.com>]

>>>>> "Andrew" == Andrew Stubbs <ams@codesourcery.com> writes:

Andrew> To be fair, the DWARF standard makes a similar assumption; the
Andrew> engineers working on LLVM and GDB, at AMD, have therefore invented
Andrew> some new DWARF operators that they plan to propose for a future
Andrew> standard. Only one is relevant here, however:
Andrew> DW_OP_LLVM_piece_end. (Unfortunately this clashes with an AArch64
Andrew> extension, but I think we can cope using an alias -- only GCC dumps
Andrew> will be confusing.)

Andrew> +/* AMD GCN extensions (originally for LLVM).  */
Andrew> +// This clashes with DW_OP_AARCH64_operation, so use an alias instead
Andrew> +// DW_OP (DW_OP_LLVM_piece_end, 0xea)
Andrew> +#define DW_OP_LLVM_piece_end DW_OP_AARCH64_operation
Andrew>  DW_END_OP
 
Is it too late to pick a non-clashing value?

Also, we have tried pretty hard in recent years to document all of gcc's
DWARF extensions.  Please add a link to the documentation for this one.
If there aren't docs -- I guess it would be ideal if you could write
them.  Putting them on the GCC wiki is fine.

Tom