From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 92361 invoked by alias); 21 Jan 2019 16:41:57 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 92321 invoked by uid 89); 21 Jan 2019 16:41:55 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-25.9 required=5.0 tests=BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,KAM_LAZY_DOMAIN_SECURITY autolearn=ham version=3.3.2 spammy=H*Ad:D*marvell.com, Hx-languages-length:2476 X-HELO: foss.arm.com Received: from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 21 Jan 2019 16:41:54 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7F50D15AB; Mon, 21 Jan 2019 08:41:52 -0800 (PST) Received: from localhost (unknown [10.32.98.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 674253F614; Mon, 21 Jan 2019 08:41:51 -0800 (PST) From: Richard Sandiford To: Tamar Christina Mail-Followup-To: Tamar Christina ,Steve Ellcey , "christophe.lyon\@linaro.org" , "gcc-patches\@gcc.gnu.org" , nd , richard.sandiford@arm.com Cc: Steve Ellcey , "christophe.lyon\@linaro.org" , "gcc-patches\@gcc.gnu.org" , nd Subject: Re: [EXT] Re: [Patch 2/4][Aarch64] v2: Implement Aarch64 SIMD ABI References: <87pnu6app5.fsf@arm.com> <87tvifw8vy.fsf@arm.com> <70ac99bb1350a4b6f2811d3fd0761bf303f371c8.camel@marvell.com> <87k1j6ri1c.fsf@arm.com> <8c1a759976879105a78c43806a64e72e316c6686.camel@marvell.com> <87zhs1gf4k.fsf@arm.com> <8736pry7ip.fsf@arm.com> <6e76a3a4d3649a1ebab6a479458443449c4ed3b8.camel@marvell.com> <283e05b9e1a63f9cb68f1c8e48651f04a67036a9.camel@marvell.com> Date: Mon, 21 Jan 2019 16:41:00 -0000 In-Reply-To: (Tamar Christina's message of "Mon, 21 Jan 2019 16:08:20 +0000") Message-ID: <87womyklo2.fsf@arm.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.1 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2019-01/txt/msg01216.txt.bz2 Tamar Christina writes: > Hi All, > > The simd-clone-7.cc tests seem to fail on big-endian with > > testsuite/g++.dg/vect/simd-clone-7.cc:7:1: warning: GCC does not currently support mixed size types for 'simd' functions > > The test probably miss an effective target check? The current condition is: // { dg-warning "GCC does not currently support mixed size types for 'simd' functions" "" { target aarch64-*-* } .-4 } That would need to be aarch64*-*-* to include big-endian. Fixing that here and in the other tests is OK under the obvious rule. Adding && lp64 (as per Steve's patch below) is OK too if it works. Thanks, Richard >> -----Original Message----- >> From: gcc-patches-owner@gcc.gnu.org >> On Behalf Of Steve Ellcey >> Sent: Friday, January 18, 2019 17:58 >> To: christophe.lyon@linaro.org >> Cc: gcc-patches@gcc.gnu.org; Richard Sandiford >> >> Subject: Re: [EXT] Re: [Patch 2/4][Aarch64] v2: Implement Aarch64 SIMD ABI >> >> On Fri, 2019-01-18 at 15:35 +0100, Christophe Lyon wrote: >> > >> > Hi Steve, >> > >> > I've noticed that >> > FAIL: g++.dg/vect/simd-clone-7.cc -std=c++14 (test for warnings, >> > line 7) (and for c++17 and c++98) when forcing -mabi=ilp32. >> > >> > I suspect you want to skip the test in this case? >> > >> > Christophe >> >> Actually, I think we can compile that test, it just would not generate a >> warning in ILP32 mode because int, floats and pointers would now all be the >> same size. So I think the fix is: >> >> >> % git diff simd-clone-7.cc >> diff --git a/gcc/testsuite/g++.dg/vect/simd-clone-7.cc >> b/gcc/testsuite/g++.dg/vect/simd-clone-7.cc >> index c2a63cd5f8e..3617f0ab6a7 100644 >> --- a/gcc/testsuite/g++.dg/vect/simd-clone-7.cc >> +++ b/gcc/testsuite/g++.dg/vect/simd-clone-7.cc >> @@ -8,4 +8,4 @@ bar (float x, float *y, int) { >> return y[0] + y[1] * x; >> } >> -// { dg-warning "GCC does not currently support mixed size types for 'simd' >> functions" "" { target aarch64-*-* } .-4 } >> +// { dg-warning "GCC does not currently support mixed size types for >> +'simd' functions" "" { target { { aarch64-*-* } && lp64 } } .-4 } >> >> >> I haven't tested this, I don't have an ILP32 build sitting around right now. >> Does it work for you? I can build a toolchain, test it, and submit a patch if you >> want. >> >> >> Steve Ellcey >> sellcey@marvell.com