From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 4262 invoked by alias); 12 Dec 2018 11:39:20 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 4246 invoked by uid 89); 12 Dec 2018 11:39:19 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_PASS autolearn=ham version=3.3.2 spammy=HTo:D*marvell.com, Hx-languages-length:1158 X-HELO: foss.arm.com Received: from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 12 Dec 2018 11:39:18 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9C430A78; Wed, 12 Dec 2018 03:39:16 -0800 (PST) Received: from localhost (unknown [10.32.99.101]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F33223F575; Wed, 12 Dec 2018 03:39:15 -0800 (PST) From: Richard Sandiford To: Steve Ellcey Mail-Followup-To: Steve Ellcey ,gcc-patches , richard.sandiford@arm.com Cc: gcc-patches Subject: Re: [Patch 1/4][Aarch64] v2: Implement Aarch64 SIMD ABI In-Reply-To: <5215c53c2e14b1b1980fe4294516b2eea0053391.camel@marvell.com> (Steve Ellcey's message of "Tue, 11 Dec 2018 23:01:25 +0000") References: <1541699539.12016.6.camel@cavium.com> <87in05utpk.fsf@arm.com> <5215c53c2e14b1b1980fe4294516b2eea0053391.camel@marvell.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.1 (gnu/linux) Date: Wed, 12 Dec 2018 11:39:00 -0000 Message-ID: <87woofas9w.fsf@arm.com> MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2018-12/txt/msg00788.txt.bz2 Steve Ellcey writes: > On Fri, 2018-12-07 at 17:34 +0000, Richard Sandiford wrote: >> > + (match_operand:TX 2 "register_operand" "w")) >> > + (set (mem:TX (plus:P (match_dup 0) >> > + (match_operand:P 5 "const_int_operand" "n"))) >> > + (match_operand:TX 3 "register_operand" "w"))])] >> >> Think this last part should be: >> >> (set (mem:TX (plus:P (plus:P (match_dup 0) >> (match_dup 4)) >> (match_operand:P 5 "const_int_operand" >> "n"))) >> (match_operand:TX 3 "register_operand" "w"))])] > > I think you are right about this. What I have for > loadwb_pair_ matches what is there for > loadwb_pair_. If this one is wrong, then I assume > the others are wrong too? This won't make a practical difference since > we call these with gen_loadwb_pair*_* calls and not via pattern > recognition, but still they should be right. Should I change them > all? I did not change this as part of this patch. I think we should fix the new pattern, but I agree fixing the others should be a separate patch. Patch LGTM with that change. Thanks, Richard