From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 965913858C83 for ; Wed, 11 Jan 2023 18:34:51 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 965913858C83 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=foss.arm.com Authentication-Results: sourceware.org; spf=none smtp.mailfrom=foss.arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 49353FEC; Wed, 11 Jan 2023 10:35:33 -0800 (PST) Received: from [10.57.37.91] (unknown [10.57.37.91]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3961C3F587; Wed, 11 Jan 2023 10:34:50 -0800 (PST) Message-ID: <883a2052-0934-a224-a8ce-4ef7bc033e87@foss.arm.com> Date: Wed, 11 Jan 2023 18:34:48 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH] [PR40457] [arm] expand SI-aligned movdi into pair of movsi Content-Language: en-GB To: Alexandre Oliva , gcc-patches@gcc.gnu.org Cc: Nick Clifton , Richard Earnshaw , Ramana Radhakrishnan , Kyrylo Tkachov References: From: Richard Earnshaw In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3495.6 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,NICE_REPLY_A,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 02/12/2022 09:29, Alexandre Oliva via Gcc-patches wrote: > > When expanding a misaligned DImode move, emit aligned SImode moves if > the parts are sufficiently aligned. This enables neighboring stores > to be peephole-combined into stm, as expected by the PR40457 testcase, > even after SLP vectorizes the originally aligned SImode stores into a > misaligned DImode store. > > Regstraped on x86_64-linux-gnu, also tested with crosses to riscv64-elf > and arm-eabi (tms570). Ok to install? > > > for gcc/ChangeLog > > PR target/40457 > * config/arm/arm.md (movmisaligndi): Prefer aligned SImode > moves. OK. R. > --- > gcc/config/arm/arm.md | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) > > diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md > index 69bf343fb0ed6..a9eb0299aa761 100644 > --- a/gcc/config/arm/arm.md > +++ b/gcc/config/arm/arm.md > @@ -12783,8 +12783,16 @@ (define_expand "movmisaligndi" > rtx hi_op0 = gen_highpart_mode (SImode, DImode, operands[0]); > rtx hi_op1 = gen_highpart_mode (SImode, DImode, operands[1]); > > - emit_insn (gen_movmisalignsi (lo_op0, lo_op1)); > - emit_insn (gen_movmisalignsi (hi_op0, hi_op1)); > + if (aligned_operand (lo_op0, SImode) && aligned_operand (lo_op1, SImode)) > + { > + emit_move_insn (lo_op0, lo_op1); > + emit_move_insn (hi_op0, hi_op1); > + } > + else > + { > + emit_insn (gen_movmisalignsi (lo_op0, lo_op1)); > + emit_insn (gen_movmisalignsi (hi_op0, hi_op1)); > + } > DONE; > }) > >