Re: [PATCH] xtensa: Optimize boolean evaluation when SImode EQ/NE to zero if TARGET_MINMAX

[Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>]

On 2023/09/06 8:01, Max Filippov wrote:
> Hi Suwa-san,
Hi!

> 
> On Tue, Sep 5, 2023 at 2:29 AM Takayuki 'January June' Suwa
> <jjsuwa_sys3175@yahoo.co.jp> wrote:
>>
>> This patch optimizes the boolean evaluation for equality to 0 in SImode
>> using the MINU (Minimum Value Unsigned) machine instruction available
>> when TARGET_MINMAX is configured, for example, (x != 0) to MINU(x, 1)
>> and (x == 0) to (MINU(x, 1) ^ 1).
>>
>>     /* example */
>>     int test0(int x) {
>>       return x == 0;
>>     }
>>     int test1(int x) {
>>       return x != 0;
>>     }
>>
>>     ;; before
>>     test0:
>>         mov.n   a10, a2
>>         movi.n  a9, 1
>>         movi.n  a2, 0
>>         moveqz  a2, a9, a10
>>         ret.n
>>     test1:
>>         mov.n   a10, a2
>>         movi.n  a9, 1
>>         movi.n  a2, 0
>>         movnez  a2, a9, a10
>>         ret.n
>>
>>     ;; after (prereq. TARGET_MINMAX)
>>     test0:
>>         movi.n  a9, 1
>>         minu    a2, a2, a9
>>         xor     a2, a2, a9
>>         ret.n
> 
> ISTM that test0 could be done with movnez in the same three instructions:
> 
>   movi a9, 1
>   movnez a2, a9, a2
>   xor a2, a2, a9

Unfortunately, the MOV[EQ/NE]Z machine instruction can only be used to implement the functionality if the input and output physical registers are the same (a2 in the example).
In fact, when modified to use MOV[EQ/NE]Z, GCC register allocator often prepends a register move instruction to satisfy the above constraint (and thus often does not save instruction count).

I'm currently trying to see if I can somehow follow up after the physical register is determined (around split2 or peephole2).

> 
>>     test1:
>>         movi.n  a9, 1
>>         minu    a2, a2, a9
>>         ret.n
> 
> ISTM that test1 could be done with movnez in the same two instructions:
> 
>   movi a9, 1
>   movnez a2, a9, a2
>