* backport the fixes of PR target/64011 and /61749 to 4.9 gcc
@ 2015-05-27 5:28 weixiangyu
2015-05-28 14:09 ` James Greenhalgh
0 siblings, 1 reply; 7+ messages in thread
From: weixiangyu @ 2015-05-27 5:28 UTC (permalink / raw)
To: gcc-patches; +Cc: marcus.shawcroft, richard.earnshaw, Yangfei (Felix)
[-- Attachment #1: Type: text/plain, Size: 2223 bytes --]
Hi,
The first patch backports the fix of PR target/64011(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64011) to the 4.9 branch from trunk r219717,
and the second patch backports the fix of PR target/61749(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61749) to the 4.9 branch from trunk r215046.
Here comes the first patch:
===================================================================
--- gcc/ChangeLog-HCC (revision 130394)
+++ gcc/ChangeLog-HCC (working copy)
@@ -1,3 +1,12 @@
+2015-05-25 y00166676 <felix.yang@huawei.com>
+
+ Backport from trunk r219717.
+ 2015-01-15 Jiong Wang <jiong.wang@arm.com>
+
+ PR rtl-optimization/64011
+ * expmed.c (store_bit_field_using_insv): Warn and truncate bitsize when
+ there is partial overflow.
And the second one:
===================================================================
--- gcc/ChangeLog-HCC (revision 130589)
+++ gcc/ChangeLog-HCC (revision 130590)
@@ -1,3 +1,29 @@
+2015-05-26 y00166676 <felix.yang@huawei.com>
+
+ Backport from trunk r215046.
+ 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/61749
+ * config/aarch64/aarch64-builtins.c (aarch64_types_quadop_qualifiers):
+ Use qualifier_immediate for last operand. Rename to...
+ (aarch64_types_ternop_lane_qualifiers): ... This.
+ (TYPES_QUADOP): Rename to...
+ (TYPES_TERNOP_LANE): ... This.
+ (aarch64_simd_expand_args): Return const0_rtx when encountering user
+ error. Change return of 0 to return of NULL_RTX.
+ (aarch64_crc32_expand_builtin): Likewise.
+ (aarch64_expand_builtin): Return NULL_RTX instead of 0.
+ ICE when expanding unknown builtin.
+ * config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
+ TERNOP_LANE qualifiers.
+ (sqdmlsl_lane): Likewise.
+ (sqdmlal_laneq): Likewise.
+ (sqdmlsl_laneq): Likewise.
+ (sqdmlal2_lane): Likewise.
+ (sqdmlsl2_lane): Likewise.
+ (sqdmlal2_laneq): Likewise.
+ (sqdmlsl2_laneq): Likewise.
+
* gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c: New test.
Thanks for your attention,
Xiangyu Wei
[-- Attachment #2: pr64011-backport-4.9.diff --]
[-- Type: application/octet-stream, Size: 1800 bytes --]
Index: gcc/ChangeLog-HCC
===================================================================
--- gcc/ChangeLog-HCC (revision 130410)
+++ gcc/ChangeLog-HCC (revision 130411)
@@ -1,3 +1,12 @@
+2015-05-25 y00166676 <felix.yang@huawei.com>
+
+ Backport from trunk r219717.
+ 2015-01-15 Jiong Wang <jiong.wang@arm.com>
+
+ PR rtl-optimization/64011
+ * expmed.c (store_bit_field_using_insv): Warn and truncate bitsize when
+ there is partial overflow.
+
2015-05-21 y00166676 <felix.yang@huawei.com>
[TASK] Merge bugfix from GCC 4.9 branch.
Index: gcc/expmed.c
===================================================================
--- gcc/expmed.c (revision 130410)
+++ gcc/expmed.c (revision 130411)
@@ -540,6 +540,21 @@
copy_back = true;
}
+ /* There are similar overflow check at the start of store_bit_field_1,
+ but that only check the situation where the field lies completely
+ outside the register, while there do have situation where the field
+ lies partialy in the register, we need to adjust bitsize for this
+ partial overflow situation. Without this fix, pr48335-2.c on big-endian
+ will broken on those arch support bit insert instruction, like arm, aarch64
+ etc. */
+ if (bitsize + bitnum > unit && bitnum < unit)
+ {
+ warning (OPT_Wextra, "write of %wu-bit data outside the bound of "
+ "destination object, data truncated into %wu-bit",
+ bitsize, unit - bitnum);
+ bitsize = unit - bitnum;
+ }
+
/* If BITS_BIG_ENDIAN is zero on a BYTES_BIG_ENDIAN machine, we count
"backwards" from the size of the unit we are inserting into.
Otherwise, we count bits from the most significant on a
[-- Attachment #3: pr61749-backport-4.9.diff --]
[-- Type: application/octet-stream, Size: 6718 bytes --]
Index: gcc/testsuite/gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c
===================================================================
--- gcc/testsuite/gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c (revision 0)
+++ gcc/testsuite/gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c (revision 130590)
@@ -0,0 +1,54 @@
+/* { dg-do compile } */
+
+#include "arm_neon.h"
+
+int32x4_t
+foo (int32x4_t a, int16x4_t b, int16x4_t c, int d)
+{
+ return vqdmlal_lane_s16 (a, b, c, d);
+}
+
+int32x4_t
+foo1 (int32x4_t a, int16x4_t b, int16x8_t c, int d)
+{
+ return vqdmlal_laneq_s16 (a, b, c, d);
+}
+
+int32x4_t
+foo2 (int32x4_t a, int16x4_t b, int16x4_t c, int d)
+{
+ return vqdmlsl_lane_s16 (a, b, c, d);
+}
+
+int32x4_t
+foo3 (int32x4_t a, int16x4_t b, int16x8_t c, int d)
+{
+ return vqdmlsl_laneq_s16 (a, b, c, d);
+}
+
+int32x4_t
+foo4 (int32x4_t a, int16x8_t b, int16x4_t c, int d)
+{
+ return vqdmlal_high_lane_s16 (a, b, c, d);
+}
+
+int32x4_t
+foo5 (int32x4_t a, int16x8_t b, int16x4_t c, int d)
+{
+ return vqdmlsl_high_lane_s16 (a, b, c, d);
+}
+
+int32x4_t
+foo6 (int32x4_t a, int16x8_t b, int16x8_t c, int d)
+{
+ return vqdmlal_high_laneq_s16 (a, b, c, d);
+}
+
+int32x4_t
+foo7 (int32x4_t a, int16x8_t b, int16x8_t c, int d)
+{
+ return vqdmlsl_high_laneq_s16 (a, b, c, d);
+}
+
+
+/* { dg-excess-errors "incompatible type for argument" } */
Property changes on: gcc/testsuite/gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c
___________________________________________________________________
Added: svn:executable
+ *
Index: gcc/testsuite/ChangeLog-HCC
===================================================================
--- gcc/testsuite/ChangeLog-HCC (revision 130589)
+++ gcc/testsuite/ChangeLog-HCC (revision 130590)
@@ -1,3 +1,11 @@
+2015-05-26 Felix Yang <felix.yang@huawei.com>
+
+ Backport from trunk r215046.
+ 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/61749
+ * gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c: New test.
+
2015-01-19 Jiong Wang <jiong.wang@arm.com>
* gcc.target/aarch64/pr64304.c: New testcase.
Index: gcc/config/aarch64/aarch64-builtins.c
===================================================================
--- gcc/config/aarch64/aarch64-builtins.c (revision 130589)
+++ gcc/config/aarch64/aarch64-builtins.c (revision 130590)
@@ -172,10 +172,10 @@
#define TYPES_TERNOPU (aarch64_types_ternopu_qualifiers)
static enum aarch64_type_qualifiers
-aarch64_types_quadop_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+aarch64_types_ternop_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_none, qualifier_none, qualifier_none,
- qualifier_none, qualifier_none };
-#define TYPES_QUADOP (aarch64_types_quadop_qualifiers)
+ qualifier_none, qualifier_immediate };
+#define TYPES_TERNOP_LANE (aarch64_types_ternop_lane_qualifiers)
static enum aarch64_type_qualifiers
aarch64_types_getlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
@@ -818,8 +818,11 @@
case SIMD_ARG_CONSTANT:
if (!(*insn_data[icode].operand[argc + have_retval].predicate)
(op[argc], mode[argc]))
- error_at (EXPR_LOCATION (exp), "incompatible type for argument %d, "
+ {
+ error_at (EXPR_LOCATION (exp), "incompatible type for argument %d, "
"expected %<const int%>", argc + 1);
+ return const0_rtx;
+ }
break;
case SIMD_ARG_STOP:
@@ -886,7 +889,7 @@
}
if (!pat)
- return 0;
+ return NULL_RTX;
emit_insn (pat);
@@ -968,7 +971,7 @@
if (fcode >= AARCH64_SIMD_BUILTIN_BASE)
return aarch64_simd_expand_builtin (fcode, exp, target);
- return NULL_RTX;
+ gcc_unreachable ();
}
tree
Index: gcc/config/aarch64/aarch64-simd-builtins.def
===================================================================
--- gcc/config/aarch64/aarch64-simd-builtins.def (revision 130589)
+++ gcc/config/aarch64/aarch64-simd-builtins.def (revision 130590)
@@ -145,16 +145,16 @@
BUILTIN_VSDQ_I_BHSI (UNOP, sqabs, 0)
BUILTIN_VSDQ_I_BHSI (UNOP, sqneg, 0)
- BUILTIN_VSD_HSI (QUADOP, sqdmlal_lane, 0)
- BUILTIN_VSD_HSI (QUADOP, sqdmlsl_lane, 0)
- BUILTIN_VSD_HSI (QUADOP, sqdmlal_laneq, 0)
- BUILTIN_VSD_HSI (QUADOP, sqdmlsl_laneq, 0)
+ BUILTIN_VSD_HSI (TERNOP_LANE, sqdmlal_lane, 0)
+ BUILTIN_VSD_HSI (TERNOP_LANE, sqdmlsl_lane, 0)
+ BUILTIN_VSD_HSI (TERNOP_LANE, sqdmlal_laneq, 0)
+ BUILTIN_VSD_HSI (TERNOP_LANE, sqdmlsl_laneq, 0)
BUILTIN_VQ_HSI (TERNOP, sqdmlal2, 0)
BUILTIN_VQ_HSI (TERNOP, sqdmlsl2, 0)
- BUILTIN_VQ_HSI (QUADOP, sqdmlal2_lane, 0)
- BUILTIN_VQ_HSI (QUADOP, sqdmlsl2_lane, 0)
- BUILTIN_VQ_HSI (QUADOP, sqdmlal2_laneq, 0)
- BUILTIN_VQ_HSI (QUADOP, sqdmlsl2_laneq, 0)
+ BUILTIN_VQ_HSI (TERNOP_LANE, sqdmlal2_lane, 0)
+ BUILTIN_VQ_HSI (TERNOP_LANE, sqdmlsl2_lane, 0)
+ BUILTIN_VQ_HSI (TERNOP_LANE, sqdmlal2_laneq, 0)
+ BUILTIN_VQ_HSI (TERNOP_LANE, sqdmlsl2_laneq, 0)
BUILTIN_VQ_HSI (TERNOP, sqdmlal2_n, 0)
BUILTIN_VQ_HSI (TERNOP, sqdmlsl2_n, 0)
/* Implemented by aarch64_sqdml<SBINQOPS:as>l<mode>. */
Index: gcc/ChangeLog-HCC
===================================================================
--- gcc/ChangeLog-HCC (revision 130589)
+++ gcc/ChangeLog-HCC (revision 130590)
@@ -1,3 +1,29 @@
+2015-05-26 y00166676 <felix.yang@huawei.com>
+
+ Backport from trunk r215046.
+ 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/61749
+ * config/aarch64/aarch64-builtins.c (aarch64_types_quadop_qualifiers):
+ Use qualifier_immediate for last operand. Rename to...
+ (aarch64_types_ternop_lane_qualifiers): ... This.
+ (TYPES_QUADOP): Rename to...
+ (TYPES_TERNOP_LANE): ... This.
+ (aarch64_simd_expand_args): Return const0_rtx when encountering user
+ error. Change return of 0 to return of NULL_RTX.
+ (aarch64_crc32_expand_builtin): Likewise.
+ (aarch64_expand_builtin): Return NULL_RTX instead of 0.
+ ICE when expanding unknown builtin.
+ * config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
+ TERNOP_LANE qualifiers.
+ (sqdmlsl_lane): Likewise.
+ (sqdmlal_laneq): Likewise.
+ (sqdmlsl_laneq): Likewise.
+ (sqdmlal2_lane): Likewise.
+ (sqdmlsl2_lane): Likewise.
+ (sqdmlal2_laneq): Likewise.
+ (sqdmlsl2_laneq): Likewise.
+
2015-05-25 y00166676 <felix.yang@huawei.com>
Backport from trunk r219717.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: backport the fixes of PR target/64011 and /61749 to 4.9 gcc
2015-05-27 5:28 backport the fixes of PR target/64011 and /61749 to 4.9 gcc weixiangyu
@ 2015-05-28 14:09 ` James Greenhalgh
2015-06-10 3:26 ` weixiangyu
0 siblings, 1 reply; 7+ messages in thread
From: James Greenhalgh @ 2015-05-28 14:09 UTC (permalink / raw)
To: weixiangyu
Cc: gcc-patches, Marcus Shawcroft, Richard Earnshaw, Yangfei (Felix)
On Wed, May 27, 2015 at 03:49:24AM +0100, weixiangyu wrote:
> Hi,
Hi,
> The first patch backports the fix of PR
> target/64011(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64011) to the 4.9
> branch from trunk r219717,
I can't approve this patch to be backported, so please do not commit it
without approval from the appropriate maintainer.
> and the second patch backports the fix of PR
> target/61749(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61749) to the 4.9
> branch from trunk r215046.
This second patch is OK to backport to 4.9. It is a harmelss enough
patch which fixes an ICE.
Thanks,
James
> And the second one:
> ===================================================================
> --- gcc/ChangeLog-HCC (revision 130589)
> +++ gcc/ChangeLog-HCC (revision 130590)
> @@ -1,3 +1,29 @@
> +2015-05-26 y00166676 <felix.yang@huawei.com>
> +
> + Backport from trunk r215046.
> + 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
> +
> + PR target/61749
> + * config/aarch64/aarch64-builtins.c (aarch64_types_quadop_qualifiers):
> + Use qualifier_immediate for last operand. Rename to...
> + (aarch64_types_ternop_lane_qualifiers): ... This.
> + (TYPES_QUADOP): Rename to...
> + (TYPES_TERNOP_LANE): ... This.
> + (aarch64_simd_expand_args): Return const0_rtx when encountering user
> + error. Change return of 0 to return of NULL_RTX.
> + (aarch64_crc32_expand_builtin): Likewise.
> + (aarch64_expand_builtin): Return NULL_RTX instead of 0.
> + ICE when expanding unknown builtin.
> + * config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
> + TERNOP_LANE qualifiers.
> + (sqdmlsl_lane): Likewise.
> + (sqdmlal_laneq): Likewise.
> + (sqdmlsl_laneq): Likewise.
> + (sqdmlal2_lane): Likewise.
> + (sqdmlsl2_lane): Likewise.
> + (sqdmlal2_laneq): Likewise.
> + (sqdmlsl2_laneq): Likewise.
> +
> * gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c: New test.
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: backport the fixes of PR target/64011 and /61749 to 4.9 gcc
2015-05-28 14:09 ` James Greenhalgh
@ 2015-06-10 3:26 ` weixiangyu
2015-06-10 10:44 ` Joseph Myers
2015-06-11 9:35 ` Marcus Shawcroft
0 siblings, 2 replies; 7+ messages in thread
From: weixiangyu @ 2015-06-10 3:26 UTC (permalink / raw)
To: James Greenhalgh
Cc: gcc-patches, Marcus Shawcroft, Richard Earnshaw, Richard Earnshaw
[-- Attachment #1: Type: text/plain, Size: 7557 bytes --]
Updated patches were attached. Rebased on the latest 4.9 branch.
Tested on aarch64-linux (big-endian and little-endian) with qemu.
OK for 4.9?
The first patch:
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog (revision 223867)
+++ gcc/ChangeLog (working copy)
@@ -1,3 +1,11 @@
+2015-06-09 Xiangyu Wei <weixiangyu@huawei.com>
+
+ Backport from mainline r219717:
+ 2015-01-15 Jiong Wang <jiong.wang@arm.com>
+ PR rtl-optimization/64011
+ * expmed.c (store_bit_field_using_insv): Warn and truncate bitsize when
+ there is partial overflow.
+
Index: gcc/expmed.c
===================================================================
--- gcc/expmed.c (revision 223867)
+++ gcc/expmed.c (working copy)
@@ -539,7 +539,21 @@ store_bit_field_using_insv (const extraction_insn
xop0 = tem;
copy_back = true;
}
-
+
+ /* There are similar overflow check at the start of store_bit_field_1,
+ but that only check the situation where the field lies completely
+ outside the register, while there do have situation where the field
+ lies partialy in the register, we need to adjust bitsize for this
+ partial overflow situation. Without this fix, pr48335-2.c on big-endian
+ will broken on those arch support bit insert instruction, like arm, aarch64
+ etc. */
+ if (bitsize + bitnum > unit && bitnum < unit)
+ {
+ warning (OPT_Wextra, "write of "HOST_WIDE_INT_PRINT_UNSIGNED"bit data "
+ "outside the bound of destination object, data truncated into "
+ HOST_WIDE_INT_PRINT_UNSIGNED"bit", bitsize, unit - bitnum);
+ bitsize = unit - bitnum;
+ }
/* If BITS_BIG_ENDIAN is zero on a BYTES_BIG_ENDIAN machine, we count
"backwards" from the size of the unit we are inserting into.
Otherwise, we count bits from the most significant on a
And the second one:
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog (revision 223867)
+++ gcc/ChangeLog (working copy)
@@ -1,3 +1,28 @@
+2015-06-09 Xiangyu Wei <weixiangyu@huawei.com>
+
+ Backport from mainline r215046:
+ 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+ PR target/61749
+ * config/aarch64/aarch64-builtins.c (aarch64_types_quadop_qualifiers):
+ Use qualifier_immediate for last operand. Rename to...
+ (aarch64_types_ternop_lane_qualifiers): ... This.
+ (TYPES_QUADOP): Rename to...
+ (TYPES_TERNOP_LANE): ... This.
+ (aarch64_simd_expand_args): Return const0_rtx when encountering user
+ error. Change return of 0 to return of NULL_RTX.
+ (aarch64_crc32_expand_builtin): Likewise.
+ (aarch64_expand_builtin): Return NULL_RTX instead of 0.
+ ICE when expanding unknown builtin.
+ * config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
+ TERNOP_LANE qualifiers.
+ (sqdmlsl_lane): Likewise.
+ (sqdmlal_laneq): Likewise.
+ (sqdmlsl_laneq): Likewise.
+ (sqdmlal2_lane): Likewise.
+ (sqdmlsl2_lane): Likewise.
+ (sqdmlal2_laneq): Likewise.
+ (sqdmlsl2_laneq): Likewise.
+ * gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c: New test.
Index: gcc/config/aarch64/aarch64-builtins.c
===================================================================
--- gcc/config/aarch64/aarch64-builtins.c (revision 223867)
+++ gcc/config/aarch64/aarch64-builtins.c (working copy)
@@ -172,10 +172,10 @@ aarch64_types_ternopu_qualifiers[SIMD_MAX_BUILTIN_
#define TYPES_TERNOPU (aarch64_types_ternopu_qualifiers)
static enum aarch64_type_qualifiers
-aarch64_types_quadop_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+aarch64_types_ternop_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_none, qualifier_none, qualifier_none,
- qualifier_none, qualifier_none };
-#define TYPES_QUADOP (aarch64_types_quadop_qualifiers)
+ qualifier_none, qualifier_immediate };
+#define TYPES_TERNOP_LANE (aarch64_types_ternop_lane_qualifiers)
static enum aarch64_type_qualifiers
aarch64_types_getlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
@@ -818,8 +818,11 @@ aarch64_simd_expand_args (rtx target, int icode, i
case SIMD_ARG_CONSTANT:
if (!(*insn_data[icode].operand[argc + have_retval].predicate)
(op[argc], mode[argc]))
- error_at (EXPR_LOCATION (exp), "incompatible type for argument %d, "
+ {
+ error_at (EXPR_LOCATION (exp), "incompatible type for argument %d, "
"expected %<const int%>", argc + 1);
+ return const0_rtx;
+ }
break;
case SIMD_ARG_STOP:
@@ -886,7 +889,7 @@ aarch64_simd_expand_args (rtx target, int icode, i
}
if (!pat)
- return 0;
+ return NULL_RTX;
> -----Original Message-----
> From: James Greenhalgh [mailto:james.greenhalgh@arm.com]
> Sent: Thursday, May 28, 2015 9:58 PM
> To: weixiangyu
> Cc: gcc-patches@gcc.gnu.org; Marcus Shawcroft; Richard Earnshaw; Yangfei
> (Felix)
> Subject: Re: backport the fixes of PR target/64011 and /61749 to 4.9 gcc
>
> On Wed, May 27, 2015 at 03:49:24AM +0100, weixiangyu wrote:
> > Hi,
>
> Hi,
>
> > The first patch backports the fix of PR
> > target/64011(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64011) to
> > the 4.9 branch from trunk r219717,
>
> I can't approve this patch to be backported, so please do not commit it without
> approval from the appropriate maintainer.
>
> > and the second patch backports the fix of PR
> > target/61749(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61749) to
> > the 4.9 branch from trunk r215046.
>
> This second patch is OK to backport to 4.9. It is a harmelss enough patch which
> fixes an ICE.
>
> Thanks,
> James
>
> > And the second one:
> >
> ================================================================
> ===
> > --- gcc/ChangeLog-HCC (revision 130589)
> > +++ gcc/ChangeLog-HCC (revision 130590)
> > @@ -1,3 +1,29 @@
> > +2015-05-26 y00166676 <felix.yang@huawei.com>
> > +
> > + Backport from trunk r215046.
> > + 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
> > +
> > + PR target/61749
> > + * config/aarch64/aarch64-builtins.c
> (aarch64_types_quadop_qualifiers):
> > + Use qualifier_immediate for last operand. Rename to...
> > + (aarch64_types_ternop_lane_qualifiers): ... This.
> > + (TYPES_QUADOP): Rename to...
> > + (TYPES_TERNOP_LANE): ... This.
> > + (aarch64_simd_expand_args): Return const0_rtx when
> encountering user
> > + error. Change return of 0 to return of NULL_RTX.
> > + (aarch64_crc32_expand_builtin): Likewise.
> > + (aarch64_expand_builtin): Return NULL_RTX instead of 0.
> > + ICE when expanding unknown builtin.
> > + * config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
> > + TERNOP_LANE qualifiers.
> > + (sqdmlsl_lane): Likewise.
> > + (sqdmlal_laneq): Likewise.
> > + (sqdmlsl_laneq): Likewise.
> > + (sqdmlal2_lane): Likewise.
> > + (sqdmlsl2_lane): Likewise.
> > + (sqdmlal2_laneq): Likewise.
> > + (sqdmlsl2_laneq): Likewise.
> > +
> > * gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c: New test.
> >
>
[-- Attachment #2: pr64011.patch --]
[-- Type: application/octet-stream, Size: 1926 bytes --]
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog (revision 223867)
+++ gcc/ChangeLog (working copy)
@@ -1,3 +1,11 @@
+2015-06-09 Xiangyu Wei <weixiangyu@huawei.com>
+
+ Backport from mainline r219717:
+ 2015-01-15 Jiong Wang <jiong.wang@arm.com>
+ PR rtl-optimization/64011
+ * expmed.c (store_bit_field_using_insv): Warn and truncate bitsize when
+ there is partial overflow.
+
2015-05-28 Mike Frysinger <vapier@gentoo.org>
* config/nios2/linux.h (CPP_SPEC): Define.
Index: gcc/config/aarch64/aarch64-builtins.c
Index: gcc/expmed.c
===================================================================
--- gcc/expmed.c (revision 223867)
+++ gcc/expmed.c (working copy)
@@ -539,7 +539,21 @@ store_bit_field_using_insv (const extraction_insn
xop0 = tem;
copy_back = true;
}
-
+
+ /* There are similar overflow check at the start of store_bit_field_1,
+ but that only check the situation where the field lies completely
+ outside the register, while there do have situation where the field
+ lies partialy in the register, we need to adjust bitsize for this
+ partial overflow situation. Without this fix, pr48335-2.c on big-endian
+ will broken on those arch support bit insert instruction, like arm, aarch64
+ etc. */
+ if (bitsize + bitnum > unit && bitnum < unit)
+ {
+ warning (OPT_Wextra, "write of "HOST_WIDE_INT_PRINT_UNSIGNED"bit data "
+ "outside the bound of destination object, data truncated into "
+ HOST_WIDE_INT_PRINT_UNSIGNED"bit", bitsize, unit - bitnum);
+ bitsize = unit - bitnum;
+ }
/* If BITS_BIG_ENDIAN is zero on a BYTES_BIG_ENDIAN machine, we count
"backwards" from the size of the unit we are inserting into.
Otherwise, we count bits from the most significant on a
[-- Attachment #3: pr61749.patch --]
[-- Type: application/octet-stream, Size: 4356 bytes --]
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog (revision 223867)
+++ gcc/ChangeLog (working copy)
@@ -1,3 +1,28 @@
+2015-06-09 Xiangyu Wei <weixiangyu@huawei.com>
+
+ Backport from mainline r215046:
+ 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+ PR target/61749
+ * config/aarch64/aarch64-builtins.c (aarch64_types_quadop_qualifiers):
+ Use qualifier_immediate for last operand. Rename to...
+ (aarch64_types_ternop_lane_qualifiers): ... This.
+ (TYPES_QUADOP): Rename to...
+ (TYPES_TERNOP_LANE): ... This.
+ (aarch64_simd_expand_args): Return const0_rtx when encountering user
+ error. Change return of 0 to return of NULL_RTX.
+ (aarch64_crc32_expand_builtin): Likewise.
+ (aarch64_expand_builtin): Return NULL_RTX instead of 0.
+ ICE when expanding unknown builtin.
+ * config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
+ TERNOP_LANE qualifiers.
+ (sqdmlsl_lane): Likewise.
+ (sqdmlal_laneq): Likewise.
+ (sqdmlsl_laneq): Likewise.
+ (sqdmlal2_lane): Likewise.
+ (sqdmlsl2_lane): Likewise.
+ (sqdmlal2_laneq): Likewise.
+ (sqdmlsl2_laneq): Likewise.
+ * gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c: New test.
2015-05-28 Mike Frysinger <vapier@gentoo.org>
* config/nios2/linux.h (CPP_SPEC): Define.
Index: gcc/config/aarch64/aarch64-builtins.c
===================================================================
--- gcc/config/aarch64/aarch64-builtins.c (revision 223867)
+++ gcc/config/aarch64/aarch64-builtins.c (working copy)
@@ -172,10 +172,10 @@ aarch64_types_ternopu_qualifiers[SIMD_MAX_BUILTIN_
#define TYPES_TERNOPU (aarch64_types_ternopu_qualifiers)
static enum aarch64_type_qualifiers
-aarch64_types_quadop_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+aarch64_types_ternop_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_none, qualifier_none, qualifier_none,
- qualifier_none, qualifier_none };
-#define TYPES_QUADOP (aarch64_types_quadop_qualifiers)
+ qualifier_none, qualifier_immediate };
+#define TYPES_TERNOP_LANE (aarch64_types_ternop_lane_qualifiers)
static enum aarch64_type_qualifiers
aarch64_types_getlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
@@ -818,8 +818,11 @@ aarch64_simd_expand_args (rtx target, int icode, i
case SIMD_ARG_CONSTANT:
if (!(*insn_data[icode].operand[argc + have_retval].predicate)
(op[argc], mode[argc]))
- error_at (EXPR_LOCATION (exp), "incompatible type for argument %d, "
+ {
+ error_at (EXPR_LOCATION (exp), "incompatible type for argument %d, "
"expected %<const int%>", argc + 1);
+ return const0_rtx;
+ }
break;
case SIMD_ARG_STOP:
@@ -886,7 +889,7 @@ aarch64_simd_expand_args (rtx target, int icode, i
}
if (!pat)
- return 0;
+ return NULL_RTX;
emit_insn (pat);
@@ -968,7 +971,7 @@ aarch64_expand_builtin (tree exp,
if (fcode >= AARCH64_SIMD_BUILTIN_BASE)
return aarch64_simd_expand_builtin (fcode, exp, target);
- return NULL_RTX;
+ gcc_unreachable ();
}
tree
Index: gcc/config/aarch64/aarch64-simd-builtins.def
===================================================================
--- gcc/config/aarch64/aarch64-simd-builtins.def (revision 223867)
+++ gcc/config/aarch64/aarch64-simd-builtins.def (working copy)
@@ -145,16 +145,16 @@
BUILTIN_VSDQ_I_BHSI (UNOP, sqabs, 0)
BUILTIN_VSDQ_I_BHSI (UNOP, sqneg, 0)
- BUILTIN_VSD_HSI (QUADOP, sqdmlal_lane, 0)
- BUILTIN_VSD_HSI (QUADOP, sqdmlsl_lane, 0)
- BUILTIN_VSD_HSI (QUADOP, sqdmlal_laneq, 0)
- BUILTIN_VSD_HSI (QUADOP, sqdmlsl_laneq, 0)
+BUILTIN_VSD_HSI (TERNOP_LANE, sqdmlal_lane, 0)
+BUILTIN_VSD_HSI (TERNOP_LANE, sqdmlsl_lane, 0)
+BUILTIN_VSD_HSI (TERNOP_LANE, sqdmlal_laneq, 0)
+BUILTIN_VSD_HSI (TERNOP_LANE, sqdmlsl_laneq, 0)
BUILTIN_VQ_HSI (TERNOP, sqdmlal2, 0)
BUILTIN_VQ_HSI (TERNOP, sqdmlsl2, 0)
- BUILTIN_VQ_HSI (QUADOP, sqdmlal2_lane, 0)
- BUILTIN_VQ_HSI (QUADOP, sqdmlsl2_lane, 0)
- BUILTIN_VQ_HSI (QUADOP, sqdmlal2_laneq, 0)
- BUILTIN_VQ_HSI (QUADOP, sqdmlsl2_laneq, 0)
+BUILTIN_VQ_HSI (TERNOP_LANE, sqdmlal2_lane, 0)
+BUILTIN_VQ_HSI (TERNOP_LANE, sqdmlsl2_lane, 0)
+BUILTIN_VQ_HSI (TERNOP_LANE, sqdmlal2_laneq, 0)
+BUILTIN_VQ_HSI (TERNOP_LANE, sqdmlsl2_laneq, 0)
BUILTIN_VQ_HSI (TERNOP, sqdmlal2_n, 0)
BUILTIN_VQ_HSI (TERNOP, sqdmlsl2_n, 0)
/* Implemented by aarch64_sqdml<SBINQOPS:as>l<mode>. */
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: backport the fixes of PR target/64011 and /61749 to 4.9 gcc
2015-06-10 3:26 ` weixiangyu
@ 2015-06-10 10:44 ` Joseph Myers
2015-06-11 12:02 ` weixiangyu
2015-06-11 9:35 ` Marcus Shawcroft
1 sibling, 1 reply; 7+ messages in thread
From: Joseph Myers @ 2015-06-10 10:44 UTC (permalink / raw)
To: weixiangyu
Cc: James Greenhalgh, gcc-patches, Marcus Shawcroft,
Richard Earnshaw, Richard Earnshaw
On Wed, 10 Jun 2015, weixiangyu wrote:
> + if (bitsize + bitnum > unit && bitnum < unit)
> + {
> + warning (OPT_Wextra, "write of "HOST_WIDE_INT_PRINT_UNSIGNED"bit data "
> + "outside the bound of destination object, data truncated into "
> + HOST_WIDE_INT_PRINT_UNSIGNED"bit", bitsize, unit - bitnum);
HOST_WIDE_INT_PRINT_UNSIGNED is a printf format, which depends on the host
and is not suitable for any translatable string, not a format for GCC's
pretty printers. Use %wu instead in any call to a GCC diagnostic
function. Mainline appears to have this correct.
--
Joseph S. Myers
joseph@codesourcery.com
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: backport the fixes of PR target/64011 and /61749 to 4.9 gcc
2015-06-10 3:26 ` weixiangyu
2015-06-10 10:44 ` Joseph Myers
@ 2015-06-11 9:35 ` Marcus Shawcroft
2015-06-12 11:11 ` weixiangyu
1 sibling, 1 reply; 7+ messages in thread
From: Marcus Shawcroft @ 2015-06-11 9:35 UTC (permalink / raw)
To: weixiangyu
Cc: James Greenhalgh, gcc-patches, Marcus Shawcroft, Richard Earnshaw
On 10 June 2015 at 03:46, weixiangyu <weixiangyu@huawei.com> wrote:
> Updated patches were attached. Rebased on the latest 4.9 branch.
> Tested on aarch64-linux (big-endian and little-endian) with qemu.
> OK for 4.9?
Hi,
> And the second one:
The original r215046 mainline commit contains a test case that is
omitted from the proposed back port, can you elaborate why you have
chosen to drop the test case?
The usual convention on this list is to post one patch per email such
that each email thread discusses just one patch.
Thanks
/Marcus
> Index: gcc/ChangeLog
> ===================================================================
> --- gcc/ChangeLog (revision 223867)
> +++ gcc/ChangeLog (working copy)
> @@ -1,3 +1,28 @@
> +2015-06-09 Xiangyu Wei <weixiangyu@huawei.com>
> +
> + Backport from mainline r215046:
> + 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
> + PR target/61749
> + * config/aarch64/aarch64-builtins.c (aarch64_types_quadop_qualifiers):
> + Use qualifier_immediate for last operand. Rename to...
> + (aarch64_types_ternop_lane_qualifiers): ... This.
> + (TYPES_QUADOP): Rename to...
> + (TYPES_TERNOP_LANE): ... This.
> + (aarch64_simd_expand_args): Return const0_rtx when encountering user
> + error. Change return of 0 to return of NULL_RTX.
> + (aarch64_crc32_expand_builtin): Likewise.
> + (aarch64_expand_builtin): Return NULL_RTX instead of 0.
> + ICE when expanding unknown builtin.
> + * config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
> + TERNOP_LANE qualifiers.
> + (sqdmlsl_lane): Likewise.
> + (sqdmlal_laneq): Likewise.
> + (sqdmlsl_laneq): Likewise.
> + (sqdmlal2_lane): Likewise.
> + (sqdmlsl2_lane): Likewise.
> + (sqdmlal2_laneq): Likewise.
> + (sqdmlsl2_laneq): Likewise.
> + * gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c: New test.
> Index: gcc/config/aarch64/aarch64-builtins.c
> ===================================================================
> --- gcc/config/aarch64/aarch64-builtins.c (revision 223867)
> +++ gcc/config/aarch64/aarch64-builtins.c (working copy)
> @@ -172,10 +172,10 @@ aarch64_types_ternopu_qualifiers[SIMD_MAX_BUILTIN_
> #define TYPES_TERNOPU (aarch64_types_ternopu_qualifiers)
>
> static enum aarch64_type_qualifiers
> -aarch64_types_quadop_qualifiers[SIMD_MAX_BUILTIN_ARGS]
> +aarch64_types_ternop_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
> = { qualifier_none, qualifier_none, qualifier_none,
> - qualifier_none, qualifier_none };
> -#define TYPES_QUADOP (aarch64_types_quadop_qualifiers)
> + qualifier_none, qualifier_immediate };
> +#define TYPES_TERNOP_LANE (aarch64_types_ternop_lane_qualifiers)
>
> static enum aarch64_type_qualifiers
> aarch64_types_getlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
> @@ -818,8 +818,11 @@ aarch64_simd_expand_args (rtx target, int icode, i
> case SIMD_ARG_CONSTANT:
> if (!(*insn_data[icode].operand[argc + have_retval].predicate)
> (op[argc], mode[argc]))
> - error_at (EXPR_LOCATION (exp), "incompatible type for argument %d, "
> + {
> + error_at (EXPR_LOCATION (exp), "incompatible type for argument %d, "
> "expected %<const int%>", argc + 1);
> + return const0_rtx;
> + }
> break;
>
> case SIMD_ARG_STOP:
> @@ -886,7 +889,7 @@ aarch64_simd_expand_args (rtx target, int icode, i
> }
>
> if (!pat)
> - return 0;
> + return NULL_RTX;
>
>> -----Original Message-----
>> From: James Greenhalgh [mailto:james.greenhalgh@arm.com]
>> Sent: Thursday, May 28, 2015 9:58 PM
>> To: weixiangyu
>> Cc: gcc-patches@gcc.gnu.org; Marcus Shawcroft; Richard Earnshaw; Yangfei
>> (Felix)
>> Subject: Re: backport the fixes of PR target/64011 and /61749 to 4.9 gcc
>>
>> On Wed, May 27, 2015 at 03:49:24AM +0100, weixiangyu wrote:
>> > Hi,
>>
>> Hi,
>>
>> > The first patch backports the fix of PR
>> > target/64011(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64011) to
>> > the 4.9 branch from trunk r219717,
>>
>> I can't approve this patch to be backported, so please do not commit it without
>> approval from the appropriate maintainer.
>>
>> > and the second patch backports the fix of PR
>> > target/61749(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61749) to
>> > the 4.9 branch from trunk r215046.
>>
>> This second patch is OK to backport to 4.9. It is a harmelss enough patch which
>> fixes an ICE.
>>
>> Thanks,
>> James
>>
>> > And the second one:
>> >
>> ================================================================
>> ===
>> > --- gcc/ChangeLog-HCC (revision 130589)
>> > +++ gcc/ChangeLog-HCC (revision 130590)
>> > @@ -1,3 +1,29 @@
>> > +2015-05-26 y00166676 <felix.yang@huawei.com>
>> > +
>> > + Backport from trunk r215046.
>> > + 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
>> > +
>> > + PR target/61749
>> > + * config/aarch64/aarch64-builtins.c
>> (aarch64_types_quadop_qualifiers):
>> > + Use qualifier_immediate for last operand. Rename to...
>> > + (aarch64_types_ternop_lane_qualifiers): ... This.
>> > + (TYPES_QUADOP): Rename to...
>> > + (TYPES_TERNOP_LANE): ... This.
>> > + (aarch64_simd_expand_args): Return const0_rtx when
>> encountering user
>> > + error. Change return of 0 to return of NULL_RTX.
>> > + (aarch64_crc32_expand_builtin): Likewise.
>> > + (aarch64_expand_builtin): Return NULL_RTX instead of 0.
>> > + ICE when expanding unknown builtin.
>> > + * config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
>> > + TERNOP_LANE qualifiers.
>> > + (sqdmlsl_lane): Likewise.
>> > + (sqdmlal_laneq): Likewise.
>> > + (sqdmlsl_laneq): Likewise.
>> > + (sqdmlal2_lane): Likewise.
>> > + (sqdmlsl2_lane): Likewise.
>> > + (sqdmlal2_laneq): Likewise.
>> > + (sqdmlsl2_laneq): Likewise.
>> > +
>> > * gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c: New test.
>> >
>>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: backport the fixes of PR target/64011 and /61749 to 4.9 gcc
2015-06-10 10:44 ` Joseph Myers
@ 2015-06-11 12:02 ` weixiangyu
0 siblings, 0 replies; 7+ messages in thread
From: weixiangyu @ 2015-06-11 12:02 UTC (permalink / raw)
To: Joseph Myers
Cc: James Greenhalgh, gcc-patches, Marcus Shawcroft,
Richard Earnshaw, Yangfei (Felix)
[-- Attachment #1: Type: text/plain, Size: 2932 bytes --]
Hi
Patch modified. Use %wu instead of HOST_WIDE_INT_PRINT_UNSIGNED.
Tested ok on aarch64-linux(big-endian and little-endian) with qemu.
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog (revision 223867)
+++ gcc/ChangeLog (working copy)
@@ -1,3 +1,10 @@
+2015-06-11 Xiangyu Wei <weixiangyu@huawei.com>
+
+ Backport from mainline r219717:
+ 2015-01-15 Jiong Wang <jiong.wang@arm.com>
+ PR rtl-optimization/64011
+ * expmed.c (store_bit_field_using_insv): Warn and truncate bitsize when
+ there is partial overflow.
2015-05-28 Mike Frysinger <vapier@gentoo.org>
* config/nios2/linux.h (CPP_SPEC): Define.
Index: gcc/expmed.c
===================================================================
--- gcc/expmed.c (revision 223867)
+++ gcc/expmed.c (working copy)
@@ -540,6 +540,21 @@ store_bit_field_using_insv (const extraction_insn
copy_back = true;
}
+ /* There are similar overflow check at the start of store_bit_field_1,
+ but that only check the situation where the field lies completely
+ outside the register, while there do have situation where the field
+ lies partialy in the register, we need to adjust bitsize for this
+ partial overflow situation. Without this fix, pr48335-2.c on big-endian
+ will broken on those arch support bit insert instruction, like arm, aarch64
+ etc. */
+ if (bitsize + bitnum > unit && bitnum < unit)
+ {
+ warning (OPT_Wextra, "write of %wu-bit data outside the bound of "
+ "destination object, data truncated into %wu-bit",
+ bitsize, unit - bitnum);
+ bitsize = unit - bitnum;
+ }
+
/* If BITS_BIG_ENDIAN is zero on a BYTES_BIG_ENDIAN machine, we count
"backwards" from the size of the unit we are inserting into.
Otherwise, we count bits from the most significant on a
Thanks!
XIangyu Wei
-----Original Message-----
From: Joseph Myers [mailto:joseph@codesourcery.com]
Sent: Wednesday, June 10, 2015 6:18 PM
To: weixiangyu
Cc: James Greenhalgh; gcc-patches@gcc.gnu.org; Marcus Shawcroft; Richard Earnshaw; Richard Earnshaw
Subject: RE: backport the fixes of PR target/64011 and /61749 to 4.9 gcc
On Wed, 10 Jun 2015, weixiangyu wrote:
> + if (bitsize + bitnum > unit && bitnum < unit)
> + {
> + warning (OPT_Wextra, "write of "HOST_WIDE_INT_PRINT_UNSIGNED"bit data "
> + "outside the bound of destination object, data truncated into "
> + HOST_WIDE_INT_PRINT_UNSIGNED"bit", bitsize, unit -
> + bitnum);
HOST_WIDE_INT_PRINT_UNSIGNED is a printf format, which depends on the host and is not suitable for any translatable string, not a format for GCC's pretty printers. Use %wu instead in any call to a GCC diagnostic function. Mainline appears to have this correct.
--
Joseph S. Myers
joseph@codesourcery.com
[-- Attachment #2: pr64011_v2.diff --]
[-- Type: application/octet-stream, Size: 1736 bytes --]
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog (revision 223867)
+++ gcc/ChangeLog (working copy)
@@ -1,3 +1,10 @@
+2015-06-11 Xiangyu Wei <weixiangyu@huawei.com>
+
+ Backport from mainline r219717:
+ 2015-01-15 Jiong Wang <jiong.wang@arm.com>
+ PR rtl-optimization/64011
+ * expmed.c (store_bit_field_using_insv): Warn and truncate bitsize when
+ there is partial overflow.
2015-05-28 Mike Frysinger <vapier@gentoo.org>
* config/nios2/linux.h (CPP_SPEC): Define.
Index: gcc/expmed.c
===================================================================
--- gcc/expmed.c (revision 223867)
+++ gcc/expmed.c (working copy)
@@ -540,6 +540,21 @@ store_bit_field_using_insv (const extraction_insn
copy_back = true;
}
+ /* There are similar overflow check at the start of store_bit_field_1,
+ but that only check the situation where the field lies completely
+ outside the register, while there do have situation where the field
+ lies partialy in the register, we need to adjust bitsize for this
+ partial overflow situation. Without this fix, pr48335-2.c on big-endian
+ will broken on those arch support bit insert instruction, like arm, aarch64
+ etc. */
+ if (bitsize + bitnum > unit && bitnum < unit)
+ {
+ warning (OPT_Wextra, "write of %wu-bit data outside the bound of "
+ "destination object, data truncated into %wu-bit",
+ bitsize, unit - bitnum);
+ bitsize = unit - bitnum;
+ }
+
/* If BITS_BIG_ENDIAN is zero on a BYTES_BIG_ENDIAN machine, we count
"backwards" from the size of the unit we are inserting into.
Otherwise, we count bits from the most significant on a
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: backport the fixes of PR target/64011 and /61749 to 4.9 gcc
2015-06-11 9:35 ` Marcus Shawcroft
@ 2015-06-12 11:11 ` weixiangyu
0 siblings, 0 replies; 7+ messages in thread
From: weixiangyu @ 2015-06-12 11:11 UTC (permalink / raw)
To: Marcus Shawcroft
Cc: James Greenhalgh, gcc-patches, Marcus Shawcroft,
Richard Earnshaw, Yangfei (Felix)
[-- Attachment #1: Type: text/plain, Size: 7354 bytes --]
I didn't drop the test case and i have tested that case on my manchine(aarch64-linux) with qemu.
I am sorry I forgot to add the testcase in the last patch.
A new patch was added to the accessory.
I am a new guy to the community and I will try my best to accord with the norm of the community next time.
Sorry for my careless.
Many thanks
/Xiangyu Wei
> -----Original Message-----
> From: Marcus Shawcroft [mailto:marcus.shawcroft@gmail.com]
> Sent: Thursday, June 11, 2015 5:25 PM
> To: weixiangyu
> Cc: James Greenhalgh; gcc-patches@gcc.gnu.org; Marcus Shawcroft; Richard
> Earnshaw
> Subject: Re: backport the fixes of PR target/64011 and /61749 to 4.9 gcc
>
> On 10 June 2015 at 03:46, weixiangyu <weixiangyu@huawei.com> wrote:
> > Updated patches were attached. Rebased on the latest 4.9 branch.
> > Tested on aarch64-linux (big-endian and little-endian) with qemu.
> > OK for 4.9?
>
>
> Hi,
>
> > And the second one:
>
> The original r215046 mainline commit contains a test case that is omitted from
> the proposed back port, can you elaborate why you have chosen to drop the
> test case?
>
> The usual convention on this list is to post one patch per email such that each
> email thread discusses just one patch.
>
> Thanks
> /Marcus
>
>
> > Index: gcc/ChangeLog
> >
> ================================================================
> ===
> > --- gcc/ChangeLog (revision 223867)
> > +++ gcc/ChangeLog (working copy)
> > @@ -1,3 +1,28 @@
> > +2015-06-09 Xiangyu Wei <weixiangyu@huawei.com>
> > +
> > + Backport from mainline r215046:
> > + 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
> > + PR target/61749
> > + * config/aarch64/aarch64-builtins.c
> (aarch64_types_quadop_qualifiers):
> > + Use qualifier_immediate for last operand. Rename to...
> > + (aarch64_types_ternop_lane_qualifiers): ... This.
> > + (TYPES_QUADOP): Rename to...
> > + (TYPES_TERNOP_LANE): ... This.
> > + (aarch64_simd_expand_args): Return const0_rtx when
> encountering user
> > + error. Change return of 0 to return of NULL_RTX.
> > + (aarch64_crc32_expand_builtin): Likewise.
> > + (aarch64_expand_builtin): Return NULL_RTX instead of 0.
> > + ICE when expanding unknown builtin.
> > + * config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
> > + TERNOP_LANE qualifiers.
> > + (sqdmlsl_lane): Likewise.
> > + (sqdmlal_laneq): Likewise.
> > + (sqdmlsl_laneq): Likewise.
> > + (sqdmlal2_lane): Likewise.
> > + (sqdmlsl2_lane): Likewise.
> > + (sqdmlal2_laneq): Likewise.
> > + (sqdmlsl2_laneq): Likewise.
> > + * gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c: New test.
> > Index: gcc/config/aarch64/aarch64-builtins.c
> >
> ================================================================
> ===
> > --- gcc/config/aarch64/aarch64-builtins.c (revision 223867)
> > +++ gcc/config/aarch64/aarch64-builtins.c (working copy)
> > @@ -172,10 +172,10 @@
> > aarch64_types_ternopu_qualifiers[SIMD_MAX_BUILTIN_
> > #define TYPES_TERNOPU (aarch64_types_ternopu_qualifiers)
> >
> > static enum aarch64_type_qualifiers
> > -aarch64_types_quadop_qualifiers[SIMD_MAX_BUILTIN_ARGS]
> > +aarch64_types_ternop_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
> > = { qualifier_none, qualifier_none, qualifier_none,
> > - qualifier_none, qualifier_none };
> > -#define TYPES_QUADOP (aarch64_types_quadop_qualifiers)
> > + qualifier_none, qualifier_immediate }; #define
> > +TYPES_TERNOP_LANE (aarch64_types_ternop_lane_qualifiers)
> >
> > static enum aarch64_type_qualifiers
> > aarch64_types_getlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
> > @@ -818,8 +818,11 @@ aarch64_simd_expand_args (rtx target, int icode, i
> > case SIMD_ARG_CONSTANT:
> > if (!(*insn_data[icode].operand[argc +
> have_retval].predicate)
> > (op[argc], mode[argc]))
> > - error_at (EXPR_LOCATION (exp), "incompatible type for
> argument %d, "
> > + {
> > + error_at (EXPR_LOCATION (exp), "incompatible type
> for argument %d, "
> > "expected %<const int%>", argc + 1);
> > + return const0_rtx;
> > + }
> > break;
> >
> > case SIMD_ARG_STOP:
> > @@ -886,7 +889,7 @@ aarch64_simd_expand_args (rtx target, int icode, i
> > }
> >
> > if (!pat)
> > - return 0;
> > + return NULL_RTX;
> >
> >> -----Original Message-----
> >> From: James Greenhalgh [mailto:james.greenhalgh@arm.com]
> >> Sent: Thursday, May 28, 2015 9:58 PM
> >> To: weixiangyu
> >> Cc: gcc-patches@gcc.gnu.org; Marcus Shawcroft; Richard Earnshaw;
> >> Yangfei
> >> (Felix)
> >> Subject: Re: backport the fixes of PR target/64011 and /61749 to 4.9
> >> gcc
> >>
> >> On Wed, May 27, 2015 at 03:49:24AM +0100, weixiangyu wrote:
> >> > Hi,
> >>
> >> Hi,
> >>
> >> > The first patch backports the fix of PR
> >> > target/64011(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64011) to
> >> > the 4.9 branch from trunk r219717,
> >>
> >> I can't approve this patch to be backported, so please do not commit
> >> it without approval from the appropriate maintainer.
> >>
> >> > and the second patch backports the fix of PR
> >> > target/61749(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61749) to
> >> > the 4.9 branch from trunk r215046.
> >>
> >> This second patch is OK to backport to 4.9. It is a harmelss enough
> >> patch which fixes an ICE.
> >>
> >> Thanks,
> >> James
> >>
> >> > And the second one:
> >> >
> >>
> ================================================================
> >> ===
> >> > --- gcc/ChangeLog-HCC (revision 130589)
> >> > +++ gcc/ChangeLog-HCC (revision 130590)
> >> > @@ -1,3 +1,29 @@
> >> > +2015-05-26 y00166676 <felix.yang@huawei.com>
> >> > +
> >> > + Backport from trunk r215046.
> >> > + 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
> >> > +
> >> > + PR target/61749
> >> > + * config/aarch64/aarch64-builtins.c
> >> (aarch64_types_quadop_qualifiers):
> >> > + Use qualifier_immediate for last operand. Rename to...
> >> > + (aarch64_types_ternop_lane_qualifiers): ... This.
> >> > + (TYPES_QUADOP): Rename to...
> >> > + (TYPES_TERNOP_LANE): ... This.
> >> > + (aarch64_simd_expand_args): Return const0_rtx when
> >> encountering user
> >> > + error. Change return of 0 to return of NULL_RTX.
> >> > + (aarch64_crc32_expand_builtin): Likewise.
> >> > + (aarch64_expand_builtin): Return NULL_RTX instead of 0.
> >> > + ICE when expanding unknown builtin.
> >> > + * config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
> >> > + TERNOP_LANE qualifiers.
> >> > + (sqdmlsl_lane): Likewise.
> >> > + (sqdmlal_laneq): Likewise.
> >> > + (sqdmlsl_laneq): Likewise.
> >> > + (sqdmlal2_lane): Likewise.
> >> > + (sqdmlsl2_lane): Likewise.
> >> > + (sqdmlal2_laneq): Likewise.
> >> > + (sqdmlsl2_laneq): Likewise.
> >> > +
> >> > * gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c: New test.
> >> >
> >>
> >
[-- Attachment #2: pr61749_v2.diff --]
[-- Type: application/octet-stream, Size: 6091 bytes --]
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog (revision 223867)
+++ gcc/ChangeLog (working copy)
@@ -1,3 +1,28 @@
+2015-06-10 Xiangyu Wei <weixiangyu@huawei.com>
+
+ Backport from mainline r215046.
+ PR target/61749
+ 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+ * config/aarch64/aarch64-builtins.c (aarch64_types_quadop_qualifiers):
+ Use qualifier_immediate for last operand. Rename to...
+ (aarch64_types_ternop_lane_qualifiers): ... This.
+ (TYPES_QUADOP): Rename to...
+ (TYPES_TERNOP_LANE): ... This.
+ (aarch64_simd_expand_args): Return const0_rtx when encountering user
+ error. Change return of 0 to return of NULL_RTX.
+ (aarch64_crc32_expand_builtin): Likewise.
+ (aarch64_expand_builtin): Return NULL_RTX instead of 0.
+ ICE when expanding unknown builtin.
+ * config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
+ TERNOP_LANE qualifiers.
+ (sqdmlsl_lane): Likewise.
+ (sqdmlal_laneq): Likewise.
+ (sqdmlsl_laneq): Likewise.
+ (sqdmlal2_lane): Likewise.
+ (sqdmlsl2_lane): Likewise.
+ (sqdmlal2_laneq): Likewise.
+ (sqdmlsl2_laneq): Likewise.
+
2015-05-28 Mike Frysinger <vapier@gentoo.org>
* config/nios2/linux.h (CPP_SPEC): Define.
Index: gcc/testsuite/ChangeLog
===================================================================
--- gcc/testsuite/ChangeLog (revision 223867)
+++ gcc/testsuite/ChangeLog (working copy)
@@ -1,3 +1,11 @@
+2015-06-12 Xiangyu Wei <weixiangyu@huawei.com>
+
+ Backport from mainline r215046:
+ PR target/61749
+ 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com
+
+ * gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c: New test.
+
2015-05-26 Rohit Arul Raj <rohitarulraj@freescale.com>
Backported from mainline
Index: gcc/config/aarch64/aarch64-builtins.c
===================================================================
--- gcc/config/aarch64/aarch64-builtins.c (revision 223867)
+++ gcc/config/aarch64/aarch64-builtins.c (working copy)
@@ -172,10 +172,10 @@ aarch64_types_ternopu_qualifiers[SIMD_MAX_BUILTIN_
#define TYPES_TERNOPU (aarch64_types_ternopu_qualifiers)
static enum aarch64_type_qualifiers
-aarch64_types_quadop_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+aarch64_types_ternop_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_none, qualifier_none, qualifier_none,
- qualifier_none, qualifier_none };
-#define TYPES_QUADOP (aarch64_types_quadop_qualifiers)
+ qualifier_none, qualifier_immediate };
+#define TYPES_TERNOP_LANE (aarch64_types_ternop_lane_qualifiers)
static enum aarch64_type_qualifiers
aarch64_types_getlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
@@ -818,8 +818,11 @@ aarch64_simd_expand_args (rtx target, int icode, i
case SIMD_ARG_CONSTANT:
if (!(*insn_data[icode].operand[argc + have_retval].predicate)
(op[argc], mode[argc]))
- error_at (EXPR_LOCATION (exp), "incompatible type for argument %d, "
+ {
+ error_at (EXPR_LOCATION (exp), "incompatible type for argument %d, "
"expected %<const int%>", argc + 1);
+ return const0_rtx;
+ }
break;
case SIMD_ARG_STOP:
@@ -886,7 +889,7 @@ aarch64_simd_expand_args (rtx target, int icode, i
}
if (!pat)
- return 0;
+ return NULL_RTX;
emit_insn (pat);
@@ -968,7 +971,7 @@ aarch64_expand_builtin (tree exp,
if (fcode >= AARCH64_SIMD_BUILTIN_BASE)
return aarch64_simd_expand_builtin (fcode, exp, target);
- return NULL_RTX;
+ gcc_unreachable ();
}
tree
Index: gcc/config/aarch64/aarch64-simd-builtins.def
===================================================================
--- gcc/config/aarch64/aarch64-simd-builtins.def (revision 223867)
+++ gcc/config/aarch64/aarch64-simd-builtins.def (working copy)
@@ -145,16 +145,16 @@
BUILTIN_VSDQ_I_BHSI (UNOP, sqabs, 0)
BUILTIN_VSDQ_I_BHSI (UNOP, sqneg, 0)
- BUILTIN_VSD_HSI (QUADOP, sqdmlal_lane, 0)
- BUILTIN_VSD_HSI (QUADOP, sqdmlsl_lane, 0)
- BUILTIN_VSD_HSI (QUADOP, sqdmlal_laneq, 0)
- BUILTIN_VSD_HSI (QUADOP, sqdmlsl_laneq, 0)
+BUILTIN_VSD_HSI (TERNOP_LANE, sqdmlal_lane, 0)
+BUILTIN_VSD_HSI (TERNOP_LANE, sqdmlsl_lane, 0)
+BUILTIN_VSD_HSI (TERNOP_LANE, sqdmlal_laneq, 0)
+BUILTIN_VSD_HSI (TERNOP_LANE, sqdmlsl_laneq, 0)
BUILTIN_VQ_HSI (TERNOP, sqdmlal2, 0)
BUILTIN_VQ_HSI (TERNOP, sqdmlsl2, 0)
- BUILTIN_VQ_HSI (QUADOP, sqdmlal2_lane, 0)
- BUILTIN_VQ_HSI (QUADOP, sqdmlsl2_lane, 0)
- BUILTIN_VQ_HSI (QUADOP, sqdmlal2_laneq, 0)
- BUILTIN_VQ_HSI (QUADOP, sqdmlsl2_laneq, 0)
+BUILTIN_VQ_HSI (TERNOP_LANE, sqdmlal2_lane, 0)
+BUILTIN_VQ_HSI (TERNOP_LANE, sqdmlsl2_lane, 0)
+BUILTIN_VQ_HSI (TERNOP_LANE, sqdmlal2_laneq, 0)
+BUILTIN_VQ_HSI (TERNOP_LANE, sqdmlsl2_laneq, 0)
BUILTIN_VQ_HSI (TERNOP, sqdmlal2_n, 0)
BUILTIN_VQ_HSI (TERNOP, sqdmlsl2_n, 0)
/* Implemented by aarch64_sqdml<SBINQOPS:as>l<mode>. */
Index: gcc/testsuite/gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c
===================================================================
+++ gcc/testsuite/gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c (working copy)
@@ -0,0 +1,54 @@
+/* { dg-do compile } */
+
+#include "arm_neon.h"
+
+int32x4_t
+foo (int32x4_t a, int16x4_t b, int16x4_t c, int d)
+{
+ return vqdmlal_lane_s16 (a, b, c, d);
+}
+
+int32x4_t
+foo1 (int32x4_t a, int16x4_t b, int16x8_t c, int d)
+{
+ return vqdmlal_laneq_s16 (a, b, c, d);
+}
+
+int32x4_t
+foo2 (int32x4_t a, int16x4_t b, int16x4_t c, int d)
+{
+ return vqdmlsl_lane_s16 (a, b, c, d);
+}
+
+int32x4_t
+foo3 (int32x4_t a, int16x4_t b, int16x8_t c, int d)
+{
+ return vqdmlsl_laneq_s16 (a, b, c, d);
+}
+
+int32x4_t
+foo4 (int32x4_t a, int16x8_t b, int16x4_t c, int d)
+{
+ return vqdmlal_high_lane_s16 (a, b, c, d);
+}
+
+int32x4_t
+foo5 (int32x4_t a, int16x8_t b, int16x4_t c, int d)
+{
+ return vqdmlsl_high_lane_s16 (a, b, c, d);
+}
+
+int32x4_t
+foo6 (int32x4_t a, int16x8_t b, int16x8_t c, int d)
+{
+ return vqdmlal_high_laneq_s16 (a, b, c, d);
+}
+
+int32x4_t
+foo7 (int32x4_t a, int16x8_t b, int16x8_t c, int d)
+{
+ return vqdmlsl_high_laneq_s16 (a, b, c, d);
+}
+
+
+/* { dg-excess-errors "incompatible type for argument" } */
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2015-06-12 11:05 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-05-27 5:28 backport the fixes of PR target/64011 and /61749 to 4.9 gcc weixiangyu
2015-05-28 14:09 ` James Greenhalgh
2015-06-10 3:26 ` weixiangyu
2015-06-10 10:44 ` Joseph Myers
2015-06-11 12:02 ` weixiangyu
2015-06-11 9:35 ` Marcus Shawcroft
2015-06-12 11:11 ` weixiangyu
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).