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From: will schmidt <will_schmidt@vnet.ibm.com>
To: Peter Bergner <bergner@linux.ibm.com>
Cc: Segher Boessenkool <segher@kernel.crashing.org>,
	Bill Schmidt <wschmidt@linux.ibm.com>,
	GCC Patches <gcc-patches@gcc.gnu.org>,
	David Edelsohn <dje.gcc@gmail.com>,
	Michael Meissner <meissner@linux.ibm.com>
Subject: Re: [PATCH 1/3] rs6000: Add base support and types for defining MMA built-ins.
Date: Tue, 16 Jun 2020 16:32:09 -0500	[thread overview]
Message-ID: <8978f54c656fc3a155447ecb81fcc582d32368eb.camel@vnet.ibm.com> (raw)
In-Reply-To: <3ffd5909-3638-55c2-c888-7ed66556277b@linux.ibm.com>

On Tue, 2020-06-16 at 13:59 -0500, Peter Bergner wrote:
> On 6/15/20 5:43 PM, will schmidt wrote:
> > On Mon, 2020-06-15 at 14:56 -0500, Peter Bergner via Gcc-patches wrote:
> > > 	* config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
> > > 	OPTION_MASK_MMA.
> > > 	(POWERPC_MASKS): Likewise.
> > 
> > Don't see POWERPC_MASKS in the patch here.
> 
> It's this hunk:
> 
>  /* Support for a future processor's features.  */
> @@ -132,6 +133,7 @@
>  				 | OPTION_MASK_HTM			\
>  				 | OPTION_MASK_ISEL			\
>  				 | OPTION_MASK_MFCRF			\
> +				 | OPTION_MASK_MMA			\
>  				 | OPTION_MASK_MODULO			\
>  				 | OPTION_MASK_MULHW			\
>  				 | OPTION_MASK_NO_UPDATE		\
> 

I see it now, my bad.  (#define POWERPC_MASKS was outside of the diff
context).  :-)


> 
> 
> 
> > > +;; Vector load/store pair operations
> > 
> > Probably clear later on.  First blush and first pass a blurb here to
> > clarify MMA, and what the modes are may be useful.
> > 
> > The subsection paragraph from the extend.texi may be a good fit).
> 
> [snip]
> > > +;; We need to define an OImode move pattern, even though we don't
> > > enable it,
> > > +;; because the machine independent parts of the compiler at times
> > > uses the
> > > +;; large integer modes.
> > > +;;
> > > +;; If we enable movoi, the compiler will try and use
> > > it.  Unfortunately, if it
> > > +;; is enabled, it will cause problems on little endian systems with
> > > code that
> > > +;; uses the vector_size attribute, due to endian issues.
> > 
> > So, maybe rearrange as two lines?
> > 
> > Define a (disabled) OImode move pattern so the machine independent
> > parts of the compare can use the large integer modes.
> > FIXME: If the OImove pattern is enabled, LE systems will have problems
> > with the vector_size attribute.
> 
> Ok, I'll take a stab at rewording this.
> 
> 
> > > +(define_expand "movoi"
> > > +  [(set (match_operand:OI 0 "nonimmediate_operand")
> > > +	(match_operand:OI 1 "input_operand"))]
> > > +  "0"
> > > +{
> > > +  gcc_unreachable ();
> > > +})
> > 
> > Is it the "0" or the _unreachable() that 'disables' this? 
> 
> It's the "0" condition flag that disables it.  The gcc_unreachable() call
> is just used to verify we never do.


Ok,
Thanks,
-Will



> 
> 
> Peter
> 


  reply	other threads:[~2020-06-16 21:32 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-15 19:54 [PATCH 0/3] rs6000: Add support for Matrix-Multiply Assist (MMA) built-in functions Peter Bergner
2020-06-15 19:56 ` [PATCH 1/3] rs6000: Add base support and types for defining MMA built-ins Peter Bergner
2020-06-15 22:43   ` will schmidt
2020-06-16 18:59     ` Peter Bergner
2020-06-16 21:32       ` will schmidt [this message]
2020-06-15 19:58 ` [PATCH 2/3] rs6000: Add MMA built-in function definitions Peter Bergner
2020-06-15 22:43   ` will schmidt
2020-06-16 19:02     ` Peter Bergner
2020-06-16 20:30       ` Segher Boessenkool
2020-06-16 21:16         ` Peter Bergner
2020-06-15 19:59 ` [PATCH 3/3] rs6000: Add testsuite test cases for MMA built-ins Peter Bergner
2020-06-15 22:43   ` will schmidt

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