* Ping: [PATCH] x86/AVX512: improve generated code for mask-to-vector-register conversions
@ 2019-07-18 16:23 Jan Beulich
2019-07-22 18:17 ` Jeff Law
0 siblings, 1 reply; 2+ messages in thread
From: Jan Beulich @ 2019-07-18 16:23 UTC (permalink / raw)
To: ubizjak, hubicka, Kirill Yukhin; +Cc: gcc-patches
>>> On 27.06.19 at 10:59, wrote:
> Conversion of comparison results to full vectors does, when VPMOVM2* are
> unavailable, not require any intermediate VMOVDQ{A,U}*: Simply use
> embedded masking on VPTERNLOG* right away, which is available with
> AVX512F (while VPMOVM2{D,Q} are available only with AVX512DQ).
>
> Note that the chosen immediate is only one of many possible ones; I was
> trying to make the insn here distinguishable from the pre-existing uses
> of vpternlog.
>
> gcc/
> 2019-06-27 Jan Beulich <jbeulich@suse.com>
>
> * config/i386/sse.md (<avx512>_cvtmask2<ssemodesuffix><mode>):
> Require only AVX512F.
> (*<avx512>_cvtmask2<ssemodesuffix><mode>): Likewise. Add
> alternative expanding to vpternlog.
>
> --- a/gcc/config/i386/sse.md
> +++ b/gcc/config/i386/sse.md
> @@ -6395,21 +6395,25 @@
> (match_dup 2)
> (match_dup 3)
> (match_operand:<avx512fmaskmode> 1 "register_operand")))]
> - "TARGET_AVX512DQ"
> + "TARGET_AVX512F"
> "{
> operands[2] = CONSTM1_RTX (<MODE>mode);
> operands[3] = CONST0_RTX (<MODE>mode);
> }")
>
> (define_insn "*<avx512>_cvtmask2<ssemodesuffix><mode>"
> - [(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
> + [(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v,v")
> (vec_merge:VI48_AVX512VL
> (match_operand:VI48_AVX512VL 2 "vector_all_ones_operand")
> (match_operand:VI48_AVX512VL 3 "const0_operand")
> - (match_operand:<avx512fmaskmode> 1 "register_operand" "k")))]
> - "TARGET_AVX512DQ"
> - "vpmovm2<ssemodesuffix>\t{%1, %0|%0, %1}"
> - [(set_attr "prefix" "evex")
> + (match_operand:<avx512fmaskmode> 1 "register_operand" "k,Yk")))]
> + "TARGET_AVX512F"
> + "@
> + vpmovm2<ssemodesuffix>\t{%1, %0|%0, %1}
> + vpternlog<ssemodesuffix>\t{$0x81, %0, %0, %0%{%1%}%{z%}|%0%{%1%}%{z%}, %0, %0, 0x81}"
> + [(set_attr "isa" "avx512dq,*")
> + (set_attr "length_immediate" "0,1")
> + (set_attr "prefix" "evex")
> (set_attr "mode" "<sseinsnmode>")])
>
> (define_insn "sse2_cvtps2pd<mask_name>"
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: Ping: [PATCH] x86/AVX512: improve generated code for mask-to-vector-register conversions
2019-07-18 16:23 Ping: [PATCH] x86/AVX512: improve generated code for mask-to-vector-register conversions Jan Beulich
@ 2019-07-22 18:17 ` Jeff Law
0 siblings, 0 replies; 2+ messages in thread
From: Jeff Law @ 2019-07-22 18:17 UTC (permalink / raw)
To: Jan Beulich, ubizjak, hubicka, Kirill Yukhin; +Cc: gcc-patches
On 7/18/19 10:07 AM, Jan Beulich wrote:
>>>> On 27.06.19 at 10:59, wrote:
>> Conversion of comparison results to full vectors does, when VPMOVM2* are
>> unavailable, not require any intermediate VMOVDQ{A,U}*: Simply use
>> embedded masking on VPTERNLOG* right away, which is available with
>> AVX512F (while VPMOVM2{D,Q} are available only with AVX512DQ).
>>
>> Note that the chosen immediate is only one of many possible ones; I was
>> trying to make the insn here distinguishable from the pre-existing uses
>> of vpternlog.
>>
>> gcc/
>> 2019-06-27 Jan Beulich <jbeulich@suse.com>
>>
>> * config/i386/sse.md (<avx512>_cvtmask2<ssemodesuffix><mode>):
>> Require only AVX512F.
>> (*<avx512>_cvtmask2<ssemodesuffix><mode>): Likewise. Add
>> alternative expanding to vpternlog.
OK
jeff
^ permalink raw reply [flat|nested] 2+ messages in thread
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2019-07-18 16:23 Ping: [PATCH] x86/AVX512: improve generated code for mask-to-vector-register conversions Jan Beulich
2019-07-22 18:17 ` Jeff Law
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