From: Jeff Law <jeffreyalaw@gmail.com>
To: Palmer Dabbelt <palmer@dabbelt.com>
Cc: gcc-patches@gcc.gnu.org, pan2.li@intel.com,
yanzhang.wang@intel.com, juzhe.zhong@rivai.ai,
kito.cheng@sifive.com
Subject: Re: [PATCH] RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMSET
Date: Sat, 29 Apr 2023 11:52:50 -0600 [thread overview]
Message-ID: <89831580-fc21-f769-2f50-fffe57e8afe1@gmail.com> (raw)
In-Reply-To: <mhng-4a07f7f0-e84b-44f4-a62e-7d6c286f9a02@palmer-ri-x1c9a>
On 4/29/23 11:48, Palmer Dabbelt wrote:
>> Yea. And taking advantage of that behavior is definitely a performance
>> issue for QEMU. There's still work to do though. QEMU on vector code
>> is running crazy slow.
>
> I guess we're kind of off the rails for a GCC patch, but that's
> definately true. Across the board RVV is going to just need a lot of
> work, it's very different than SVE or AVX.
>
> Unfortunately QEMU performance isn't really a priority on our end, but
> it's great to see folks digging into it.
Well, when a user mode SPEC run goes from ~15 minutes to multiple hours
for a single input workload within specint it becomes a development
problem. Daniel is loosely affiliated with my group in Ventana, so I
can bug him with this kind of stuff.
jeff
next prev parent reply other threads:[~2023-04-29 17:52 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-28 15:21 pan2.li
2023-04-28 21:47 ` Jeff Law
2023-04-29 2:55 ` Li, Pan2
2023-04-29 13:35 ` Li, Pan2
2023-04-29 15:05 ` Jeff Law
2023-04-29 17:21 ` Andrew Waterman
2023-04-29 17:28 ` Palmer Dabbelt
2023-04-29 17:46 ` Jeff Law
2023-04-29 17:48 ` Palmer Dabbelt
2023-04-29 17:52 ` Jeff Law [this message]
2023-04-29 18:15 ` Palmer Dabbelt
2023-04-29 17:49 ` Jeff Law
2023-04-30 1:40 ` Kito Cheng
2023-04-30 14:21 ` Li, Pan2
2023-05-02 16:28 ` Jeff Law
2023-05-03 11:17 ` Li, Pan2
2023-05-05 12:30 ` Li, Pan2
2023-05-05 12:37 ` Kito Cheng
2023-05-05 12:45 ` Li, Pan2
2023-05-05 14:51 ` Kito Cheng
2023-04-29 13:32 ` [PATCH v2] " pan2.li
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