From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id D87563871024 for ; Fri, 16 Jul 2021 18:16:41 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org D87563871024 Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 16GI4d0K048262; Fri, 16 Jul 2021 14:16:41 -0400 Received: from ppma02dal.us.ibm.com (a.bd.3ea9.ip4.static.sl-reverse.com [169.62.189.10]) by mx0a-001b2d01.pphosted.com with ESMTP id 39ueb4sh9v-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Jul 2021 14:16:40 -0400 Received: from pps.filterd (ppma02dal.us.ibm.com [127.0.0.1]) by ppma02dal.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 16GI8hes013819; Fri, 16 Jul 2021 18:16:40 GMT Received: from b01cxnp23032.gho.pok.ibm.com (b01cxnp23032.gho.pok.ibm.com [9.57.198.27]) by ppma02dal.us.ibm.com with ESMTP id 39qt3f31qr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Jul 2021 18:16:40 +0000 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 16GIGde845678928 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 16 Jul 2021 18:16:39 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 331C5B2067; Fri, 16 Jul 2021 18:16:39 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CB8DAB206E; Fri, 16 Jul 2021 18:16:38 +0000 (GMT) Received: from Bills-MacBook-Pro.local (unknown [9.211.124.44]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 16 Jul 2021 18:16:38 +0000 (GMT) Reply-To: wschmidt@linux.ibm.com Subject: Re: [PATCH v2 2/6] rs6000: Add tests for SSE4.1 "blend" intrinsics To: "Paul A. Clarke" , gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org References: <20210716135022.489455-1-pc@us.ibm.com> <20210716135022.489455-3-pc@us.ibm.com> From: Bill Schmidt Message-ID: <8f150cee-2e3d-e114-e21d-a590876c2bc6@linux.ibm.com> Date: Fri, 16 Jul 2021 13:16:38 -0500 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <20210716135022.489455-3-pc@us.ibm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-GB X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: ENdSEJlVyBjIzY66nNqwHL1JTr62iaDz X-Proofpoint-GUID: ENdSEJlVyBjIzY66nNqwHL1JTr62iaDz X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-07-16_06:2021-07-16, 2021-07-16 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 lowpriorityscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 bulkscore=0 suspectscore=0 phishscore=0 malwarescore=0 adultscore=0 mlxlogscore=999 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104190000 definitions=main-2107160111 X-Spam-Status: No, score=-12.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, NICE_REPLY_A, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Jul 2021 18:16:44 -0000 Hi Paul, Thanks for the cleanup, LGTM!  Recommend maintainers approve. Bill On 7/16/21 8:50 AM, Paul A. Clarke wrote: > Copy the tests for _mm_blend_pd, _mm_blendv_pd, _mm_blend_ps, > _mm_blendv_ps from gcc/testsuite/gcc.target/i386. > > 2021-07-16 Paul A. Clarke > > gcc/testsuite > * gcc.target/powerpc/sse4_1-blendpd.c: Copy from gcc.target/i386. > * gcc.target/powerpc/sse4_1-blendps-2.c: Likewise. > * gcc.target/powerpc/sse4_1-blendps.c: Likewise. > * gcc.target/powerpc/sse4_1-blendvpd.c: Likewise. > --- > v2: Improve formatting per review from Bill. > > .../gcc.target/powerpc/sse4_1-blendpd.c | 89 ++++++++++++++++++ > .../gcc.target/powerpc/sse4_1-blendps-2.c | 81 +++++++++++++++++ > .../gcc.target/powerpc/sse4_1-blendps.c | 90 +++++++++++++++++++ > .../gcc.target/powerpc/sse4_1-blendvpd.c | 65 ++++++++++++++ > 4 files changed, 325 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/powerpc/sse4_1-blendpd.c > create mode 100644 gcc/testsuite/gcc.target/powerpc/sse4_1-blendps-2.c > create mode 100644 gcc/testsuite/gcc.target/powerpc/sse4_1-blendps.c > create mode 100644 gcc/testsuite/gcc.target/powerpc/sse4_1-blendvpd.c > > diff --git a/gcc/testsuite/gcc.target/powerpc/sse4_1-blendpd.c b/gcc/testsuite/gcc.target/powerpc/sse4_1-blendpd.c > new file mode 100644 > index 000000000000..ca1780471fa2 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/sse4_1-blendpd.c > @@ -0,0 +1,89 @@ > +/* { dg-do run } */ > +/* { dg-require-effective-target p8vector_hw } */ > +/* { dg-options "-O2 -mpower8-vector -Wno-psabi" } */ > + > +#ifndef CHECK_H > +#define CHECK_H "sse4_1-check.h" > +#endif > + > +#ifndef TEST > +#define TEST sse4_1_test > +#endif > + > +#include CHECK_H > + > +#include > +#include > + > +#define NUM 20 > + > +#ifndef MASK > +#define MASK 0x03 > +#endif > + > +static void > +init_blendpd (double *src1, double *src2) > +{ > + int i, sign = 1; > + > + for (i = 0; i < NUM * 2; i++) > + { > + src1[i] = i * i * sign; > + src2[i] = (i + 20) * sign; > + sign = -sign; > + } > +} > + > +static int > +check_blendpd (__m128d *dst, double *src1, double *src2) > +{ > + double tmp[2]; > + int j; > + > + memcpy (&tmp[0], src1, sizeof (tmp)); > + > + for(j = 0; j < 2; j++) > + if ((MASK & (1 << j))) > + tmp[j] = src2[j]; > + > + return memcmp (dst, &tmp[0], sizeof (tmp)); > +} > + > +static void > +TEST (void) > +{ > + __m128d x, y; > + union > + { > + __m128d x[NUM]; > + double d[NUM * 2]; > + } dst, src1, src2; > + union > + { > + __m128d x; > + double d[2]; > + } src3; > + int i; > + > + init_blendpd (src1.d, src2.d); > + > + /* Check blendpd imm8, m128, xmm */ > + for (i = 0; i < NUM; i++) > + { > + dst.x[i] = _mm_blend_pd (src1.x[i], src2.x[i], MASK); > + if (check_blendpd (&dst.x[i], &src1.d[i * 2], &src2.d[i * 2])) > + abort (); > + } > + > + /* Check blendpd imm8, xmm, xmm */ > + src3.x = _mm_setzero_pd (); > + > + x = _mm_blend_pd (dst.x[2], src3.x, MASK); > + y = _mm_blend_pd (src3.x, dst.x[2], MASK); > + > + if (check_blendpd (&x, &dst.d[4], &src3.d[0])) > + abort (); > + > + if (check_blendpd (&y, &src3.d[0], &dst.d[4])) > + abort (); > +} > diff --git a/gcc/testsuite/gcc.target/powerpc/sse4_1-blendps-2.c b/gcc/testsuite/gcc.target/powerpc/sse4_1-blendps-2.c > new file mode 100644 > index 000000000000..768b6e64bbae > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/sse4_1-blendps-2.c > @@ -0,0 +1,81 @@ > +/* { dg-do run } */ > +/* { dg-require-effective-target p8vector_hw } */ > +/* { dg-options "-O2 -mpower8-vector -Wno-psabi" } */ > + > +#include "sse4_1-check.h" > + > +#include > +#include > +#include > + > +#define NUM 20 > + > +#undef MASK > +#define MASK 0xe > + > +static void > +init_blendps (float *src1, float *src2) > +{ > + int i, sign = 1; > + > + for (i = 0; i < NUM * 4; i++) > + { > + src1[i] = i * i * sign; > + src2[i] = (i + 20) * sign; > + sign = -sign; > + } > +} > + > +static int > +check_blendps (__m128 *dst, float *src1, float *src2) > +{ > + float tmp[4]; > + int j; > + > + memcpy (&tmp[0], src1, sizeof (tmp)); > + for (j = 0; j < 4; j++) > + if ((MASK & (1 << j))) > + tmp[j] = src2[j]; > + > + return memcmp (dst, &tmp[0], sizeof (tmp)); > +} > + > +static void > +sse4_1_test (void) > +{ > + __m128 x, y; > + union > + { > + __m128 x[NUM]; > + float f[NUM * 4]; > + } dst, src1, src2; > + union > + { > + __m128 x; > + float f[4]; > + } src3; > + int i; > + > + init_blendps (src1.f, src2.f); > + > + for (i = 0; i < 4; i++) > + src3.f[i] = (int) rand (); > + > + /* Check blendps imm8, m128, xmm */ > + for (i = 0; i < NUM; i++) > + { > + dst.x[i] = _mm_blend_ps (src1.x[i], src2.x[i], MASK); > + if (check_blendps (&dst.x[i], &src1.f[i * 4], &src2.f[i * 4])) > + abort (); > + } > + > + /* Check blendps imm8, xmm, xmm */ > + x = _mm_blend_ps (dst.x[2], src3.x, MASK); > + y = _mm_blend_ps (src3.x, dst.x[2], MASK); > + > + if (check_blendps (&x, &dst.f[8], &src3.f[0])) > + abort (); > + > + if (check_blendps (&y, &src3.f[0], &dst.f[8])) > + abort (); > +} > diff --git a/gcc/testsuite/gcc.target/powerpc/sse4_1-blendps.c b/gcc/testsuite/gcc.target/powerpc/sse4_1-blendps.c > new file mode 100644 > index 000000000000..2f114b69a84b > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/sse4_1-blendps.c > @@ -0,0 +1,90 @@ > +/* { dg-do run } */ > +/* { dg-require-effective-target p8vector_hw } */ > +/* { dg-options "-O2 -mpower8-vector -Wno-psabi" } */ > + > +#ifndef CHECK_H > +#define CHECK_H "sse4_1-check.h" > +#endif > + > +#ifndef TEST > +#define TEST sse4_1_test > +#endif > + > +#include CHECK_H > + > +#include > +#include > +#include > + > +#define NUM 20 > + > +#ifndef MASK > +#define MASK 0x0f > +#endif > + > +static void > +init_blendps (float *src1, float *src2) > +{ > + int i, sign = 1; > + > + for (i = 0; i < NUM * 4; i++) > + { > + src1[i] = i * i * sign; > + src2[i] = (i + 20) * sign; > + sign = -sign; > + } > +} > + > +static int > +check_blendps (__m128 *dst, float *src1, float *src2) > +{ > + float tmp[4]; > + int j; > + > + memcpy (&tmp[0], src1, sizeof (tmp)); > + for (j = 0; j < 4; j++) > + if ((MASK & (1 << j))) > + tmp[j] = src2[j]; > + > + return memcmp (dst, &tmp[0], sizeof (tmp)); > +} > + > +static void > +TEST (void) > +{ > + __m128 x, y; > + union > + { > + __m128 x[NUM]; > + float f[NUM * 4]; > + } dst, src1, src2; > + union > + { > + __m128 x; > + float f[4]; > + } src3; > + int i; > + > + init_blendps (src1.f, src2.f); > + > + for (i = 0; i < 4; i++) > + src3.f[i] = (int) rand (); > + > + /* Check blendps imm8, m128, xmm */ > + for (i = 0; i < NUM; i++) > + { > + dst.x[i] = _mm_blend_ps (src1.x[i], src2.x[i], MASK); > + if (check_blendps (&dst.x[i], &src1.f[i * 4], &src2.f[i * 4])) > + abort (); > + } > + > + /* Check blendps imm8, xmm, xmm */ > + x = _mm_blend_ps (dst.x[2], src3.x, MASK); > + y = _mm_blend_ps (src3.x, dst.x[2], MASK); > + > + if (check_blendps (&x, &dst.f[8], &src3.f[0])) > + abort (); > + > + if (check_blendps (&y, &src3.f[0], &dst.f[8])) > + abort (); > +} > diff --git a/gcc/testsuite/gcc.target/powerpc/sse4_1-blendvpd.c b/gcc/testsuite/gcc.target/powerpc/sse4_1-blendvpd.c > new file mode 100644 > index 000000000000..b82cd28848a6 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/sse4_1-blendvpd.c > @@ -0,0 +1,65 @@ > +/* { dg-do run } */ > +/* { dg-require-effective-target p8vector_hw } */ > +/* { dg-options "-O2 -mpower8-vector -Wno-psabi" } */ > + > +#include "sse4_1-check.h" > + > +#include > +#include > + > +#define NUM 20 > + > +static void > +init_blendvpd (double *src1, double *src2, double *mask) > +{ > + int i, msk, sign = 1; > + > + msk = -1; > + for (i = 0; i < NUM * 2; i++) > + { > + if((i % 2) == 0) > + msk++; > + src1[i] = i* (i + 1) * sign; > + src2[i] = (i + 20) * sign; > + mask[i] = (i + 120) * i; > + if( (msk & (1 << (i % 2)))) > + mask[i] = -mask[i]; > + sign = -sign; > + } > +} > + > +static int > +check_blendvpd (__m128d *dst, double *src1, double *src2, > + double *mask) > +{ > + double tmp[2]; > + int j; > + > + memcpy (&tmp[0], src1, sizeof (tmp)); > + for (j = 0; j < 2; j++) > + if (mask [j] < 0.0) > + tmp[j] = src2[j]; > + > + return memcmp (dst, &tmp[0], sizeof (tmp)); > +} > + > +static void > +sse4_1_test (void) > +{ > + union > + { > + __m128d x[NUM]; > + double d[NUM * 2]; > + } dst, src1, src2, mask; > + int i; > + > + init_blendvpd (src1.d, src2.d, mask.d); > + > + for (i = 0; i < NUM; i++) > + { > + dst.x[i] = _mm_blendv_pd (src1.x[i], src2.x[i], mask.x[i]); > + if (check_blendvpd (&dst.x[i], &src1.d[i * 2], &src2.d[i * 2], > + &mask.d[i * 2])) > + abort (); > + } > +}