From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from xry111.site (xry111.site [IPv6:2001:470:683e::1]) by sourceware.org (Postfix) with ESMTPS id 293303858402 for ; Wed, 6 Sep 2023 11:10:33 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 293303858402 Authentication-Results: sourceware.org; dmarc=pass (p=reject dis=none) header.from=xry111.site Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=xry111.site DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xry111.site; s=default; t=1693998631; bh=D9R6loV5YT/ZwQylK+XydwpO5oxTH9PE30RiAtsaEwg=; h=Subject:From:To:Cc:Date:In-Reply-To:References:From; b=DARpFZrFFblRSX7n/EHC+GMTvcOIGHrZP+foC1mYzpTOjUb9o2J0sviUy5N+Rer3f pT85diqkZdeU7aY6pB/ytCiU0aNV0SMmdyKxFHswHAwH/q1HZnx5HEvSCGfjctc811 ZvMDZ52CkrDI32aw64SYxTTLgJ9synycU4TiQdJ0= Received: from localhost.localdomain (xry111.site [IPv6:2001:470:683e::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature ECDSA (P-384) server-digest SHA384) (Client did not present a certificate) (Authenticated sender: xry111@xry111.site) by xry111.site (Postfix) with ESMTPSA id 367CF6599B; Wed, 6 Sep 2023 07:10:30 -0400 (EDT) Message-ID: <923e96652d4310b2b4a6e4b38c6f5a3bde2c852d.camel@xry111.site> Subject: Re: [PATCH v1 1/4] LoongArch: Add tests of -mstrict-align option. From: Xi Ruoyao To: Xiaolong Chen , gcc-patches@gcc.gnu.org Cc: i@xen0n.name, xuchenghua@loongson.cn, chenglulu@loongson.cn Date: Wed, 06 Sep 2023 19:10:28 +0800 In-Reply-To: <20230906104307.37244-2-chenxiaolong@loongson.cn> References: <20230906104307.37244-1-chenxiaolong@loongson.cn> <20230906104307.37244-2-chenxiaolong@loongson.cn> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.48.4 MIME-Version: 1.0 X-Spam-Status: No, score=-6.3 required=5.0 tests=BAYES_00,BODY_8BITS,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,KAM_SHORT,LIKELY_SPAM_FROM,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Wed, 2023-09-06 at 18:43 +0800, Xiaolong Chen wrote: > gcc/testsuite/ChangeLog: >=20 > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0* gcc.target/loongarch/st= rict-align.c: New test. A question: is there really a CPU model with LSX/LASX but without unaligned access support? If not I think we'd just reject -mstrict- align -mlsx. Currently Glibc assumes if LSX is available then unaligned access must be available too. > --- > =C2=A0gcc/testsuite/gcc.target/loongarch/strict-align.c | 13 ++++++++++++= + > =C2=A01 file changed, 13 insertions(+) > =C2=A0create mode 100644 gcc/testsuite/gcc.target/loongarch/strict-align.= c >=20 > diff --git a/gcc/testsuite/gcc.target/loongarch/strict-align.c > b/gcc/testsuite/gcc.target/loongarch/strict-align.c > new file mode 100644 > index 00000000000..bcad2b84f68 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/loongarch/strict-align.c > @@ -0,0 +1,13 @@ > +/* { dg-do compile } */ > +/* { dg-options "-Ofast -mstrict-align -mlasx" } */ > +/* { dg-final { scan-assembler-not "vfadd.s" } } */ > + > +void > +foo (float* restrict x, float* restrict y) > +{ > +=C2=A0 x[0] =3D x[0] + y[0]; > +=C2=A0 x[1] =3D x[1] + y[1]; > +=C2=A0 x[2] =3D x[2] + y[2]; > +=C2=A0 x[3] =3D x[3] + y[3]; > +} > + --=20 Xi Ruoyao School of Aerospace Science and Technology, Xidian University