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From: Xi Ruoyao <xry111@mengyan1223.wang>
To: Richard Sandiford <richard.sandiford@arm.com>
Cc: Qing Zhao <qing.zhao@oracle.com>, Jeff Law <law@redhat.com>,
	 "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
	YunQiang Su <yunqiang.su@cipunited.com>,
	Jakub Jelinek <jakub@gcc.gnu.org>
Subject: Re: [PATCH RFC] mips: add TARGET_ZERO_CALL_USED_REGS hook [PR104817, PR104820]
Date: Tue, 15 Mar 2022 01:05:29 +0800	[thread overview]
Message-ID: <92e5b7a117192b213c0e01ea6db947a9a5c97509.camel@mengyan1223.wang> (raw)
In-Reply-To: <mptsfrka5b3.fsf@arm.com>

On Mon, 2022-03-14 at 16:04 +0000, Richard Sandiford wrote:

> Xi Ruoyao <xry111@mengyan1223.wang> writes:

> > Now I think the only rational ways are:
> > 
> > (1) allow zeroing more registers than need_zeroed_hardregs.
> 
> I think this is the way to go.  I agree it's a bit hacky, but it seems
> like the least worst option.

> > (2) allow zeroing less registers than need_zeroed_hardregs (then I'll
> > skip ST_REGS, after all they are just 8 bits in total).
> 
> Yeah, this is explicitly OK, provided that the target maintainers
> feel that the contents of the registers in question are not a significant
> security concern.  I don't feel I can make that call though.  It's really
> a question for the userbase.

To me, I believe nobody will write some security-critical code depending
on a floating-point compare result :).  Maybe I'm wrong by mixing up the
concept of "security" and "safety".
-- 
Xi Ruoyao <xry111@mengyan1223.wang>
School of Aerospace Science and Technology, Xidian University

  reply	other threads:[~2022-03-14 17:05 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-07 20:40 Xi Ruoyao
2022-03-09 18:25 ` Richard Sandiford
2022-03-10 11:53   ` Xi Ruoyao
2022-03-10 13:41     ` [PATCH v2 " Xi Ruoyao
2022-03-10 13:45       ` [PATCH v2 RFC, resend] " Xi Ruoyao
2022-03-10 20:31   ` [PATCH RFC] " Qing Zhao
2022-03-11  2:54     ` Xi Ruoyao
2022-03-11 16:08       ` Qing Zhao
2022-03-11 17:29         ` Xi Ruoyao
2022-03-11 17:31           ` Xi Ruoyao
2022-03-11 21:26           ` Qing Zhao
2022-03-12 10:48             ` Xi Ruoyao
2022-03-13  6:03               ` Xi Ruoyao
2022-03-14 16:04                 ` Richard Sandiford
2022-03-14 17:05                   ` Xi Ruoyao [this message]
2022-03-16 20:27                   ` Qing Zhao
2022-03-18 13:11                     ` Xi Ruoyao
2022-03-18 16:09                       ` Richard Sandiford
2022-03-18 18:51                         ` Qing Zhao
2022-04-01 14:32           ` Maciej W. Rozycki

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