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From: HAO CHEN GUI <guihaoc@linux.ibm.com>
To: gcc-patches <gcc-patches@gcc.gnu.org>
Cc: Segher Boessenkool <segher@kernel.crashing.org>,
	David <dje.gcc@gmail.com>, Bill Schmidt <wschmidt@linux.ibm.com>
Subject: Ping^1 [PATCH, rs6000] new split pattern for TI to V1TI move [PR103124]
Date: Mon, 10 Jan 2022 11:16:27 +0800	[thread overview]
Message-ID: <92fe361a-f2a3-c7c6-27d6-2f4acb64dc6b@linux.ibm.com> (raw)
In-Reply-To: <0c83ffcd-ed6d-5264-1d50-d4ffcc7d6836@linux.ibm.com>

Hi,

    Gentle ping this:
	https://gcc.gnu.org/pipermail/gcc-patches/2021-December/587051.html

Thanks

On 17/12/2021 上午 9:55, HAO CHEN GUI wrote:
> Hi,
>    This patch defines a new split pattern for TI to V1TI move. The pattern concatenates two subreg:DI of
> a TI to a V2DI. With the pattern, the subreg pass can do register split for TI when there is a TI to V1TI
> move. The patch optimizes one unnecessary "mr" out on P9. The new test case illustrates it.
> 
>    Bootstrapped and tested on powerpc64-linux BE and LE with no regressions. Is this okay for trunk?
> Any recommendations? Thanks a lot.
> 
> ChangeLog
> 2021-12-13 Haochen Gui <guihaoc@linux.ibm.com>
> 
> gcc/
> 	* config/rs6000/vsx.md (split pattern for TI to V1TI move): Defined.
> 
> gcc/testsuite/
> 	* gcc.target/powerpc/pr103124.c: New testcase.
> 
> 
> patch.diff
> diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
> index bf033e31c1c..52968eb4609 100644
> --- a/gcc/config/rs6000/vsx.md
> +++ b/gcc/config/rs6000/vsx.md
> @@ -6589,3 +6589,19 @@ (define_insn "xxeval"
>     [(set_attr "type" "vecperm")
>      (set_attr "prefixed" "yes")])
> 
> +;; Construct V1TI by vsx_concat_v2di
> +(define_split
> +  [(set (match_operand:V1TI 0 "vsx_register_operand")
> +	(subreg:V1TI
> +	  (match_operand:TI 1 "int_reg_operand") 0 ))]
> +  "TARGET_P9_VECTOR && !reload_completed"
> +  [(const_int 0)]
> +{
> +  rtx tmp1 = simplify_gen_subreg (DImode, operands[1], TImode, 0);
> +  rtx tmp2 = simplify_gen_subreg (DImode, operands[1], TImode, 8);
> +  rtx tmp3 = gen_reg_rtx (V2DImode);
> +  emit_insn (gen_vsx_concat_v2di (tmp3, tmp1, tmp2));
> +  rtx tmp4 = simplify_gen_subreg (V1TImode, tmp3, V2DImode, 0);
> +  emit_move_insn (operands[0], tmp4);
> +  DONE;
> +})
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr103124.c b/gcc/testsuite/gcc.target/powerpc/pr103124.c
> new file mode 100644
> index 00000000000..e9072d19b8e
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr103124.c
> @@ -0,0 +1,12 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target powerpc_p9vector_ok } */
> +/* { dg-require-effective-target int128 } */
> +/* { dg-options "-O2 -mdejagnu-cpu=power9" } */
> +/* { dg-final { scan-assembler-not "\mmr\M" } } */
> +
> +vector __int128 add (long long a)
> +{
> +  vector __int128 b;
> +  b = (vector __int128) {a};
> +  return b;
> +}
> 

  reply	other threads:[~2022-01-10  3:16 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-17  1:55 HAO CHEN GUI
2022-01-10  3:16 ` HAO CHEN GUI [this message]
2022-01-10 23:09   ` Ping^1 " David Edelsohn
2022-01-11  1:12     ` Segher Boessenkool
2022-01-11  2:45       ` HAO CHEN GUI

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