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From: will schmidt <will_schmidt@vnet.ibm.com>
To: gcc-patches@gcc.gnu.org
Cc: Segher Boessenkool <segher@kernel.crashing.org>,
	David Edelsohn <dje.gcc@gmail.com>,
	"Kewen.Lin" <linkw@linux.ibm.com>
Subject: [PATCH,RS6000 1/5] Clean-up MASK_<xxxx> and RS6000_BTM_<xxxx> definitions.
Date: Mon, 06 Jun 2022 17:05:38 -0500	[thread overview]
Message-ID: <9369d8551a904e8e131796ebd0227d0109856fc1.camel@vnet.ibm.com> (raw)
In-Reply-To: <21f1b472875d5c75e151e647c5182a74e426559f.camel@vnet.ibm.com>

[PATCH,RS6000 1/5] Clean-up MASK_<xxxx> and RS6000_BTM_<xxxx> definitions.

Hi,

This patch removes the defines that are no longer used, and
updates the comment for the set of MASK_<xxxx> defines.

This patch removes the defines for
MASK_REGNAMES, MASK_PROTOTYPE, RS6000_BTM_ALWAYS, RS6000_BTM_COMMON.

gcc/
	* config/rs6000/rs6000.c (RS6000_BTM_COMMON, RS6000_BTM_ALWAYS,
	MASK_REGNAMES, OPTION_MASK_REGNAMES, MASK_PROTOTYPE,
	OPTION_MASK_PROTOTYPE, MASK_UPDATE, OPTION_MASK_UPDATE): Remove.

diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 3b8941a86584..2ff17a16e43c 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -503,12 +503,13 @@ extern int rs6000_vector_align[];
    answers if the arguments are not in the normal range.  */
 #define TARGET_MINMAX	(TARGET_HARD_FLOAT && TARGET_PPC_GFXOPT		\
 			 && (TARGET_P9_MINMAX || !flag_trapping_math))
 
 /* In switching from using target_flags to using rs6000_isa_flags, the options
-   machinery creates OPTION_MASK_<xxx> instead of MASK_<xxx>.  For now map
-   OPTION_MASK_<xxx> back into MASK_<xxx>.  */
+   machinery creates OPTION_MASK_<xxx> instead of MASK_<xxx>.  The MASK_<xxxx>
+   options that have not yet been replaced by their OPTION_MASK_<xxx>
+   equivalents are defined here.  */
 #define MASK_ALTIVEC			OPTION_MASK_ALTIVEC
 #define MASK_CMPB			OPTION_MASK_CMPB
 #define MASK_CRYPTO			OPTION_MASK_CRYPTO
 #define MASK_DFP			OPTION_MASK_DFP
 #define MASK_DIRECT_MOVE		OPTION_MASK_DIRECT_MOVE
@@ -534,11 +535,10 @@ extern int rs6000_vector_align[];
 #define MASK_PPC_GFXOPT			OPTION_MASK_PPC_GFXOPT
 #define MASK_PPC_GPOPT			OPTION_MASK_PPC_GPOPT
 #define MASK_RECIP_PRECISION		OPTION_MASK_RECIP_PRECISION
 #define MASK_SOFT_FLOAT			OPTION_MASK_SOFT_FLOAT
 #define MASK_STRICT_ALIGN		OPTION_MASK_STRICT_ALIGN
-#define MASK_UPDATE			OPTION_MASK_UPDATE
 #define MASK_VSX			OPTION_MASK_VSX
 #define MASK_POWER10			OPTION_MASK_POWER10
 #define MASK_P10_FUSION			OPTION_MASK_P10_FUSION
 
 #ifndef IN_LIBGCC2
@@ -551,18 +551,10 @@ extern int rs6000_vector_align[];
 
 #ifdef TARGET_LITTLE_ENDIAN
 #define MASK_LITTLE_ENDIAN		OPTION_MASK_LITTLE_ENDIAN
 #endif
 
-#ifdef TARGET_REGNAMES
-#define MASK_REGNAMES			OPTION_MASK_REGNAMES
-#endif
-
-#ifdef TARGET_PROTOTYPE
-#define MASK_PROTOTYPE			OPTION_MASK_PROTOTYPE
-#endif
-
 #ifdef TARGET_MODULO
 #define RS6000_BTM_MODULO		OPTION_MASK_MODULO
 #endif
 
 
@@ -2250,11 +2242,10 @@ extern int frame_pointer_needed;
 
 
 /* Builtin targets.  For now, we reuse the masks for those options that are in
    target flags, and pick a random bit for ldbl128, which isn't in
    target_flags.  */
-#define RS6000_BTM_ALWAYS	0		/* Always enabled.  */
 #define RS6000_BTM_ALTIVEC	MASK_ALTIVEC	/* VMX/altivec vectors.  */
 #define RS6000_BTM_CMPB		MASK_CMPB	/* ISA 2.05: compare bytes.  */
 #define RS6000_BTM_VSX		MASK_VSX	/* VSX (vector/scalar).  */
 #define RS6000_BTM_P8_VECTOR	MASK_P8_VECTOR	/* ISA 2.07 vector.  */
 #define RS6000_BTM_P9_VECTOR	MASK_P9_VECTOR	/* ISA 3.0 vector.  */
@@ -2275,32 +2266,10 @@ extern int frame_pointer_needed;
 #define RS6000_BTM_FLOAT128	MASK_FLOAT128_KEYWORD /* IEEE 128-bit float.  */
 #define RS6000_BTM_FLOAT128_HW	MASK_FLOAT128_HW /* IEEE 128-bit float h/w.  */
 #define RS6000_BTM_MMA		MASK_MMA	/* ISA 3.1 MMA.  */
 #define RS6000_BTM_P10		MASK_POWER10
 
-#define RS6000_BTM_COMMON	(RS6000_BTM_ALTIVEC			\
-				 | RS6000_BTM_VSX			\
-				 | RS6000_BTM_P8_VECTOR			\
-				 | RS6000_BTM_P9_VECTOR			\
-				 | RS6000_BTM_P9_MISC			\
-				 | RS6000_BTM_MODULO                    \
-				 | RS6000_BTM_CRYPTO			\
-				 | RS6000_BTM_FRE			\
-				 | RS6000_BTM_FRES			\
-				 | RS6000_BTM_FRSQRTE			\
-				 | RS6000_BTM_FRSQRTES			\
-				 | RS6000_BTM_HTM			\
-				 | RS6000_BTM_POPCNTD			\
-				 | RS6000_BTM_CELL			\
-				 | RS6000_BTM_DFP			\
-				 | RS6000_BTM_HARD_FLOAT		\
-				 | RS6000_BTM_LDBL128			\
-				 | RS6000_BTM_POWERPC64			\
-				 | RS6000_BTM_FLOAT128			\
-				 | RS6000_BTM_FLOAT128_HW		\
-				 | RS6000_BTM_MMA			\
-				 | RS6000_BTM_P10)
 
 enum rs6000_builtin_type_index
 {
   RS6000_BTI_NOT_OPAQUE,
   RS6000_BTI_opaque_V4SI,


  reply	other threads:[~2022-06-06 22:05 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-06 21:52 [PATCH,RS6000 0/5] Clean up MASK_ and RS6000_BTM_ defines will schmidt
2022-06-06 22:05 ` will schmidt [this message]
2022-06-06 22:05 ` [PATCH,RS6000 2/5] Rework the RS6000_BTM defines will schmidt
2022-06-07  2:50   ` Kewen.Lin
2022-06-07 16:45     ` will schmidt
2022-06-07 19:16       ` Segher Boessenkool
2022-06-06 22:05 ` [PATCH, RS6000 3/5] Rework the RS6000_BTM defines, continued will schmidt
2022-06-06 22:07 ` [PATCH,RS6000 5/5] Replace MASK_<xxxx> usage with OPTION_MASK_<xxxx> will schmidt
2022-06-06 22:07 ` [PATCH,RS6000 4/5] Replace MASK_<xxxx> " will schmidt

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