From: Jeff Law <jeffreyalaw@gmail.com>
To: Raphael Moreira Zinsly <rzinsly@ventanamicro.com>,
gcc-patches@gcc.gnu.org
Cc: philipp.tomsich@vrull.eu
Subject: Re: [PATCH] RISC-V: Optimize min/max with SImode sources on 64-bit
Date: Wed, 28 Dec 2022 18:36:00 -0700 [thread overview]
Message-ID: <957c0039-9db1-ff1f-4654-27f448607ff2@gmail.com> (raw)
In-Reply-To: <20221228181817.193462-1-rzinsly@ventanamicro.com>
On 12/28/22 11:18, Raphael Moreira Zinsly wrote:
> The Zbb min/max pattern was not matching 32-bit sources when
> compiling for 64-bit.
> This patch separates the pattern into SImode and DImode, and
> use a define_expand to handle SImode on 64-bit.
> zbb-min-max-02.c generates different code as a result of the new
> expander. The resulting code is as efficient as the old code.
> Furthermore, the special sh1add pattern that appeared in
> zbb-min-max-02.c is tested by the zba-shNadd-* tests.
>
> gcc/ChangeLog:
>
> * config/riscv/bitmanip.md
> (<bitmanip_optab><mode>3): Divide pattern into
> <bitmanip_optab>si3_insn and <bitmanip_optab>di3.
> (<bitmanip_optab>si3): Handle SImode sources on
> TARGET_64BIT.
>
> gcc/testsuite:
>
> * gcc.target/riscv/zbb-abs.c: New test.
> * gcc.target/riscv/zbb-min-max-02.c: Addapt the
> expected output.
So we need to do a bit of x86 debugging.
Given the regressions below on the x86 testsuite, we should assume there
may be other targets where the optimization might result in testsuite
regressions.
The good news is we can can use my upstream GCC tester to help identify
some of these cases. So I'll put the simplify-rtx change into my tester
and see what pops out overnight on the embedded targets.
You're also missing a ChangeLog entry for the simplify-rtx change.
Sorry I didn't catch that sooner.
--- /home/jlaw/gcc.sum 2022-12-28 15:59:52.612140312 -0700
+++ gcc/testsuite/gcc/gcc.sum 2022-12-28 17:14:52.661333526 -0700
@@ -182730,9 +182730,9 @@
PASS: gcc.target/i386/pr106095.c (test for excess errors)
PASS: gcc.target/i386/pr106122.c (test for excess errors)
PASS: gcc.target/i386/pr106231-1.c (test for excess errors)
-PASS: gcc.target/i386/pr106231-1.c scan-assembler-not cltq
+FAIL: gcc.target/i386/pr106231-1.c scan-assembler-not cltq
PASS: gcc.target/i386/pr106231-2.c (test for excess errors)
-PASS: gcc.target/i386/pr106231-2.c scan-assembler-not cltq
+FAIL: gcc.target/i386/pr106231-2.c scan-assembler-not cltq
PASS: gcc.target/i386/pr106273.c (test for excess errors)
PASS: gcc.target/i386/pr106273.c scan-assembler-not andn[ \\t]+%rdi,
%r11, %rdi
PASS: gcc.target/i386/pr106303.c (test for excess errors)
@@ -186148,7 +186148,7 @@
PASS: gcc.target/i386/pr91704.c scan-assembler-not \tvpsubusb\t
PASS: gcc.target/i386/pr91704.c scan-assembler-times \tvpcmpgtb\t%ymm 1
PASS: gcc.target/i386/pr91824-1.c (test for excess errors)
-PASS: gcc.target/i386/pr91824-1.c scan-assembler-not cltq
+FAIL: gcc.target/i386/pr91824-1.c scan-assembler-not cltq
PASS: gcc.target/i386/pr91824-2.c (test for excess errors)
PASS: gcc.target/i386/pr91824-2.c scan-assembler-not cltq
PASS: gcc.target/i386/pr91824-2.c scan-assembler-not movl\t%eax, %eax
@@ -186561,9 +186561,9 @@
PASS: gcc.target/i386/pr95483-7.c (test for excess errors)
PASS: gcc.target/i386/pr95483-7.c scan-assembler-times vmovdqu[
\\t]+[^{\n]*\\)[^\n]*%xmm[0-9]+(?:\n|[ \\t]+#) 2
PASS: gcc.target/i386/pr95535-1.c (test for excess errors)
-PASS: gcc.target/i386/pr95535-1.c scan-assembler-not cltq
+FAIL: gcc.target/i386/pr95535-1.c scan-assembler-not cltq
PASS: gcc.target/i386/pr95535-2.c (test for excess errors)
-PASS: gcc.target/i386/pr95535-2.c scan-assembler-not cltq
+FAIL: gcc.target/i386/pr95535-2.c scan-assembler-not cltq
PASS: gcc.target/i386/pr95740.c (test for excess errors)
PASS: gcc.target/i386/pr95740.c scan-assembler-times (?n)incl[\\t ]*%eax 1
PASS: gcc.target/i386/pr95740.c scan-assembler-times (?n)incq[\\t ]*%rax 1
next prev parent reply other threads:[~2022-12-29 1:36 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-28 18:18 Raphael Moreira Zinsly
2022-12-29 1:36 ` Jeff Law [this message]
2022-12-29 12:23 ` Raphael Zinsly
2022-12-29 14:18 ` Jeff Law
2022-12-29 14:50 ` Philipp Tomsich
2022-12-29 17:26 ` Jeff Law
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