Re: Re: [PATCH v4] RISC-V: Fixbug for fsflags instruction error using immediate.

["juzhe.zhong@rivai.ai" <juzhe.zhong@rivai.ai>]

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I just checked SPEC:

fscsr rd, rs csrrw rd, fcsr, rs 
Swap FP control/status register 
fscsr rs csrrw x0, fcsr, rs 
Write FP control/status register 

It seems that fscsr doesn't have immediate form? I am not sure.


juzhe.zhong@rivai.ai
 
From: Kito Cheng
Date: 2023-07-26 15:07
To: Jin Ma
CC: gcc-patches; jeffreyalaw; palmer; richard.sandiford; philipp.tomsich; christoph.muellner; rdapp.gcc; juzhe.zhong; jinma.contrib
Subject: Re: [PATCH v4] RISC-V: Fixbug for fsflags instruction error using immediate.
On Wed, Jul 26, 2023 at 1:41 PM Jin Ma via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> The pattern mistakenly believes that fsflags can use immediate numbers,
> but in fact it does not support it. Immediate numbers should use fsflagsi.
>
> For example:
> __builtin_riscv_fsflags(4);
>
> The following error occurred.
> /tmp/ccoWdWqT.s: Assembler messages:
> /tmp/ccoWdWqT.s:14: Error: illegal operands `fsflags 4'
>
> gcc/ChangeLog:
>
>         * config/riscv/riscv.md: Likewise.
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/riscv/fsflags.c: New test.
> ---
>  gcc/config/riscv/riscv.md                |  4 ++--
>  gcc/testsuite/gcc.target/riscv/fsflags.c | 16 ++++++++++++++++
>  2 files changed, 18 insertions(+), 2 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fsflags.c
>
> diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
> index 4615e811947..24515bcf706 100644
> --- a/gcc/config/riscv/riscv.md
> +++ b/gcc/config/riscv/riscv.md
> @@ -3074,7 +3074,7 @@ (define_insn "riscv_frcsr"
>    "frcsr\t%0")
>
>  (define_insn "riscv_fscsr"
> -  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
> +  [(unspec_volatile [(match_operand:SI 0 "register_operand" "r")] UNSPECV_FSCSR)]
>    "TARGET_HARD_FLOAT || TARGET_ZFINX"
>    "fscsr\t%0")
 
Wait, this patch still drops K?