From: Xionghu Luo <luoxhu@linux.ibm.com>
To: David Edelsohn <dje.gcc@gmail.com>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>,
Segher Boessenkool <segher@kernel.crashing.org>,
Bill Schmidt <wschmidt@linux.ibm.com>,
guojiufu <guojiufu@linux.ibm.com>,
linkw@gcc.gnu.org
Subject: Re: [PATCH] rs6000: Fix incorrect fusion constraint [PR102991]
Date: Fri, 5 Nov 2021 08:50:37 +0800 [thread overview]
Message-ID: <988359cd-07ee-0591-fa92-161bbad27dc2@linux.ibm.com> (raw)
In-Reply-To: <CAGWvnynjO3p36qksU-jXxcMKpWT2QQoits0h5Am7KpSq1ESzRw@mail.gmail.com>
On 2021/11/4 09:59, David Edelsohn wrote:
> On Wed, Nov 3, 2021 at 9:46 PM Xionghu Luo <luoxhu@linux.ibm.com> wrote:
>>
>> On 2021/11/3 23:13, David Edelsohn wrote:
>>> Did you manually change fusion.md or did you regenerate it after
>>> fixing genfusion.pl?
>>>
>>> If you regenerated it, the ChangeLog entry should be "Regenerated" and
>>> the "Fix incorrect clobber constraint." should refer to the
>>> genfusion.pl change.
>>>
>>> I want to ensure that genfusion.pl generates the correct constraint
>>> the next time it is used.
>>>
>>
>> Aaron mentioned he disabled the auto generation here[1], but before
>> than that, Segher suggested to enable it in stage1.
>>
>> [1] https://gcc.gnu.org/pipermail/gcc-patches/2021-February/564652.html
>> [2] https://gcc.gnu.org/pipermail/gcc-patches/2021-January/564244.html
>>
>>
>> Thus re-enable it with the followed v2 patch(Confirmed the fusion.md is
>> exactly same with v1 patch.)
>>
>>
>> [PATCH v2] rs6000: Fix incorrect fusion constraint [PR102991]
>>
>>
>> gcc/ChangeLog:
>>
>> * config/rs6000/fusion.md: Regenerate.
>> * config/rs6000/genfusion.pl: Fix incorrect clobber constraint.
>> * config/rs6000/t-rs6000: Uncomment regeneration of fusion.md.
>
> I believe that there is some confusion about my request. I am not
> requesting that the patch enable genfusion.pl . The Makefile fragment
> rule to generate fusion.md is disabled for a reason and normally
> should not be enabled. But fusion.md should be generated by
> genfusion.pl when there is a change, and any changes should be made in
> genfusion.pl. In other words, change genfusion.pl, temporarily enable
> the Makefile fragment rule, generate fusion.md, disable genfusion.pl.
> My request was an effort to ensure that genfusion.pl correctly
> regenerates the new, corrected fusion.md file. I don't want a manual
> change to fusion.md that differs from the automatically generated
> file. Only the updated fusion.md and genfusion.pl should be checked
> in.
>
> Has Aaron reviewed and confirmed the change to genfusion.pl?
>
Regenerate and update the ChangeLog description from v1:
[PATCH] rs6000: Fix incorrect fusion constraint [PR102991]
gcc/ChangeLog:
* config/rs6000/fusion.md: Regenerate.
* config/rs6000/genfusion.pl: Fix incorrect clobber constraint.
---
gcc/config/rs6000/fusion.md | 128 ++++++++++++++++-----------------
gcc/config/rs6000/genfusion.pl | 2 +-
2 files changed, 65 insertions(+), 65 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index 516baa0bb0b..d11cecb11ee 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -1874,7 +1874,7 @@ (define_insn "*fuse_vand_vand"
(and:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "%v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vand %3,%1,%0\;vand %3,%3,%2
@@ -1892,7 +1892,7 @@ (define_insn "*fuse_vandc_vand"
(and:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vandc %3,%1,%0\;vand %3,%3,%2
@@ -1910,7 +1910,7 @@ (define_insn "*fuse_veqv_vand"
(and:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
veqv %3,%1,%0\;vand %3,%3,%2
@@ -1928,7 +1928,7 @@ (define_insn "*fuse_vnand_vand"
(and:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vnand %3,%1,%0\;vand %3,%3,%2
@@ -1946,7 +1946,7 @@ (define_insn "*fuse_vnor_vand"
(and:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vnor %3,%1,%0\;vand %3,%3,%2
@@ -1964,7 +1964,7 @@ (define_insn "*fuse_vor_vand"
(and:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vor %3,%1,%0\;vand %3,%3,%2
@@ -1982,7 +1982,7 @@ (define_insn "*fuse_vorc_vand"
(and:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vorc %3,%1,%0\;vand %3,%3,%2
@@ -2000,7 +2000,7 @@ (define_insn "*fuse_vxor_vand"
(and:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vxor %3,%1,%0\;vand %3,%3,%2
@@ -2018,7 +2018,7 @@ (define_insn "*fuse_vand_vandc"
(and:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vand %3,%1,%0\;vandc %3,%3,%2
@@ -2036,7 +2036,7 @@ (define_insn "*fuse_vandc_vandc"
(and:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vandc %3,%1,%0\;vandc %3,%3,%2
@@ -2054,7 +2054,7 @@ (define_insn "*fuse_veqv_vandc"
(and:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
veqv %3,%1,%0\;vandc %3,%3,%2
@@ -2072,7 +2072,7 @@ (define_insn "*fuse_vnand_vandc"
(and:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vnand %3,%1,%0\;vandc %3,%3,%2
@@ -2090,7 +2090,7 @@ (define_insn "*fuse_vnor_vandc"
(and:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vnor %3,%1,%0\;vandc %3,%3,%2
@@ -2108,7 +2108,7 @@ (define_insn "*fuse_vor_vandc"
(and:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vor %3,%1,%0\;vandc %3,%3,%2
@@ -2126,7 +2126,7 @@ (define_insn "*fuse_vorc_vandc"
(and:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vorc %3,%1,%0\;vandc %3,%3,%2
@@ -2144,7 +2144,7 @@ (define_insn "*fuse_vxor_vandc"
(and:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vxor %3,%1,%0\;vandc %3,%3,%2
@@ -2162,7 +2162,7 @@ (define_insn "*fuse_vand_veqv"
(not:VM (xor:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vand %3,%1,%0\;veqv %3,%3,%2
@@ -2180,7 +2180,7 @@ (define_insn "*fuse_vandc_veqv"
(not:VM (xor:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vandc %3,%1,%0\;veqv %3,%3,%2
@@ -2198,7 +2198,7 @@ (define_insn "*fuse_veqv_veqv"
(not:VM (xor:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "%v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
veqv %3,%1,%0\;veqv %3,%3,%2
@@ -2216,7 +2216,7 @@ (define_insn "*fuse_vnand_veqv"
(not:VM (xor:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vnand %3,%1,%0\;veqv %3,%3,%2
@@ -2234,7 +2234,7 @@ (define_insn "*fuse_vnor_veqv"
(not:VM (xor:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vnor %3,%1,%0\;veqv %3,%3,%2
@@ -2252,7 +2252,7 @@ (define_insn "*fuse_vor_veqv"
(not:VM (xor:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vor %3,%1,%0\;veqv %3,%3,%2
@@ -2270,7 +2270,7 @@ (define_insn "*fuse_vorc_veqv"
(not:VM (xor:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vorc %3,%1,%0\;veqv %3,%3,%2
@@ -2288,7 +2288,7 @@ (define_insn "*fuse_vxor_veqv"
(not:VM (xor:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vxor %3,%1,%0\;veqv %3,%3,%2
@@ -2306,7 +2306,7 @@ (define_insn "*fuse_vand_vnand"
(ior:VM (not:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vand %3,%1,%0\;vnand %3,%3,%2
@@ -2324,7 +2324,7 @@ (define_insn "*fuse_vandc_vnand"
(ior:VM (not:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vandc %3,%1,%0\;vnand %3,%3,%2
@@ -2342,7 +2342,7 @@ (define_insn "*fuse_veqv_vnand"
(ior:VM (not:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
veqv %3,%1,%0\;vnand %3,%3,%2
@@ -2360,7 +2360,7 @@ (define_insn "*fuse_vnand_vnand"
(ior:VM (not:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vnand %3,%1,%0\;vnand %3,%3,%2
@@ -2378,7 +2378,7 @@ (define_insn "*fuse_vnor_vnand"
(ior:VM (not:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vnor %3,%1,%0\;vnand %3,%3,%2
@@ -2396,7 +2396,7 @@ (define_insn "*fuse_vor_vnand"
(ior:VM (not:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vor %3,%1,%0\;vnand %3,%3,%2
@@ -2414,7 +2414,7 @@ (define_insn "*fuse_vorc_vnand"
(ior:VM (not:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vorc %3,%1,%0\;vnand %3,%3,%2
@@ -2432,7 +2432,7 @@ (define_insn "*fuse_vxor_vnand"
(ior:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vxor %3,%1,%0\;vnand %3,%3,%2
@@ -2450,7 +2450,7 @@ (define_insn "*fuse_vand_vnor"
(and:VM (not:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vand %3,%1,%0\;vnor %3,%3,%2
@@ -2468,7 +2468,7 @@ (define_insn "*fuse_vandc_vnor"
(and:VM (not:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vandc %3,%1,%0\;vnor %3,%3,%2
@@ -2486,7 +2486,7 @@ (define_insn "*fuse_veqv_vnor"
(and:VM (not:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
veqv %3,%1,%0\;vnor %3,%3,%2
@@ -2504,7 +2504,7 @@ (define_insn "*fuse_vnand_vnor"
(and:VM (not:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vnand %3,%1,%0\;vnor %3,%3,%2
@@ -2522,7 +2522,7 @@ (define_insn "*fuse_vnor_vnor"
(and:VM (not:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vnor %3,%1,%0\;vnor %3,%3,%2
@@ -2540,7 +2540,7 @@ (define_insn "*fuse_vor_vnor"
(and:VM (not:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vor %3,%1,%0\;vnor %3,%3,%2
@@ -2558,7 +2558,7 @@ (define_insn "*fuse_vorc_vnor"
(and:VM (not:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vorc %3,%1,%0\;vnor %3,%3,%2
@@ -2576,7 +2576,7 @@ (define_insn "*fuse_vxor_vnor"
(and:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vxor %3,%1,%0\;vnor %3,%3,%2
@@ -2594,7 +2594,7 @@ (define_insn "*fuse_vand_vor"
(ior:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vand %3,%1,%0\;vor %3,%3,%2
@@ -2612,7 +2612,7 @@ (define_insn "*fuse_vandc_vor"
(ior:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vandc %3,%1,%0\;vor %3,%3,%2
@@ -2630,7 +2630,7 @@ (define_insn "*fuse_veqv_vor"
(ior:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
veqv %3,%1,%0\;vor %3,%3,%2
@@ -2648,7 +2648,7 @@ (define_insn "*fuse_vnand_vor"
(ior:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vnand %3,%1,%0\;vor %3,%3,%2
@@ -2666,7 +2666,7 @@ (define_insn "*fuse_vnor_vor"
(ior:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vnor %3,%1,%0\;vor %3,%3,%2
@@ -2684,7 +2684,7 @@ (define_insn "*fuse_vor_vor"
(ior:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "%v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vor %3,%1,%0\;vor %3,%3,%2
@@ -2702,7 +2702,7 @@ (define_insn "*fuse_vorc_vor"
(ior:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vorc %3,%1,%0\;vor %3,%3,%2
@@ -2720,7 +2720,7 @@ (define_insn "*fuse_vxor_vor"
(ior:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vxor %3,%1,%0\;vor %3,%3,%2
@@ -2738,7 +2738,7 @@ (define_insn "*fuse_vand_vorc"
(ior:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vand %3,%1,%0\;vorc %3,%3,%2
@@ -2756,7 +2756,7 @@ (define_insn "*fuse_vandc_vorc"
(ior:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vandc %3,%1,%0\;vorc %3,%3,%2
@@ -2774,7 +2774,7 @@ (define_insn "*fuse_veqv_vorc"
(ior:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
veqv %3,%1,%0\;vorc %3,%3,%2
@@ -2792,7 +2792,7 @@ (define_insn "*fuse_vnand_vorc"
(ior:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vnand %3,%1,%0\;vorc %3,%3,%2
@@ -2810,7 +2810,7 @@ (define_insn "*fuse_vnor_vorc"
(ior:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vnor %3,%1,%0\;vorc %3,%3,%2
@@ -2828,7 +2828,7 @@ (define_insn "*fuse_vor_vorc"
(ior:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vor %3,%1,%0\;vorc %3,%3,%2
@@ -2846,7 +2846,7 @@ (define_insn "*fuse_vorc_vorc"
(ior:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vorc %3,%1,%0\;vorc %3,%3,%2
@@ -2864,7 +2864,7 @@ (define_insn "*fuse_vxor_vorc"
(ior:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vxor %3,%1,%0\;vorc %3,%3,%2
@@ -2882,7 +2882,7 @@ (define_insn "*fuse_vand_vxor"
(xor:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vand %3,%1,%0\;vxor %3,%3,%2
@@ -2900,7 +2900,7 @@ (define_insn "*fuse_vandc_vxor"
(xor:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vandc %3,%1,%0\;vxor %3,%3,%2
@@ -2918,7 +2918,7 @@ (define_insn "*fuse_veqv_vxor"
(xor:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
veqv %3,%1,%0\;vxor %3,%3,%2
@@ -2936,7 +2936,7 @@ (define_insn "*fuse_vnand_vxor"
(xor:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vnand %3,%1,%0\;vxor %3,%3,%2
@@ -2954,7 +2954,7 @@ (define_insn "*fuse_vnor_vxor"
(xor:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vnor %3,%1,%0\;vxor %3,%3,%2
@@ -2972,7 +2972,7 @@ (define_insn "*fuse_vor_vxor"
(xor:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vor %3,%1,%0\;vxor %3,%3,%2
@@ -2990,7 +2990,7 @@ (define_insn "*fuse_vorc_vxor"
(xor:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vorc %3,%1,%0\;vxor %3,%3,%2
@@ -3008,7 +3008,7 @@ (define_insn "*fuse_vxor_vxor"
(xor:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "%v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
- (clobber (match_scratch:VM 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:VM 4 "=X,X,X,&v"))]
"(TARGET_P10_FUSION && TARGET_P10_FUSION_2LOGICAL)"
"@
vxor %3,%1,%0\;vxor %3,%3,%2
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index ac22852220e..0fef75bd516 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -265,7 +265,7 @@ sub gen_logical_addsubf
(define_insn "*fuse_${inner_op}_${outer_name}"
[(set (match_operand:${mode} 3 "${pred}" "=&0,&1,&${constraint},${constraint}")
${outer_exp})
- (clobber (match_scratch:${mode} 4 "=X,X,X,&r"))]
+ (clobber (match_scratch:${mode} 4 "=X,X,X,&${constraint}"))]
"(TARGET_P10_FUSION && $target_flag)"
"@
${inner_op} %3,%1,%0\\;${outer_op} %3,${outer_32}
--
2.27.0
next prev parent reply other threads:[~2021-11-05 0:50 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-03 13:31 Xionghu Luo
2021-11-03 15:13 ` David Edelsohn
2021-11-04 1:46 ` Xionghu Luo
2021-11-04 1:59 ` David Edelsohn
2021-11-05 0:50 ` Xionghu Luo [this message]
2021-11-05 0:58 ` David Edelsohn
2021-11-05 6:23 ` Xionghu Luo
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