From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id 440B43858D28 for ; Fri, 19 Aug 2022 03:01:11 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 440B43858D28 Received: from pps.filterd (m0127361.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 27J2OtEJ034436; Fri, 19 Aug 2022 03:01:10 GMT Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3j21qcrnbf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 19 Aug 2022 03:01:10 +0000 Received: from m0127361.ppops.net (m0127361.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 27J30E8r030111; Fri, 19 Aug 2022 03:01:10 GMT Received: from ppma04ams.nl.ibm.com (63.31.33a9.ip4.static.sl-reverse.com [169.51.49.99]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3j21qcrna3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 19 Aug 2022 03:01:09 +0000 Received: from pps.filterd (ppma04ams.nl.ibm.com [127.0.0.1]) by ppma04ams.nl.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 27J2pGE4006433; Fri, 19 Aug 2022 03:01:08 GMT Received: from b06cxnps3075.portsmouth.uk.ibm.com (d06relay10.portsmouth.uk.ibm.com [9.149.109.195]) by ppma04ams.nl.ibm.com with ESMTP id 3hx3k9emy8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 19 Aug 2022 03:01:08 +0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 27J314Ll19136782 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 19 Aug 2022 03:01:04 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BAC034C046; Fri, 19 Aug 2022 03:01:04 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id EA3934C044; Fri, 19 Aug 2022 03:01:02 +0000 (GMT) Received: from [9.200.39.241] (unknown [9.200.39.241]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 19 Aug 2022 03:01:02 +0000 (GMT) Message-ID: <988a2f0f-0594-9306-566d-9e93171b9daf@linux.ibm.com> Date: Fri, 19 Aug 2022 11:01:01 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Subject: Re: [PATCH, rs6000] Change insn condition from TARGET_64BIT to TARGET_POWERPC64 for VSX scalar extract/insert instructions Content-Language: en-US To: HAO CHEN GUI Cc: Segher Boessenkool , David , Peter Bergner , gcc-patches References: <2ffb2ff4-540d-3bcf-4e4e-478acbdd910d@linux.ibm.com> From: "Kewen.Lin" In-Reply-To: <2ffb2ff4-540d-3bcf-4e4e-478acbdd910d@linux.ibm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: knlXtegE6nynemG23u0YbIGLRABDEh1l X-Proofpoint-GUID: 8zotCCmHtMqv468efEe7Kff6AmQ8eAla X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-08-18_18,2022-08-18_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 priorityscore=1501 clxscore=1015 bulkscore=0 mlxlogscore=999 mlxscore=0 lowpriorityscore=0 phishscore=0 suspectscore=0 impostorscore=0 spamscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2207270000 definitions=main-2208190008 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, NICE_REPLY_A, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 19 Aug 2022 03:01:13 -0000 Hi Haochen, on 2022/8/19 10:35, HAO CHEN GUI wrote: > Hi, > > This patch is for internal issue1136. It changes insn condition from > TARGET_64BIT to TARGET_POWERPC64 for VSX scalar extract/insert instructions. > These instructions all use DI registers and can be invoked with -mpowerpc64 > in a 32-bit environment. > > This patch also changes prototypes of related built-ins and target selector > of test cases. > > Bootstrapped and tested on powerpc64-linux BE and LE with no regressions. > Is this okay for trunk? Any recommendations? Thanks a lot. > > > ChangeLog > 2022-08-19 Haochen Gui > > gcc/ > * config/rs6000/rs6000-builtins.def > (__builtin_vsx_scalar_extract_exp): Set return type to const unsigned > long long. > (__builtin_vsx_scalar_extract_sig): Likewise. > * config/rs6000/vsx.md (xsxexpdp): Change insn condition from > TARGET_64BIT to TARGET_POWERPC64. > (xsxsigdp): Likewise. > (xsiexpdp): Likewise. > (xsiexpdpf): Likewise. > > gcc/testsuite/ > * gcc.target/powerpc/bfp/scalar-extract-exp-0.c: Change effective > target from lp64 to has_arch_ppc64 and add -mpowerpc64 for 32-bit > environment. > * gcc.target/powerpc/bfp/scalar-extract-sig-0.c: Likewise. > * gcc.target/powerpc/bfp/scalar-insert-exp-0.c: Likewise. > * gcc.target/powerpc/bfp/scalar-insert-exp-3.c: Likewise. > > > patch.diff > diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def > index f76f54793d7..4ebfd4704a1 100644 > --- a/gcc/config/rs6000/rs6000-builtins.def > +++ b/gcc/config/rs6000/rs6000-builtins.def > @@ -2847,10 +2847,10 @@ > pure vsc __builtin_vsx_lxvl (const void *, signed long); > LXVL lxvl {} > > - const signed long __builtin_vsx_scalar_extract_exp (double); > + const unsigned long long __builtin_vsx_scalar_extract_exp (double); > VSEEDP xsxexpdp {} > > - const signed long __builtin_vsx_scalar_extract_sig (double); > + const unsigned long long __builtin_vsx_scalar_extract_sig (double); > VSESDP xsxsigdp {} > > const double __builtin_vsx_scalar_insert_exp (unsigned long long, \ > diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md > index e226a93bbe5..a01711aa2cb 100644 > --- a/gcc/config/rs6000/vsx.md > +++ b/gcc/config/rs6000/vsx.md > @@ -5098,7 +5098,7 @@ (define_insn "xsxexpdp" > [(set (match_operand:DI 0 "register_operand" "=r") > (unspec:DI [(match_operand:DF 1 "vsx_register_operand" "wa")] > UNSPEC_VSX_SXEXPDP))] > - "TARGET_P9_VECTOR && TARGET_64BIT" > + "TARGET_P9_VECTOR && TARGET_POWERPC64" > "xsxexpdp %0,%x1" > [(set_attr "type" "integer")]) > > @@ -5116,7 +5116,7 @@ (define_insn "xsxsigdp" > [(set (match_operand:DI 0 "register_operand" "=r") > (unspec:DI [(match_operand:DF 1 "vsx_register_operand" "wa")] > UNSPEC_VSX_SXSIG))] > - "TARGET_P9_VECTOR && TARGET_64BIT" > + "TARGET_P9_VECTOR && TARGET_POWERPC64" > "xsxsigdp %0,%x1" > [(set_attr "type" "integer")]) > > @@ -5147,7 +5147,7 @@ (define_insn "xsiexpdp" > (unspec:DF [(match_operand:DI 1 "register_operand" "r") > (match_operand:DI 2 "register_operand" "r")] > UNSPEC_VSX_SIEXPDP))] > - "TARGET_P9_VECTOR && TARGET_64BIT" > + "TARGET_P9_VECTOR && TARGET_POWERPC64" > "xsiexpdp %x0,%1,%2" > [(set_attr "type" "fpsimple")]) > > @@ -5157,7 +5157,7 @@ (define_insn "xsiexpdpf" > (unspec:DF [(match_operand:DF 1 "register_operand" "r") > (match_operand:DI 2 "register_operand" "r")] > UNSPEC_VSX_SIEXPDP))] > - "TARGET_P9_VECTOR && TARGET_64BIT" > + "TARGET_P9_VECTOR && TARGET_POWERPC64" > "xsiexpdp %x0,%1,%2" > [(set_attr "type" "fpsimple")]) > > diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-0.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-0.c > index 35bf1b240f3..c9190bc7c6c 100644 > --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-0.c > +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-0.c > @@ -1,7 +1,8 @@ > /* { dg-do compile { target { powerpc*-*-* } } } */ > -/* { dg-require-effective-target lp64 } */ > -/* { dg-require-effective-target powerpc_p9vector_ok } */ > /* { dg-options "-mdejagnu-cpu=power9" } */ > +/* { dg-additional-options "-mpowerpc64" { target { powerpc*-*-linux* && ilp32 } } } */ > +/* { dg-require-effective-target has_arch_ppc64 } */ > +/* { dg-require-effective-target powerpc_p9vector_ok } */ Maybe we should add one comment here (also the other touched case) or in the commit log saying why we reorder the dg-require-effective-target and dg-options, since the reason isn't obvious. :) The others looks good to me. Thanks! BR, Kewen > > /* This test should succeed only on 64-bit configurations. */ > #include > diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-0.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-0.c > index 637080652b7..a391ac8cce3 100644 > --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-0.c > +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-0.c > @@ -1,7 +1,8 @@ > /* { dg-do compile { target { powerpc*-*-* } } } */ > -/* { dg-require-effective-target lp64 } */ > -/* { dg-require-effective-target powerpc_p9vector_ok } */ > /* { dg-options "-mdejagnu-cpu=power9" } */ > +/* { dg-additional-options "-mpowerpc64" { target { powerpc*-*-linux* && ilp32 } } } */ > +/* { dg-require-effective-target has_arch_ppc64 } */ > +/* { dg-require-effective-target powerpc_p9vector_ok } */ > > /* This test should succeed only on 64-bit configurations. */ > #include > diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c > index d8243258a67..cd35279e2e7 100644 > --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c > +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c > @@ -1,7 +1,8 @@ > /* { dg-do compile { target { powerpc*-*-* } } } */ > -/* { dg-require-effective-target lp64 } */ > -/* { dg-require-effective-target powerpc_p9vector_ok } */ > /* { dg-options "-mdejagnu-cpu=power9" } */ > +/* { dg-additional-options "-mpowerpc64" { target { powerpc*-*-linux* && ilp32 } } } */ > +/* { dg-require-effective-target has_arch_ppc64 } */ > +/* { dg-require-effective-target powerpc_p9vector_ok } */ > > /* This test should succeed only on 64-bit configurations. */ > #include > diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c > index 3ecbe3318e8..9c9fe9b9c2f 100644 > --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c > +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c > @@ -1,7 +1,8 @@ > /* { dg-do compile { target { powerpc*-*-* } } } */ > -/* { dg-require-effective-target lp64 } */ > -/* { dg-require-effective-target powerpc_p9vector_ok } */ > /* { dg-options "-mdejagnu-cpu=power9" } */ > +/* { dg-additional-options "-mpowerpc64" { target { powerpc*-*-linux* && ilp32 } } } */ > +/* { dg-require-effective-target has_arch_ppc64 } */ > +/* { dg-require-effective-target powerpc_p9vector_ok } */ > > /* This test should succeed only on 64-bit configurations. */ > #include