Re: [PATCH v4] LoongArch: Add support for TLS descriptors

[mengqinggang <mengqinggang@loongson.cn>]

在 2024/3/13 上午6:15, Xi Ruoyao 写道:
> On Tue, 2024-03-12 at 17:20 +0800, mengqinggang wrote:
>> +(define_insn "@got_load_tls_desc<mode>"
>> +  [(set (match_operand:P 0 "register_operand" "=r")
>> +	(unspec:P
>> +	    [(match_operand:P 1 "symbolic_operand" "")]
>> +	    UNSPEC_TLS_DESC))
>> +    (clobber (reg:SI FCC0_REGNUM))
>> +    (clobber (reg:SI FCC1_REGNUM))
>> +    (clobber (reg:SI FCC2_REGNUM))
>> +    (clobber (reg:SI FCC3_REGNUM))
>> +    (clobber (reg:SI FCC4_REGNUM))
>> +    (clobber (reg:SI FCC5_REGNUM))
>> +    (clobber (reg:SI FCC6_REGNUM))
>> +    (clobber (reg:SI FCC7_REGNUM))
>> +    (clobber (reg:SI RETURN_ADDR_REGNUM))]
>> +  "TARGET_TLS_DESC"
>> +{
>> +  return TARGET_EXPLICIT_RELOCS
>> +    ? "pcalau12i\t$r4,%%desc_pc_hi20(%1)\n\
>> +      \taddi.d\t$r4,$r4,%%desc_pc_lo12(%1)\n\
>> +      \tld.d\t$r1,$r4,%%desc_ld(%1)\n\
>> +      \tjirl\t$r1,$r1,%%desc_call(%1)"
> Use something like
>
>      ? "pcalau12i\t$r4,%%desc_pc_hi20(%1)\n\t"
>        "addi.d\t$r4,$r4,%%desc_pc_lo12(%1)\n\t"
>        "ld.d\t$r1,$r4,%%desc_ld(%1)\n\t"
>        "jirl\t$r1,$r1,%%desc_call(%1)"
>      : "la.tls.desc\t%0,%1";
>
> to prevent additional white spaces in the output asm before tabs.
>
>> +    : "la.tls.desc\t%0,%1";
>> +}
>> +  [(set_attr "got" "load")
>> +   (set_attr "mode" "<MODE>")
>> +   (set_attr "length" "16")])
>> +
>> +(define_insn "got_load_tls_desc_off64"
>> +  [(set (match_operand:DI 0 "register_operand" "=r")
>> +	(unspec:DI
>> +	    [(match_operand:DI 1 "symbolic_operand" "")]
>> +	    UNSPEC_TLS_DESC_OFF64))
>> +    (clobber (reg:SI FCC0_REGNUM))
>> +    (clobber (reg:SI FCC1_REGNUM))
>> +    (clobber (reg:SI FCC2_REGNUM))
>> +    (clobber (reg:SI FCC3_REGNUM))
>> +    (clobber (reg:SI FCC4_REGNUM))
>> +    (clobber (reg:SI FCC5_REGNUM))
>> +    (clobber (reg:SI FCC6_REGNUM))
>> +    (clobber (reg:SI FCC7_REGNUM))
>> +    (clobber (reg:SI RETURN_ADDR_REGNUM))
>> +    (clobber (match_operand:DI 2 "register_operand" "=&r"))]
>> +  "TARGET_TLS_DESC && TARGET_CMODEL_EXTREME"
>> +{
>> +  return TARGET_EXPLICIT_RELOCS
>> +    ? "pcalau12i\t$r4,%%desc_pc_hi20(%1)\n\
>> +      \taddi.d\t%2,$r0,%%desc_pc_lo12(%1)\n\
>> +      \tlu32i.d\t%2,%%desc64_pc_lo20(%1)\n\
>> +      \tlu52i.d\t%2,%2,%%desc64_pc_hi12(%1)\n\
>> +      \tadd.d\t$r4,$r4,%2\n\
>> +      \tld.d\t$r1,$r4,%%desc_ld(%1)\n\
>> +      \tjirl\t$r1,$r1,%%desc_call(%1)"
>> +    : "la.tls.desc\t%0,%2,%1";
> Likewise.
>
>> +}
>> +  [(set_attr "got" "load")
>> +   (set_attr "length" "28")])
> Otherwise OK.
>
> It's better to allow splitting these two instructions but we can do it
> in another patch.  And IMO it's better to enable TLS desc by default if
> supported by both the assembler and the libc, but we'll have to defer it
> until Glibc 2.40 release.


Do we need to wait until LLVM also supports TLS DESC  before setting it 
as default?


>