public inbox for gcc-patches@gcc.gnu.org
 help / color / mirror / Atom feed
From: "juzhe.zhong@rivai.ai" <juzhe.zhong@rivai.ai>
To: "Patrick O'Neill" <patrick@rivosinc.com>,
	 "Robin Dapp" <rdapp.gcc@gmail.com>
Cc: kito.cheng <kito.cheng@gmail.com>,
	 gcc-patches <gcc-patches@gcc.gnu.org>
Subject: Re: Re: [Ready to commit V3] RISC-V: Add AVL propagation PASS for RVV auto-vectorization
Date: Fri, 27 Oct 2023 09:13:47 +0800	[thread overview]
Message-ID: <9A49ECF1351F44C0+202310270913465238443@rivai.ai> (raw)
In-Reply-To: <e3db88e9-4c5f-4dd1-aab0-fdffb3e713f0@rivosinc.com>

[-- Attachment #1: Type: text/plain, Size: 6734 bytes --]

Yeah. No worry. We will eventually run full coverage testing && fix all bugs in stage 3 && stage 4.

We are planning to run the whole gcc testsuite with all these following compile option:

-march=rv64gcv_zvl128b --param=riscv-autovec-lmul=m1
-march=rv64gcv_zvl128b --param=riscv-autovec-lmul=m2
-march=rv64gcv_zvl128b --param=riscv-autovec-lmul=m4
-march=rv64gcv_zvl128b --param=riscv-autovec-lmul=m8
-march=rv64gcv_zvl128b --param=riscv-autovec-lmul=dynamic

-march=rv64gcv_zvl256b --param=riscv-autovec-lmul=m1
-march=rv64gcv_zvl256b --param=riscv-autovec-lmul=m2
-march=rv64gcv_zvl256b --param=riscv-autovec-lmul=m4
-march=rv64gcv_zvl256b --param=riscv-autovec-lmul=m8
-march=rv64gcv_zvl256b --param=riscv-autovec-lmul=dynamic

-march=rv64gcv_zvl512b --param=riscv-autovec-lmul=m1
-march=rv64gcv_zvl512b --param=riscv-autovec-lmul=m2
-march=rv64gcv_zvl512b --param=riscv-autovec-lmul=m4
-march=rv64gcv_zvl512b --param=riscv-autovec-lmul=m8
-march=rv64gcv_zvl512b --param=riscv-autovec-lmul=dynamic

-march=rv64gcv_zvl1024b --param=riscv-autovec-lmul=m1
-march=rv64gcv_zvl1024b --param=riscv-autovec-lmul=m2
-march=rv64gcv_zvl1024b --param=riscv-autovec-lmul=m4
-march=rv64gcv_zvl1024b --param=riscv-autovec-lmul=m8
-march=rv64gcv_zvl1024b --param=riscv-autovec-lmul=dynamic

-march=rv64gcv_zvl2048b --param=riscv-autovec-lmul=m1
-march=rv64gcv_zvl2048b --param=riscv-autovec-lmul=m2
-march=rv64gcv_zvl2048b --param=riscv-autovec-lmul=m4
-march=rv64gcv_zvl2048b --param=riscv-autovec-lmul=m8
-march=rv64gcv_zvl2048b --param=riscv-autovec-lmul=dynamic

-march=rv64gcv_zvl4096b --param=riscv-autovec-lmul=m1
-march=rv64gcv_zvl4096b --param=riscv-autovec-lmul=m2
-march=rv64gcv_zvl4096b --param=riscv-autovec-lmul=m4
-march=rv64gcv_zvl4096b --param=riscv-autovec-lmul=m8
-march=rv64gcv_zvl4096b --param=riscv-autovec-lmul=dynamic

-march=rv64gcv_zvl128b --param=riscv-autovec-lmul=m1 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl128b --param=riscv-autovec-lmul=m2 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl128b --param=riscv-autovec-lmul=m4 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl128b --param=riscv-autovec-lmul=m8 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl128b --param=riscv-autovec-lmul=dynamic --param=riscv-autovec-preference=fixed-vlmax

-march=rv64gcv_zvl256b --param=riscv-autovec-lmul=m1 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl256b --param=riscv-autovec-lmul=m2 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl256b --param=riscv-autovec-lmul=m4 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl256b --param=riscv-autovec-lmul=m8 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl256b --param=riscv-autovec-lmul=dynamic --param=riscv-autovec-preference=fixed-vlmax

-march=rv64gcv_zvl512b --param=riscv-autovec-lmul=m1 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl512b --param=riscv-autovec-lmul=m2 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl512b --param=riscv-autovec-lmul=m4 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl512b --param=riscv-autovec-lmul=m8 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl512b --param=riscv-autovec-lmul=dynamic --param=riscv-autovec-preference=fixed-vlmax

-march=rv64gcv_zvl1024b --param=riscv-autovec-lmul=m1 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl1024b --param=riscv-autovec-lmul=m2 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl1024b --param=riscv-autovec-lmul=m4 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl1024b --param=riscv-autovec-lmul=m8 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl1024b --param=riscv-autovec-lmul=dynamic --param=riscv-autovec-preference=fixed-vlmax

-march=rv64gcv_zvl2048b --param=riscv-autovec-lmul=m1 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl2048b --param=riscv-autovec-lmul=m2 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl2048b --param=riscv-autovec-lmul=m4 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl2048b --param=riscv-autovec-lmul=m8 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl2048b --param=riscv-autovec-lmul=dynamic --param=riscv-autovec-preference=fixed-vlmax

-march=rv64gcv_zvl4096b --param=riscv-autovec-lmul=m1 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl4096b --param=riscv-autovec-lmul=m2 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl4096b --param=riscv-autovec-lmul=m4 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl4096b --param=riscv-autovec-lmul=m8 --param=riscv-autovec-preference=fixed-vlmax
-march=rv64gcv_zvl4096b --param=riscv-autovec-lmul=dynamic --param=riscv-autovec-preference=fixed-vlmax

We will need your help of CI. Currently, it's still stage 1 and we are working on pushing as many optimizations as possible.

Thanks.


juzhe.zhong@rivai.ai
 
From: Patrick O'Neill
Date: 2023-10-27 02:43
To: Robin Dapp; Juzhe-Zhong
CC: Kito Cheng; gcc-patches
Subject: Re: [Ready to commit V3] RISC-V: Add AVL propagation PASS for RVV auto-vectorization
On 10/26/23 11:15, Robin Dapp wrote:
rv32gcv:
FAIL: gfortran.dg/intrinsic_pack_6.f90   -O2  execution test
FAIL: gfortran.dg/intrinsic_pack_6.f90   -O3 -g  execution test
FAIL: gfortran.dg/matmul_3.f90   -O2  execution test
FAIL: gfortran.fortran-torture/execute/intrinsic_matmul.f90 execution,  -O2
FAIL: gfortran.fortran-torture/execute/intrinsic_matmul.f90 execution,  -O2 -fbounds-check
FAIL: gfortran.fortran-torture/execute/intrinsic_matmul.f90 execution,  -O2 -fomit-frame-pointer -finline-functions
FAIL: gfortran.fortran-torture/execute/intrinsic_matmul.f90 execution,  -O3 -g
rv64gcv:
FAIL: gfortran.dg/matmul_6.f90   -O2  execution test
Those might also flip flop, I have them seen FAIL and PASS before
randomly.  It looks like there is at least 10 of those, really need
to figure out the root cause...
Regards
 Robin
I've seen the same thing on CI for some of these failures on rv32gcv but always as a group:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111969
Example CI run with the flaky group:
https://github.com/patrick-rivos/gcc-postcommit-ci/issues/75
The fact that some are resolved while not resolving the full group makes me hopeful that:
FAIL: gfortran.dg/intrinsic_pack_6.f90  execution test
FAIL: gfortran.fortran-torture/execute/intrinsic_matmul.f90 execution
are really resolved
I haven't seen these testcases be flaky on CI:
FAIL: gfortran.dg/matmul_3.f90   -O2  execution test
FAIL: gfortran.dg/matmul_6.f90   -O2  execution test
Patrick


  reply	other threads:[~2023-10-27  1:13 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-26  8:13 Juzhe-Zhong
2023-10-26 18:12 ` Patrick O'Neill
2023-10-26 18:15   ` Robin Dapp
2023-10-26 18:43     ` Patrick O'Neill
2023-10-27  1:13       ` juzhe.zhong [this message]
2023-10-26 23:05   ` 钟居哲
2023-10-28  8:15     ` Andreas Schwab
2023-10-29 12:08       ` Li, Pan2

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=9A49ECF1351F44C0+202310270913465238443@rivai.ai \
    --to=juzhe.zhong@rivai.ai \
    --cc=gcc-patches@gcc.gnu.org \
    --cc=kito.cheng@gmail.com \
    --cc=patrick@rivosinc.com \
    --cc=rdapp.gcc@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).