OK juzhe.zhong@rivai.ai From: Lehua Ding Date: 2023-10-17 19:34 To: gcc-patches CC: juzhe.zhong; kito.cheng; rdapp.gcc; palmer; jeffreyalaw; lehua.ding Subject: [PATCH V2 12/14] RISC-V: P12: Delete riscv-vsetvl.h This sub-patch delete the unused header file riscv-vsetvl.h since we no need export any function. gcc/ChangeLog: * config/riscv/t-riscv: Removed riscv-vsetvl.h * config/riscv/riscv-vsetvl.h: Removed. --- gcc/config/riscv/riscv-vsetvl.h | 59 --------------------------------- gcc/config/riscv/t-riscv | 2 +- 2 files changed, 1 insertion(+), 60 deletions(-) delete mode 100644 gcc/config/riscv/riscv-vsetvl.h diff --git a/gcc/config/riscv/riscv-vsetvl.h b/gcc/config/riscv/riscv-vsetvl.h deleted file mode 100644 index 16c84e0684b..00000000000 --- a/gcc/config/riscv/riscv-vsetvl.h +++ /dev/null @@ -1,59 +0,0 @@ -/* VSETVL pass header for RISC-V 'V' Extension for GNU compiler. - Copyright (C) 2022-2023 Free Software Foundation, Inc. - Contributed by Juzhe Zhong (juzhe.zhong@rivai.ai), RiVAI Technologies Ltd. - -This file is part of GCC. - -GCC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 3, or(at your option) -any later version. - -GCC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GCC; see the file COPYING3. If not see -. */ - -#ifndef GCC_RISCV_VSETVL_H -#define GCC_RISCV_VSETVL_H - -namespace riscv_vector { - -/* Classification of vsetvl instruction. */ -enum vsetvl_type -{ - VSETVL_NORMAL, - VSETVL_VTYPE_CHANGE_ONLY, - VSETVL_DISCARD_RESULT, - NUM_VSETVL_TYPE -}; - -enum emit_type -{ - /* emit_insn directly. */ - EMIT_DIRECT, - EMIT_BEFORE, - EMIT_AFTER, -}; - -enum def_type -{ - REAL_SET = 1 << 0, - PHI_SET = 1 << 1, - BB_HEAD_SET = 1 << 2, - BB_END_SET = 1 << 3, - /* ??? TODO: In RTL_SSA framework, we have REAL_SET, - PHI_SET, BB_HEAD_SET, BB_END_SET and - CLOBBER_DEF def_info types. Currently, - we conservatively do not optimize clobber - def since we don't see the case that we - need to optimize it. */ - CLOBBER_DEF = 1 << 4 -}; - -} // namespace riscv_vector -#endif diff --git a/gcc/config/riscv/t-riscv b/gcc/config/riscv/t-riscv index f137e1f17ef..dd17056fe82 100644 --- a/gcc/config/riscv/t-riscv +++ b/gcc/config/riscv/t-riscv @@ -64,7 +64,7 @@ riscv-vsetvl.o: $(srcdir)/config/riscv/riscv-vsetvl.cc \ $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) $(REGS_H) \ $(TARGET_H) tree-pass.h df.h rtl-ssa.h cfgcleanup.h insn-config.h \ insn-attr.h insn-opinit.h tm-constrs.h cfgrtl.h cfganal.h lcm.h \ - predict.h profile-count.h $(srcdir)/config/riscv/riscv-vsetvl.h \ + predict.h profile-count.h \ $(srcdir)/config/riscv/riscv-vsetvl.def $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ $(srcdir)/config/riscv/riscv-vsetvl.cc -- 2.36.3